/* config.h -- Simulator configuration header file
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/* config.h -- Simulator configuration header file
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#ifndef _CONFIG_H_
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#ifndef _CONFIG_H_
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#define _CONFIG_H_
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#define _CONFIG_H_
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#include <stdio.h>
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#include <stdio.h>
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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#define MAX_UARTS 4 /* Max. number of UARTs simulated */
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#define MAX_UARTS 4 /* Max. number of UARTs simulated */
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#define MAX_DMAS 4 /* Max. number of DMA controllers */
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#define MAX_DMAS 4 /* Max. number of DMA controllers */
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#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */
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#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */
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#define MAX_GPIOS 4 /* Max. number of GPIO modules */
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#define MAX_GPIOS 4 /* Max. number of GPIO modules */
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#define MAX_MEMORIES 16 /* Max. number of memory devices attached */
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#define MAX_MEMORIES 16 /* Max. number of memory devices attached */
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#define MAX_VGAS 4 /* Max. number of VGAs */
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#define MAX_VGAS 4 /* Max. number of VGAs */
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#define MAX_ATAS 4 /* Max. number of ATAS */
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#define MAX_ATAS 4 /* Max. number of ATAS */
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#define MAX_SBUF_LEN 256 /* Max. length of store buffer */
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#define MAX_SBUF_LEN 256 /* Max. length of store buffer */
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#define EXE_LOG_HARDWARE 0 /* Print out RTL states */
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#define EXE_LOG_HARDWARE 0 /* Print out RTL states */
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#define EXE_LOG_SIMPLE 1 /* Executed log prints out dissasembly */
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#define EXE_LOG_SIMPLE 1 /* Executed log prints out dissasembly */
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#define EXE_LOG_SOFTWARE 2 /* Simple with some register output*/
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#define EXE_LOG_SOFTWARE 2 /* Simple with some register output*/
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#define STR_SIZE (256)
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#define STR_SIZE (256)
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struct config {
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struct config {
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struct {
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struct {
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int enabled; /* Is tick timer enabled? */
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int enabled; /* Is tick timer enabled? */
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} tick;
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} tick;
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int nuarts;
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int nuarts;
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struct {
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struct {
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char rxfile[STR_SIZE]; /* Filename for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char txfile[STR_SIZE]; /* Filename for TX (required) */
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char txfile[STR_SIZE]; /* Filename for TX (required) */
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int jitter; /* CZ 250801 - in msecs...time to block */
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int jitter; /* CZ 250801 - in msecs...time to block */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned long baseaddr; /* Naturally aligned base address */
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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int uart16550; /* Whether this device is uart 16450 or 16550 */
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int uart16550; /* Whether this device is uart 16450 or 16550 */
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} uarts[MAX_UARTS];
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} uarts[MAX_UARTS];
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int ndmas;
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int ndmas;
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struct {
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struct {
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unsigned long baseaddr;
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unsigned long baseaddr;
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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} dmas[MAX_DMAS];
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} dmas[MAX_DMAS];
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int nethernets;
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int nethernets;
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struct {
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struct {
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unsigned long baseaddr;
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unsigned long baseaddr;
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned dma; /* Which controller is this ethernet "connected" to */
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unsigned dma; /* Which controller is this ethernet "connected" to */
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unsigned rtx_type; /* use file or socket interface */
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unsigned rtx_type; /* use file or socket interface */
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unsigned tx_channel; /* DMA channel used for TX */
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unsigned tx_channel; /* DMA channel used for TX */
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unsigned rx_channel; /* DMA channel used for RX */
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unsigned rx_channel; /* DMA channel used for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char txfile[STR_SIZE]; /* File for TX */
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char txfile[STR_SIZE]; /* File for TX */
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char sockif[STR_SIZE]; /* Socket Interface name ('lo', 'eth1',...) */
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char sockif[STR_SIZE]; /* Socket Interface name ('lo', 'eth1',...) */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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} ethernets[MAX_ETHERNETS];
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} ethernets[MAX_ETHERNETS];
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int ngpios;
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int ngpios;
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struct {
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struct {
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unsigned long baseaddr; /* Base address */
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unsigned long baseaddr; /* Base address */
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */
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unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */
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} gpios[MAX_GPIOS];
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} gpios[MAX_GPIOS];
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int nvgas;
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int nvgas;
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struct {
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struct {
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unsigned long baseaddr; /* Base address */
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unsigned long baseaddr; /* Base address */
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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int refresh_rate; /* Number of clocks per refresh */
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int refresh_rate; /* Number of clocks per refresh */
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char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */
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char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */
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} vgas[MAX_VGAS];
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} vgas[MAX_VGAS];
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struct {
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struct {
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int enabled; /* Whether frame buffer is enabled */
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int enabled; /* Whether frame buffer is enabled */
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unsigned long baseaddr; /* Base address of frame buffer register */
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unsigned long baseaddr; /* Base address of frame buffer register */
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int refresh_rate; /* Number of clocks per refresh */
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int refresh_rate; /* Number of clocks per refresh */
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char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */
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char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */
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} fb;
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} fb;
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struct {
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struct {
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int enabled; /* Is keyboard enabled? */
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int enabled; /* Is keyboard enabled? */
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unsigned long baseaddr; /* Base address of frame buffer register */
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unsigned long baseaddr; /* Base address of frame buffer register */
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int irq; /* Irq number of this device */
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int irq; /* Irq number of this device */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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} kbd;
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} kbd;
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struct {
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struct {
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int enabled; /* is MC enabled? */
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int enabled; /* is MC enabled? */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned POC; /* power on reset configuration register */
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unsigned POC; /* power on reset configuration register */
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} mc;
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} mc;
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int natas;
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int natas;
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struct {
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struct {
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned long baseaddr; /* Naturally aligned base address */
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int irq; /* Irq number of this device */
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int irq; /* Irq number of this device */
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int dev_type0; /* ATA-device0 type: 0=none, 1=simulated hd, 2=local system hd */
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int dev_type0; /* ATA-device0 type: 0=none, 1=simulated hd, 2=local system hd */
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char dev_file0[STR_SIZE]; /* Filename for simulating HardDisk (device 0) */
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char dev_file0[STR_SIZE]; /* Filename for simulating HardDisk (device 0) */
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unsigned long dev_size0; /* Size of simulated harddisk (device 0), in MBytes */
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unsigned long dev_size0; /* Size of simulated harddisk (device 0), in MBytes */
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int dev_packet0; /* Device0 implements PACKET command set */
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int dev_packet0; /* Device0 implements PACKET command set */
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int dev_type1; /* ATA-device1 type: 0=none, 1=simulated hd, 2=local system hd */
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int dev_type1; /* ATA-device1 type: 0=none, 1=simulated hd, 2=local system hd */
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char dev_file1[STR_SIZE]; /* Filename for simulating HardDisk (device 1) */
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char dev_file1[STR_SIZE]; /* Filename for simulating HardDisk (device 1) */
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unsigned long dev_size1; /* Size of simulated harddisk (device 1), in MBytes */
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unsigned long dev_size1; /* Size of simulated harddisk (device 1), in MBytes */
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int dev_packet1; /* Device1 implements PACKET command set */
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int dev_packet1; /* Device1 implements PACKET command set */
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} atas[MAX_ATAS];
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} atas[MAX_ATAS];
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struct {
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struct {
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int pattern; /* A user specified memory initialization pattern */
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int pattern; /* A user specified memory initialization pattern */
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int random_seed; /* Initialize the memory with random values, starting with seed */
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int random_seed; /* Initialize the memory with random values, starting with seed */
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enum {
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enum {
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MT_UNKNOWN,
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MT_UNKNOWN,
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MT_PATTERN,
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MT_PATTERN,
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MT_RANDOM
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MT_RANDOM
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} type;
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} type;
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int nmemories; /* Number of attached memories */
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int nmemories; /* Number of attached memories */
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struct {
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struct {
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int ce; /* Which ce this memory is associated with */
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int ce; /* Which ce this memory is associated with */
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unsigned long baseaddr; /* Start address of the memory */
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unsigned long baseaddr; /* Start address of the memory */
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unsigned long size; /* Memory size */
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unsigned long size; /* Memory size */
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char name[STR_SIZE]; /* Memory type string */
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char name[STR_SIZE]; /* Memory type string */
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char log[STR_SIZE]; /* Memory log filename */
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char log[STR_SIZE]; /* Memory log filename */
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int delayr; /* Read cycles */
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int delayr; /* Read cycles */
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int delayw; /* Write cycles */
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int delayw; /* Write cycles */
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} table[MAX_MEMORIES];
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} table[MAX_MEMORIES];
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} memory;
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} memory;
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struct {
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struct {
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int enabled; /* Whether IMMU is enabled */
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int enabled; /* Whether IMMU is enabled */
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int nways; /* Number of ITLB ways */
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int nways; /* Number of ITLB ways */
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int nsets; /* Number of ITLB sets */
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int nsets; /* Number of ITLB sets */
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int pagesize; /* ITLB page size */
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int pagesize; /* ITLB page size */
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int entrysize; /* ITLB entry size */
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int entrysize; /* ITLB entry size */
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int ustates; /* number of ITLB usage states */
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int ustates; /* number of ITLB usage states */
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int missdelay; /* How much cycles does the miss cost */
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int missdelay; /* How much cycles does the miss cost */
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int hitdelay; /* How much cycles does the hit cost */
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int hitdelay; /* How much cycles does the hit cost */
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} immu;
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} immu;
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struct {
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struct {
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int enabled; /* Whether DMMU is enabled */
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int enabled; /* Whether DMMU is enabled */
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int nways; /* Number of DTLB ways */
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int nways; /* Number of DTLB ways */
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int nsets; /* Number of DTLB sets */
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int nsets; /* Number of DTLB sets */
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int pagesize; /* DTLB page size */
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int pagesize; /* DTLB page size */
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int entrysize; /* DTLB entry size */
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int entrysize; /* DTLB entry size */
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int ustates; /* number of DTLB usage states */
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int ustates; /* number of DTLB usage states */
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int missdelay; /* How much cycles does the miss cost */
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int missdelay; /* How much cycles does the miss cost */
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int hitdelay; /* How much cycles does the hit cost */
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int hitdelay; /* How much cycles does the hit cost */
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} dmmu;
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} dmmu;
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struct {
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struct {
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int enabled; /* Whether instruction cache is enabled */
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int enabled; /* Whether instruction cache is enabled */
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int nways; /* Number of IC ways */
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int nways; /* Number of IC ways */
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int nsets; /* Number of IC sets */
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int nsets; /* Number of IC sets */
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int blocksize; /* IC entry size */
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int blocksize; /* IC entry size */
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int ustates; /* number of IC usage states */
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int ustates; /* number of IC usage states */
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int missdelay; /* How much cycles does the miss cost */
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int missdelay; /* How much cycles does the miss cost */
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int hitdelay; /* How much cycles does the hit cost */
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int hitdelay; /* How much cycles does the hit cost */
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} ic;
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} ic;
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struct {
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struct {
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int enabled; /* Whether data cache is enabled */
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int enabled; /* Whether data cache is enabled */
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int nways; /* Number of DC ways */
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int nways; /* Number of DC ways */
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int nsets; /* Number of DC sets */
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int nsets; /* Number of DC sets */
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int blocksize; /* DC entry size */
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int blocksize; /* DC entry size */
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int ustates; /* number of DC usage states */
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int ustates; /* number of DC usage states */
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int store_missdelay; /* How much cycles does the store miss cost */
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int store_missdelay; /* How much cycles does the store miss cost */
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int store_hitdelay; /* How much cycles does the store hit cost */
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int store_hitdelay; /* How much cycles does the store hit cost */
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int load_missdelay; /* How much cycles does the load miss cost */
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int load_missdelay; /* How much cycles does the load miss cost */
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int load_hitdelay; /* How much cycles does the load hit cost */
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int load_hitdelay; /* How much cycles does the load hit cost */
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} dc;
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} dc;
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struct {
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struct {
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int enabled; /* branch prediction buffer analysis */
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int enabled; /* branch prediction buffer analysis */
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int sbp_bnf_fwd; /* Static branch prediction for l.bnf uses forward prediction */
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int sbp_bnf_fwd; /* Static branch prediction for l.bnf uses forward prediction */
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int sbp_bf_fwd; /* Static branch prediction for l.bf uses forward prediction */
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int sbp_bf_fwd; /* Static branch prediction for l.bf uses forward prediction */
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int btic; /* branch prediction target insn cache analysis */
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int btic; /* branch prediction target insn cache analysis */
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int missdelay; /* How much cycles does the miss cost */
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int missdelay; /* How much cycles does the miss cost */
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int hitdelay; /* How much cycles does the hit cost */
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int hitdelay; /* How much cycles does the hit cost */
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#if 0
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#if 0
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int nways; /* Number of BP ways */
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int nways; /* Number of BP ways */
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int nsets; /* Number of BP sets */
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int nsets; /* Number of BP sets */
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int blocksize; /* BP entry size */
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int blocksize; /* BP entry size */
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int ustates; /* number of BP usage states */
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int ustates; /* number of BP usage states */
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int pstates; /* number of BP predict states */
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int pstates; /* number of BP predict states */
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#endif
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#endif
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} bpb;
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} bpb;
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struct {
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struct {
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unsigned long upr; /* Unit present register */
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unsigned long upr; /* Unit present register */
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unsigned long ver, rev; /* Version register */
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unsigned long ver, rev; /* Version register */
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int sr; /* Supervision register */
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int sr; /* Supervision register */
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int superscalar; /* superscalara analysis */
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int superscalar; /* superscalara analysis */
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int hazards; /* dependency hazards analysis */
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int hazards; /* dependency hazards analysis */
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int dependstats; /* dependency statistics */
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int dependstats; /* dependency statistics */
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int sbuf_len; /* length of store buffer, zero if disabled */
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int sbuf_len; /* length of store buffer, zero if disabled */
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} cpu;
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} cpu;
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struct {
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struct {
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int debug; /* Simulator debugging */
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int debug; /* Simulator debugging */
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int verbose; /* Force verbose output */
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int verbose; /* Force verbose output */
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int profile; /* Is profiler running */
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int profile; /* Is profiler running */
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char prof_fn[STR_SIZE]; /* Profiler filename */
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char prof_fn[STR_SIZE]; /* Profiler filename */
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int mprofile; /* Is memory profiler running */
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int mprofile; /* Is memory profiler running */
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char mprof_fn[STR_SIZE]; /* Memory profiler filename */
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char mprof_fn[STR_SIZE]; /* Memory profiler filename */
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int history; /* instruction stream history analysis */
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int history; /* instruction stream history analysis */
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int exe_log; /* Print out RTL states? */
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int exe_log; /* Print out RTL states? */
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int exe_log_type; /* Type of log */
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int exe_log_type; /* Type of log */
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int exe_log_start; /* First instruction to log */
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int exe_log_start; /* First instruction to log */
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int exe_log_end; /* Last instruction to log, -1 if continuous */
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int exe_log_end; /* Last instruction to log, -1 if continuous */
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int exe_log_marker; /* If nonzero, place markers before each exe_log_marker instructions */
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int exe_log_marker; /* If nonzero, place markers before each exe_log_marker instructions */
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char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
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char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
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int spr_log; /* Print out SPR states */
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int spr_log; /* Print out SPR states */
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char spr_log_fn[STR_SIZE]; /* SPR state log filename */
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char spr_log_fn[STR_SIZE]; /* SPR state log filename */
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char fstdout[STR_SIZE]; /* stdout filename */
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char fstdout[STR_SIZE]; /* stdout filename */
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long clkcycle_ps; /* Clock duration in ps */
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long clkcycle_ps; /* Clock duration in ps */
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long system_kfreq; /* System frequency in kHz*/
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long system_kfreq; /* System frequency in kHz*/
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} sim;
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} sim;
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struct {
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struct {
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int enabled; /* Whether is debug module enabled */
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int enabled; /* Whether is debug module enabled */
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int gdb_enabled; /* Whether is debugging with gdb possible */
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int gdb_enabled; /* Whether is debugging with gdb possible */
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int server_port; /* A user specified port number for services */
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int server_port; /* A user specified port number for services */
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unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */
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unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */
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} debug;
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} debug;
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struct { /* Verification API, part of Advanced Core Verification */
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struct { /* Verification API, part of Advanced Core Verification */
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int enabled; /* Whether is VAPI module enabled */
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int enabled; /* Whether is VAPI module enabled */
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int server_port; /* A user specified port number for services */
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int server_port; /* A user specified port number for services */
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int log_enabled; /* Whether to log the vapi requests */
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int log_enabled; /* Whether to log the vapi requests */
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int hide_device_id; /* Whether to log device ID for each request */
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int hide_device_id; /* Whether to log device ID for each request */
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char vapi_fn[STR_SIZE]; /* vapi log filename */
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char vapi_fn[STR_SIZE]; /* vapi log filename */
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} vapi;
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} vapi;
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struct {
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struct {
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int enabled; /* Whether power menagement is operational */
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int enabled; /* Whether power menagement is operational */
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} pm;
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} pm;
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};
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};
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struct runtime {
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struct runtime {
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struct {
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struct {
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FILE *fprof; /* Profiler file */
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FILE *fprof; /* Profiler file */
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FILE *fmprof; /* Memory profiler file */
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FILE *fmprof; /* Memory profiler file */
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FILE *fexe_log; /* RTL state comparison file */
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FILE *fexe_log; /* RTL state comparison file */
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FILE *fspr_log; /* SPR state log file */
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FILE *fspr_log; /* SPR state log file */
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int init; /* Whether we are still initilizing sim */
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int init; /* Whether we are still initilizing sim */
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int script_file_specified; /* Whether script file was already loaded */
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int script_file_specified; /* Whether script file was already loaded */
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char *filename; /* Original Command Simulator file (CZ) */
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char *filename; /* Original Command Simulator file (CZ) */
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int output_cfg; /* Whether sim is to output cfg files */
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int output_cfg; /* Whether sim is to output cfg files */
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char script_fn[STR_SIZE]; /* Script file read */
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char script_fn[STR_SIZE]; /* Script file read */
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int iprompt; /* Interactive prompt */
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int iprompt; /* Interactive prompt */
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} sim;
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} sim;
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/* Command line parameters */
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struct {
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int profile; /* Whether profiling was enabled */
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int mprofile; /* Whether memory profiling was enabled */
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} simcmd;
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struct {
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struct {
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unsigned long ifea; /* Instruction fetch effective address */
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unsigned long ifea; /* Instruction fetch effective address */
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unsigned long lea; /* Load effective address */
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unsigned long lea; /* Load effective address */
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unsigned long sea; /* Store effective address */
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unsigned long sea; /* Store effective address */
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unsigned long ld; /* Load data */
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unsigned long ld; /* Load data */
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unsigned long sd; /* Store data */
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unsigned long sd; /* Store data */
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unsigned long lsea; /* Load/Store effective address */
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unsigned long lsea; /* Load/Store effective address */
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} cpu;
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} cpu;
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struct {
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struct {
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int random_seed; /* Initialize the memory with random values, starting with seed */
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int random_seed; /* Initialize the memory with random values, starting with seed */
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} memory;
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} memory;
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struct { /* Verification API, part of Advanced Core Verification */
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struct { /* Verification API, part of Advanced Core Verification */
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int enabled; /* Whether is VAPI module enabled */
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int enabled; /* Whether is VAPI module enabled */
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FILE *vapi_file; /* vapi file */
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FILE *vapi_file; /* vapi file */
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int server_port; /* A user specified port number for services */
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int server_port; /* A user specified port number for services */
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} vapi;
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} vapi;
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};
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};
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#if FAST_SIM
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#if FAST_SIM
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#include "fast_config.c"
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#include "fast_config.c"
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#define IFF(x) if (x)
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#define IFF(x) if (x)
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#else
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#else
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extern struct config config;
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extern struct config config;
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#define IFF(x) if (1)
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#define IFF(x) if (1)
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#endif
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#endif
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|
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extern struct runtime runtime;
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extern struct runtime runtime;
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|
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/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
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/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
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void read_script_file (char *filename);
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void read_script_file (char *filename);
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|
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/* Executes set sim command. Returns nonzero if error. */
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/* Executes set sim command. Returns nonzero if error. */
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void set_config_command (char *s);
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void set_config_command (char *s);
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|
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/* Outputs C structure of current config to file */
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/* Outputs C structure of current config to file */
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void output_cfg (FILE *f);
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void output_cfg (FILE *f);
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|
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#endif
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#endif
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