/* toplevel.c -- Top level simulator source file
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/* toplevel.c -- Top level simulator source file
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Simulator commands. Help and version output. SIGINT processing.
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/* Simulator commands. Help and version output. SIGINT processing.
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Stdout redirection is specific to linux (I need to fix this). */
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Stdout redirection is specific to linux (I need to fix this). */
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#include <stdio.h>
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#include <stdio.h>
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#include <ctype.h>
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#include <ctype.h>
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#include <string.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <signal.h>
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#include <signal.h>
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#include <stdarg.h>
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#include <stdarg.h>
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#include <fcntl.h>
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#include <fcntl.h>
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#include <limits.h>
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#include <limits.h>
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#include <time.h>
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#include <time.h>
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#include "config.h"
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#include "config.h"
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#ifdef HAVE_INTTYPES_H
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#ifdef HAVE_INTTYPES_H
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#include <inttypes.h>
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#include <inttypes.h>
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#endif
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#endif
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#include "port.h"
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#include "port.h"
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#include "arch.h"
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#include "arch.h"
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#include "parse.h"
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#include "parse.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "labels.h"
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#include "labels.h"
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#include "execute.h"
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#include "execute.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "spr_defs.h"
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#include "spr_defs.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "dma.h"
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#include "dma.h"
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#include "vga.h"
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#include "vga.h"
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#include "fb.h"
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#include "fb.h"
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#include "ps2kbd.h"
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#include "ps2kbd.h"
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#include "vapi.h"
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#include "vapi.h"
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#include "gdbcomm.h"
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#include "gdbcomm.h"
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#include "debug_unit.h"
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#include "debug_unit.h"
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#include "coff.h"
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#include "coff.h"
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#include "sched.h"
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#include "sched.h"
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#include "profiler.h"
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#include "profiler.h"
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#include "mprofiler.h"
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#include "mprofiler.h"
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#include "mc.h"
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#include "mc.h"
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#include "atahost.h"
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#include "atahost.h"
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#include "16450.h"
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#include "16450.h"
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#include "ethernet.h"
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#include "ethernet.h"
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#include "gpio.h"
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#include "gpio.h"
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#include "pm.h"
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#include "pm.h"
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#include "pic.h"
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#include "pic.h"
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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#include "stats.h"
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#include "stats.h"
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#include "immu.h"
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#include "immu.h"
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#include "dmmu.h"
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#include "dmmu.h"
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#include "dcache_model.h"
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#include "dcache_model.h"
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#include "icache_model.h"
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#include "icache_model.h"
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#include "branch_predict.h"
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#include "branch_predict.h"
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#include "dumpverilog.h"
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#include "dumpverilog.h"
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#include "trace.h"
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#include "trace.h"
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#include "cuc.h"
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#include "cuc.h"
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/* CVS revision number. */
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/* CVS revision number. */
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const char rcsrev[] = "$Revision: 1.104 $";
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const char rcsrev[] = "$Revision: 1.105 $";
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inline void debug(int level, const char *format, ...)
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inline void debug(int level, const char *format, ...)
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{
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{
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char *p;
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char *p;
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va_list ap;
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va_list ap;
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if (config.sim.debug >= level) {
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if (config.sim.debug >= level) {
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if ((p = malloc(1000)) == NULL)
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if ((p = malloc(1000)) == NULL)
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return;
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return;
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va_start(ap, format);
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va_start(ap, format);
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(void) vsnprintf(p, 1000, format, ap);
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(void) vsnprintf(p, 1000, format, ap);
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va_end(ap);
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va_end(ap);
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PRINTF("%s", p);
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PRINTF("%s", p);
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fflush(stdout);
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fflush(stdout);
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free(p);
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free(p);
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} else {
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} else {
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#if DEBUG
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#if DEBUG
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if ((p = malloc(1000)) == NULL)
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if ((p = malloc(1000)) == NULL)
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return;
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return;
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va_start(ap, format);
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va_start(ap, format);
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(void) vsnprintf(p, 1000, format, ap);
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(void) vsnprintf(p, 1000, format, ap);
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va_end(ap);
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va_end(ap);
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PRINTF("%s\n", p);
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PRINTF("%s\n", p);
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fflush(stdout);
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fflush(stdout);
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free(p);
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free(p);
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#endif
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#endif
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}
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}
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}
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}
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void ctrl_c(signum)
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void ctrl_c(signum)
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int signum;
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int signum;
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{
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{
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runtime.sim.cont_run = runtime.cpu.stalled ? 0 : 1;
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runtime.sim.cont_run = runtime.cpu.stalled ? 0 : 1;
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runtime.sim.iprompt = 1;
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runtime.sim.iprompt = 1;
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set_stall_state (0);
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set_stall_state (0);
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signal(SIGINT, ctrl_c);
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signal(SIGINT, ctrl_c);
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}
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}
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void version()
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void version()
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{
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{
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PRINTF ("\n");
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PRINTF ("\n");
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PRINTF ("OpenRISC 1000 (OR32) Architectural Simulator, %s\n", rcsrev);
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PRINTF ("OpenRISC 1000 (OR32) Architectural Simulator, %s\n", rcsrev);
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PRINTF ("Copyright (C) 1999 Damjan Lampret, lampret@opencores.org\n");
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PRINTF ("Copyright (C) 1999 Damjan Lampret, lampret@opencores.org\n");
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PRINTF ("Copyright (C) 2000 Damjan Lampret, lampret@opencores.org\n");
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PRINTF ("Copyright (C) 2000 Damjan Lampret, lampret@opencores.org\n");
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PRINTF (" Jimmy Chen-Min Chen, jimmy@ee.nctu.edu.tw\n");
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PRINTF (" Jimmy Chen-Min Chen, jimmy@ee.nctu.edu.tw\n");
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PRINTF (" Johan Rydberg, johan.rydberg@insight.se\n");
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PRINTF (" Johan Rydberg, johan.rydberg@insight.se\n");
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PRINTF (" Marko Mlinar, markom@opencores.org\n");
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PRINTF (" Marko Mlinar, markom@opencores.org\n");
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PRINTF ("Copyright (C) 2001 Simon Srot, simons@opencores.org\n");
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PRINTF ("Copyright (C) 2001 Simon Srot, simons@opencores.org\n");
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PRINTF (" Marko Mlinar, markom@opencores.org\n");
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PRINTF (" Marko Mlinar, markom@opencores.org\n");
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PRINTF ("Copyright (C) 2002 Marko Mlinar, markom@opencores.org\n");
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PRINTF ("Copyright (C) 2002 Marko Mlinar, markom@opencores.org\n");
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PRINTF (" Simon Srot, simons@opencores.org\n");
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PRINTF (" Simon Srot, simons@opencores.org\n");
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PRINTF ("Visit http://www.opencores.org for more information about ");
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PRINTF ("Visit http://www.opencores.org for more information about ");
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PRINTF ("OpenRISC 1000 and\nother open source cores.\n\n");
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PRINTF ("OpenRISC 1000 and\nother open source cores.\n\n");
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PRINTF ("This software comes with ABSOLUTELY NO WARRANTY; for ");
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PRINTF ("This software comes with ABSOLUTELY NO WARRANTY; for ");
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PRINTF ("details see COPYING.\nThis is free software, and you ");
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PRINTF ("details see COPYING.\nThis is free software, and you ");
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PRINTF ("are welcome to redistribute it under certain\nconditions; ");
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PRINTF ("are welcome to redistribute it under certain\nconditions; ");
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PRINTF ("for details see COPYING.\n");
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PRINTF ("for details see COPYING.\n");
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}
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}
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void debugmem (unsigned long from, unsigned long to );
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struct sim_reset_hook {
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void *dat;
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void (*reset_hook)(void *);
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struct sim_reset_hook *next;
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};
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struct sim_reset_hook *sim_reset_hooks = NULL;
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/* Registers a new reset hook, called when sim_reset below is called */
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void reg_sim_reset(void (*reset_hook)(void *), void *dat)
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{
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struct sim_reset_hook *new = malloc(sizeof(struct sim_reset_hook));
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if(!new) {
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fprintf(stderr, "reg_sim_reset: Out-of-memory\n");
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exit(1);
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}
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new->dat = dat;
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new->reset_hook = reset_hook;
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new->next = sim_reset_hooks;
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sim_reset_hooks = new;
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}
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/* Resets all subunits */
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/* Resets all subunits */
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void sim_reset (void)
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void sim_reset (void)
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{
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{
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struct sim_reset_hook *cur_reset = sim_reset_hooks;
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SCHED_INIT();
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SCHED_INIT();
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while(cur_reset) {
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cur_reset->reset_hook(cur_reset->dat);
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cur_reset = cur_reset->next;
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}
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uart_reset();
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uart_reset();
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dma_reset();
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dma_reset();
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eth_reset();
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eth_reset();
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gpio_reset();
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gpio_reset();
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vga_reset ();
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vga_reset ();
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fb_reset ();
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fb_reset ();
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kbd_reset ();
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kbd_reset ();
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ata_reset();
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ata_reset();
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tick_reset();
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tick_reset();
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pm_reset();
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pm_reset();
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pic_reset();
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pic_reset();
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mc_reset();
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mc_reset();
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du_reset ();
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du_reset ();
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cpu_reset();
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cpu_reset();
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}
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}
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/* Initalizes all devices and sim */
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/* Initalizes all devices and sim */
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void sim_init ()
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void sim_init ()
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{
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{
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init_memory_table ();
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init_memory_table ();
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init_labels();
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init_labels();
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init_breakpoints();
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init_breakpoints();
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initstats();
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initstats();
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build_automata();
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build_automata();
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if (config.sim.profile) {
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if (config.sim.profile) {
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runtime.sim.fprof = fopen(config.sim.prof_fn, "wt+");
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runtime.sim.fprof = fopen(config.sim.prof_fn, "wt+");
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if(!runtime.sim.fprof) {
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if(!runtime.sim.fprof) {
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fprintf(stderr, "ERROR: Problems opening profile file.\n");
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fprintf(stderr, "ERROR: Problems opening profile file.\n");
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exit (1);
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exit (1);
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} else
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} else
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fprintf(runtime.sim.fprof, "+00000000 FFFFFFFF FFFFFFFF [outside_functions]\n");
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fprintf(runtime.sim.fprof, "+00000000 FFFFFFFF FFFFFFFF [outside_functions]\n");
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}
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}
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if (config.sim.mprofile) {
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if (config.sim.mprofile) {
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runtime.sim.fmprof = fopen(config.sim.mprof_fn, "wb+");
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runtime.sim.fmprof = fopen(config.sim.mprof_fn, "wb+");
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if(!runtime.sim.fmprof) {
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if(!runtime.sim.fmprof) {
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fprintf(stderr, "ERROR: Problems opening memory profile file.\n");
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fprintf(stderr, "ERROR: Problems opening memory profile file.\n");
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exit (1);
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exit (1);
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}
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}
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}
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}
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if (config.sim.exe_log) {
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if (config.sim.exe_log) {
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runtime.sim.fexe_log = fopen(config.sim.exe_log_fn, "wt+");
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runtime.sim.fexe_log = fopen(config.sim.exe_log_fn, "wt+");
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if(!runtime.sim.fexe_log) {
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if(!runtime.sim.fexe_log) {
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PRINTF("ERROR: Problems opening exe_log file.\n");
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PRINTF("ERROR: Problems opening exe_log file.\n");
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exit (1);
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exit (1);
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}
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}
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}
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}
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if (config.sim.spr_log) {
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if (config.sim.spr_log) {
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PRINTF("OPENING SPRLOG\n");
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PRINTF("OPENING SPRLOG\n");
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runtime.sim.fspr_log = fopen(config.sim.spr_log_fn, "wt+");
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runtime.sim.fspr_log = fopen(config.sim.spr_log_fn, "wt+");
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if (!runtime.sim.fspr_log) {
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if (!runtime.sim.fspr_log) {
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PRINTF("ERROR: Problems opening spr_log file.\n");
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PRINTF("ERROR: Problems opening spr_log file.\n");
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exit(1);
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exit(1);
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}
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}
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}
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}
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/* Initialize memory */
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/* Initialize memory */
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{
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{
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extern struct dev_memarea *dev_list;
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extern struct dev_memarea *dev_list;
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struct dev_memarea *area;
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struct dev_memarea *area;
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int i;
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int i;
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if (config.memory.type == MT_RANDOM) {
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if (config.memory.type == MT_RANDOM) {
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unsigned int val = 0;
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unsigned int val = 0;
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if (config.memory.random_seed == -1) {
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if (config.memory.random_seed == -1) {
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runtime.memory.random_seed = time(NULL);
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runtime.memory.random_seed = time(NULL);
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/* Print out the seed just in case we ever need to debug */
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/* Print out the seed just in case we ever need to debug */
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PRINTF("Seeding random generator with value %d\n", config.memory.random_seed);
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PRINTF("Seeding random generator with value %d\n", config.memory.random_seed);
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} else
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} else
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runtime.memory.random_seed = config.memory.random_seed;
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runtime.memory.random_seed = config.memory.random_seed;
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srandom(runtime.memory.random_seed);
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srandom(runtime.memory.random_seed);
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for (area = dev_list; area; area = area->next)
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for (area = dev_list; area; area = area->next)
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for(i = 0; i < area->size; i++) {
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for(i = 0; i < area->size; i++) {
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val = random();
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val = random();
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setsim_mem8(i + area->addr_compare, val & 0xFF);
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setsim_mem8(i + area->addr_compare, val & 0xFF);
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}
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}
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} else if(config.memory.type == MT_PATTERN) {
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} else if(config.memory.type == MT_PATTERN) {
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for (area = dev_list; area; area = area->next)
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for (area = dev_list; area; area = area->next)
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for(i = 0; i < area->size; i++)
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for(i = 0; i < area->size; i++)
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setsim_mem8(i + area->addr_compare, config.memory.pattern);
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setsim_mem8(i + area->addr_compare, config.memory.pattern);
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} else if (config.memory.type != MT_UNKNOWN) {
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} else if (config.memory.type != MT_UNKNOWN) {
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fprintf(stderr, "Invalid memory configuration type.\n");
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fprintf(stderr, "Invalid memory configuration type.\n");
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exit(1);
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exit(1);
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}
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}
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}
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}
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if(runtime.sim.filename) {
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if(runtime.sim.filename) {
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unsigned long endaddr = 0xFFFFFFFF;
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unsigned long endaddr = 0xFFFFFFFF;
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endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero. */
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endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero. */
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if (endaddr == -1) {
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if (endaddr == -1) {
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fprintf(stderr, "Problems loading boot code.\n");
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fprintf(stderr, "Problems loading boot code.\n");
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exit(1);
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exit(1);
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}
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}
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}
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}
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|
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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/* Disable gdb debugging, if debug module is not available. */
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/* Disable gdb debugging, if debug module is not available. */
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if (config.debug.gdb_enabled && !config.debug.enabled) {
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if (config.debug.gdb_enabled && !config.debug.enabled) {
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config.debug.gdb_enabled = 0;
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config.debug.gdb_enabled = 0;
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if (config.sim.verbose)
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if (config.sim.verbose)
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fprintf (stderr, "WARNING: Debug module not enabled, cannot start gdb.\n");
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fprintf (stderr, "WARNING: Debug module not enabled, cannot start gdb.\n");
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}
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}
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#endif
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#endif
|
|
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if (config.debug.gdb_enabled)
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if (config.debug.gdb_enabled)
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gdbcomm_init ();
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gdbcomm_init ();
|
|
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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/* Enable dependency stats, if we want to do history analisis */
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/* Enable dependency stats, if we want to do history analisis */
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if (config.sim.history && !config.cpu.dependstats) {
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if (config.sim.history && !config.cpu.dependstats) {
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config.cpu.dependstats = 1;
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config.cpu.dependstats = 1;
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if (config.sim.verbose)
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if (config.sim.verbose)
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fprintf (stderr, "WARNING: dependstats stats must be enabled to do history analisis.\n");
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fprintf (stderr, "WARNING: dependstats stats must be enabled to do history analisis.\n");
|
}
|
}
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#endif
|
#endif
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|
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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#if !FAST_SIM /* We assume we have valid configuration with fsim*/
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/* Debug forces verbose */
|
/* Debug forces verbose */
|
if (config.sim.debug && !config.sim.verbose) {
|
if (config.sim.debug && !config.sim.verbose) {
|
config.sim.verbose = 1;
|
config.sim.verbose = 1;
|
fprintf (stderr, "WARNING: verbose turned on.\n");
|
fprintf (stderr, "WARNING: verbose turned on.\n");
|
}
|
}
|
#endif
|
#endif
|
|
|
/* Start VAPI before device initialization. */
|
/* Start VAPI before device initialization. */
|
if (config.vapi.enabled) {
|
if (config.vapi.enabled) {
|
runtime.vapi.enabled = 1;
|
runtime.vapi.enabled = 1;
|
vapi_init ();
|
vapi_init ();
|
if (config.sim.verbose)
|
if (config.sim.verbose)
|
PRINTF ("VAPI started, waiting for clients.\n");
|
PRINTF ("VAPI started, waiting for clients.\n");
|
}
|
}
|
|
|
sim_reset ();
|
sim_reset ();
|
|
|
lock_memory_table ();
|
lock_memory_table ();
|
|
|
/* Wait till all test are connected. */
|
/* Wait till all test are connected. */
|
if (runtime.vapi.enabled) {
|
if (runtime.vapi.enabled) {
|
int numu = vapi_num_unconnected (0);
|
int numu = vapi_num_unconnected (0);
|
if (numu) {
|
if (numu) {
|
PRINTF ("\nWaiting for VAPI tests with ids:\n");
|
PRINTF ("\nWaiting for VAPI tests with ids:\n");
|
vapi_num_unconnected (1);
|
vapi_num_unconnected (1);
|
PRINTF ("\n");
|
PRINTF ("\n");
|
while ((numu = vapi_num_unconnected (0))) {
|
while ((numu = vapi_num_unconnected (0))) {
|
vapi_check ();
|
vapi_check ();
|
PRINTF ("\rStill waiting for %i VAPI test(s) to connect. ", numu);
|
PRINTF ("\rStill waiting for %i VAPI test(s) to connect. ", numu);
|
usleep (100);
|
usleep (100);
|
}
|
}
|
PRINTF ("\n");
|
PRINTF ("\n");
|
}
|
}
|
PRINTF ("All devices connected \n");
|
PRINTF ("All devices connected \n");
|
}
|
}
|
/* simulator is initialized */
|
/* simulator is initialized */
|
runtime.sim.init = 0;
|
runtime.sim.init = 0;
|
}
|
}
|
|
|
/* Cleanup */
|
/* Cleanup */
|
void sim_done ()
|
void sim_done ()
|
{
|
{
|
if (config.sim.profile) {
|
if (config.sim.profile) {
|
fprintf(runtime.sim.fprof,"-%08llX FFFFFFFF\n", runtime.sim.cycles);
|
fprintf(runtime.sim.fprof,"-%08llX FFFFFFFF\n", runtime.sim.cycles);
|
fclose(runtime.sim.fprof);
|
fclose(runtime.sim.fprof);
|
}
|
}
|
|
|
if (config.sim.mprofile) fclose(runtime.sim.fmprof);
|
if (config.sim.mprofile) fclose(runtime.sim.fmprof);
|
if (config.sim.exe_log) fclose(runtime.sim.fexe_log);
|
if (config.sim.exe_log) fclose(runtime.sim.fexe_log);
|
if (runtime.vapi.enabled) vapi_done ();
|
if (runtime.vapi.enabled) vapi_done ();
|
done_memory_table ();
|
done_memory_table ();
|
exit(0);
|
exit(0);
|
}
|
}
|
|
|
/* Executes jobs in time queue */
|
/* Executes jobs in time queue */
|
static inline void do_scheduler ()
|
static inline void do_scheduler ()
|
{
|
{
|
void (*func)(int);
|
void (*func)(int);
|
int param;
|
int param;
|
|
|
/* Execute all jobs till now */
|
/* Execute all jobs till now */
|
do {
|
do {
|
func = SCHED_PEEK().func;
|
func = SCHED_PEEK().func;
|
param = SCHED_PEEK().param;
|
param = SCHED_PEEK().param;
|
SCHED_REMOVE();
|
SCHED_REMOVE();
|
func (param);
|
func (param);
|
} while (runtime.sim.cycles >= SCHED_PEEK().time);
|
} while (runtime.sim.cycles >= SCHED_PEEK().time);
|
}
|
}
|
|
|
/* Main function */
|
/* Main function */
|
int main(argc, argv)
|
int main(argc, argv)
|
int argc;
|
int argc;
|
char *argv[];
|
char *argv[];
|
{
|
{
|
srand(getpid());
|
srand(getpid());
|
init_defconfig();
|
init_defconfig();
|
reg_config_secs();
|
reg_config_secs();
|
if (parse_args(argc, argv)) {
|
if (parse_args(argc, argv)) {
|
PRINTF("Usage: %s [options] <filename>\n", argv[0]);
|
PRINTF("Usage: %s [options] <filename>\n", argv[0]);
|
PRINTF("Options:\n");
|
PRINTF("Options:\n");
|
PRINTF(" -v version and copyright note\n");
|
PRINTF(" -v version and copyright note\n");
|
PRINTF(" -i enable interactive command prompt\n");
|
PRINTF(" -i enable interactive command prompt\n");
|
PRINTF(" --nosrv do not launch JTAG proxy server\n"); /* (CZ) */
|
PRINTF(" --nosrv do not launch JTAG proxy server\n"); /* (CZ) */
|
PRINTF(" --srv <n> launch JTAG proxy server on port <n>; [random]\n"); /* (CZ) */
|
PRINTF(" --srv <n> launch JTAG proxy server on port <n>; [random]\n"); /* (CZ) */
|
#if !FAST_SIM
|
#if !FAST_SIM
|
PRINTF(" -f or --file load script file [sim.cfg]\n");
|
PRINTF(" -f or --file load script file [sim.cfg]\n");
|
PRINTF(" --enable-profile enable profiling.\n");
|
PRINTF(" --enable-profile enable profiling.\n");
|
PRINTF(" --enable-mprofile enable memory profiling.\n");
|
PRINTF(" --enable-mprofile enable memory profiling.\n");
|
#endif
|
#endif
|
PRINTF(" --output-cfg prints C structure of current\n");
|
PRINTF(" --output-cfg prints C structure of current\n");
|
PRINTF(" configuration to standard output\n");
|
PRINTF(" configuration to standard output\n");
|
PRINTF("\nor : %s ", argv[0]);
|
PRINTF("\nor : %s ", argv[0]);
|
mp_help ();
|
mp_help ();
|
PRINTF("\nor : %s ", argv[0]);
|
PRINTF("\nor : %s ", argv[0]);
|
prof_help ();
|
prof_help ();
|
exit(-1);
|
exit(-1);
|
}
|
}
|
|
|
#if !FAST_SIM
|
#if !FAST_SIM
|
/* Read configuration file. */
|
/* Read configuration file. */
|
if (!runtime.sim.script_file_specified)
|
if (!runtime.sim.script_file_specified)
|
read_script_file ("sim.cfg");
|
read_script_file ("sim.cfg");
|
|
|
/* Overide parameters with command line ones */
|
/* Overide parameters with command line ones */
|
if (runtime.simcmd.profile) config.sim.profile = 1;
|
if (runtime.simcmd.profile) config.sim.profile = 1;
|
if (runtime.simcmd.mprofile) config.sim.mprofile = 1;
|
if (runtime.simcmd.mprofile) config.sim.mprofile = 1;
|
|
|
if (!runtime.sim.script_file_specified && config.sim.verbose)
|
if (!runtime.sim.script_file_specified && config.sim.verbose)
|
fprintf (stderr, "WARNING: No config file read, assuming default configuration.\n");
|
fprintf (stderr, "WARNING: No config file read, assuming default configuration.\n");
|
#else
|
#else
|
PRINTF ("\n\tNOTE: running fast sim with fixed configuration!\n\n");
|
PRINTF ("\n\tNOTE: running fast sim with fixed configuration!\n\n");
|
#endif
|
#endif
|
if (runtime.sim.output_cfg) {
|
if (runtime.sim.output_cfg) {
|
output_cfg (stdout);
|
output_cfg (stdout);
|
exit (0);
|
exit (0);
|
}
|
}
|
print_config();
|
print_config();
|
sim_init ();
|
sim_init ();
|
signal(SIGINT, ctrl_c);
|
signal(SIGINT, ctrl_c);
|
|
|
runtime.sim.hush = 1;
|
runtime.sim.hush = 1;
|
runtime.sim.cont_run = -1;
|
runtime.sim.cont_run = -1;
|
|
|
while(1) {
|
while(1) {
|
if (runtime.sim.iprompt)
|
if (runtime.sim.iprompt)
|
handle_sim_command();
|
handle_sim_command();
|
|
|
{ /* Needed by execution */
|
{ /* Needed by execution */
|
extern int do_stats;
|
extern int do_stats;
|
do_stats = config.cpu.dependstats || config.cpu.superscalar || config.cpu.dependstats
|
do_stats = config.cpu.dependstats || config.cpu.superscalar || config.cpu.dependstats
|
|| config.sim.history || config.sim.exe_log;
|
|| config.sim.history || config.sim.exe_log;
|
}
|
}
|
|
|
/* MM: 'run -1' means endless execution. */
|
/* MM: 'run -1' means endless execution. */
|
while(runtime.sim.cont_run) {
|
while(runtime.sim.cont_run) {
|
IFF (config.debug.enabled) {
|
IFF (config.debug.enabled) {
|
du_clock(); // reset watchpoints
|
du_clock(); // reset watchpoints
|
if (runtime.cpu.stalled) {
|
if (runtime.cpu.stalled) {
|
if(config.debug.gdb_enabled) {
|
if(config.debug.gdb_enabled) {
|
BlockJTAG();
|
BlockJTAG();
|
HandleServerSocket(false);
|
HandleServerSocket(false);
|
} else {
|
} else {
|
fprintf (stderr, "WARNING: CPU stalled and gdb connection not enabled.");
|
fprintf (stderr, "WARNING: CPU stalled and gdb connection not enabled.");
|
runtime.sim.cont_run = 0;
|
runtime.sim.cont_run = 0;
|
}
|
}
|
continue;
|
continue;
|
}
|
}
|
}
|
}
|
|
|
/* Each cycle has counter of mem_cycles; this value is joined with cycles
|
/* Each cycle has counter of mem_cycles; this value is joined with cycles
|
at the end of the cycle; no sim originated memory accesses should be
|
at the end of the cycle; no sim originated memory accesses should be
|
performed inbetween. */
|
performed inbetween. */
|
runtime.sim.mem_cycles = 0;
|
runtime.sim.mem_cycles = 0;
|
if (!config.pm.enabled || !testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME)) {
|
if (!config.pm.enabled || !testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME)) {
|
if (runtime.sim.cont_run > 0) runtime.sim.cont_run--;
|
if (runtime.sim.cont_run > 0) runtime.sim.cont_run--;
|
pic_clock ();
|
pic_clock ();
|
if (cpu_clock ()) break;
|
if (cpu_clock ()) break;
|
if (config.dc.enabled) dc_clock();
|
if (config.dc.enabled) dc_clock();
|
if (config.ic.enabled) ic_clock();
|
if (config.ic.enabled) ic_clock();
|
}
|
}
|
|
|
if (config.dmas) dma_clock();
|
if (config.dmas) dma_clock();
|
if (config.ethernets) eth_clock();
|
if (config.ethernets) eth_clock();
|
if (config.ngpios) gpio_clock();
|
if (config.ngpios) gpio_clock();
|
if (config.vapi.enabled && runtime.vapi.enabled) vapi_check();
|
if (config.vapi.enabled && runtime.vapi.enabled) vapi_check();
|
if (config.debug.gdb_enabled) HandleServerSocket(false); /* block & check_stdin = false */
|
if (config.debug.gdb_enabled) HandleServerSocket(false); /* block & check_stdin = false */
|
IFF(config.debug.enabled)
|
IFF(config.debug.enabled)
|
if (testsprbits(SPR_DMR1, SPR_DMR1_ST)) set_stall_state (1);
|
if (testsprbits(SPR_DMR1, SPR_DMR1_ST)) set_stall_state (1);
|
|
|
runtime.sim.cycles += runtime.sim.mem_cycles;
|
runtime.sim.cycles += runtime.sim.mem_cycles;
|
if (runtime.sim.cycles >= SCHED_PEEK().time) do_scheduler ();
|
if (runtime.sim.cycles >= SCHED_PEEK().time) do_scheduler ();
|
if (!runtime.sim.hush) dumpreg();
|
if (!runtime.sim.hush) dumpreg();
|
}
|
}
|
runtime.sim.hush = 0;
|
runtime.sim.hush = 0;
|
fflush(stdout);
|
fflush(stdout);
|
runtime.sim.fout = stdout;
|
runtime.sim.fout = stdout;
|
|
|
if (!runtime.sim.iprompt) /* non-interactive quit */
|
if (!runtime.sim.iprompt) /* non-interactive quit */
|
sim_done();
|
sim_done();
|
}
|
}
|
sim_done();
|
sim_done();
|
}
|
}
|
|
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|