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[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim/] [cpu/] [or32/] [op_ff1_op.h] - Diff between revs 1647 and 1765

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/* op_ff1_op.h -- Micro operations template for the ff1 instruction
/* op_ff1_op.h -- Micro operations template for the ff1 instruction
   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
 
 
This file is part of OpenRISC 1000 Architectural Simulator.
This file is part of OpenRISC 1000 Architectural Simulator.
 
 
This program is free software; you can redistribute it and/or modify
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
(at your option) any later version.
 
 
This program is distributed in the hope that it will be useful,
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 
 
 
__or_dynop void glue(glue(glue(op_ff1_, DST_T), _), SRC_T)(void)
__or_dynop void glue(glue(glue(op_ff1_, DST_T), _), SRC_T)(void)
{
{
  int i;
  int i;
 
 
  for(i = 0; i < 32; i++, SRC_T >>= 1) {
  for(i = 0; i < 32; i++, SRC_T >>= 1) {
    if(SRC_T & 1) {
    if(SRC_T & 1) {
      DST_T = i;
      DST_T = i;
      break;
      break;
    }
    }
  }
  }
 
 
  FORCE_RET;
  FORCE_RET;
}
}
 
 
 
 
 
 

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