/* sim.cfg -- Simulator configuration script file
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/* sim.cfg -- Simulator configuration script file
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Copyright (C) 2001, Marko Mlinar, markom@opencores.org
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Copyright (C) 2001, Marko Mlinar, markom@opencores.org
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This file includes a lot of help about configurations and default one
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This file includes a lot of help about configurations and default one
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* INTRODUCTION
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/* INTRODUCTION
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The or1ksim have various parameters, which can be set in configuration
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The or1ksim have various parameters, which can be set in configuration
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files. Multiple configurations may be used and switched between at
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files. Multiple configurations may be used and switched between at
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or1ksim startup.
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or1ksim startup.
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By default, or1ksim loads condfiguration file from './sim.cfg' and if not
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By default, or1ksim loads condfiguration file from './sim.cfg' and if not
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found it checks '~/.or1k/sim.cfg'. If even this file is not found or
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found it checks '~/.or1k/sim.cfg'. If even this file is not found or
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all parameters are not defined, default configuration is used.
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all parameters are not defined, default configuration is used.
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Users should not rely on default configuration, but rather redefine all
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Users should not rely on default configuration, but rather redefine all
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critical settings, since default configuration may differ in newer
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critical settings, since default configuration may differ in newer
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versions of the or1ksim.
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versions of the or1ksim.
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If multiple configurations are used, user can switch between them by
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If multiple configurations are used, user can switch between them by
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supplying -f option when starting simulator.
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supplying -f option when starting simulator.
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This file may contain (standard C) only comments - no // support.
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This file may contain (standard C) only comments - no // support.
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Configure files can also be included, using:
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Configure files can also be included, using:
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include "file_name_to_include"
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include "file_name_to_include"
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Like normal configuration file, this file is divided in sections,
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Like normal configuration file, this file is divided in sections,
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where each section is described in detail also.
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where each section is described in detail also.
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Some section also have subsections. One example of such subsection is
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Some section also have subsections. One example of such subsection is
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block:
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block:
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device
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device
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instance specific parameters...
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instance specific parameters...
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enddevice
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enddevice
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which creates a device instance.
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which creates a device instance.
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*/
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*/
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/* MEMORY SECTION
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/* MEMORY SECTION
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This section specifies how is initial memory generated and which blocks
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This section specifies how is initial memory generated and which blocks
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it consist of.
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it consist of.
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type = random/unknown/pattern
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type = random/unknown/pattern
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specifies the initial memory values. 'random' parameter generate
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specifies the initial memory values. 'random' parameter generate
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random memory using seed 'random_seed' parameter. 'pattern' parameter
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random memory using seed 'random_seed' parameter. 'pattern' parameter
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fills memory with 'pattern' parameter and 'unknown' does not specify
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fills memory with 'pattern' parameter and 'unknown' does not specify
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how memory should be generated - the fastest option.
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how memory should be generated - the fastest option.
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random_seed =
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random_seed =
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random seed for randomizer, used if type = random
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random seed for randomizer, used if type = random
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pattern =
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pattern =
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pattern to fill memory, used if type = pattern
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pattern to fill memory, used if type = pattern
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nmemories =
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nmemories =
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number of memory instances connected
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number of memory instances connected
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instance specific:
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instance specific:
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baseaddr =
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baseaddr =
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memory start address
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memory start address
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size =
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size =
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memory size
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memory size
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name = ""
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name = ""
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memory block name
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memory block name
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ce =
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ce =
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chip enable index of the memory instance
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chip enable index of the memory instance
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delayr =
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delayr =
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cycles, required for read access, -1 if instance does not support reading
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cycles, required for read access, -1 if instance does not support reading
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delayw =
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delayw =
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cycles, required for write access, -1 if instance does not support writing
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cycles, required for write access, -1 if instance does not support writing
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16550 = 0/1
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16550 = 0/1
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0, if this device is uart 16450 and 1, if it is 16550
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0, if this device is uart 16450 and 1, if it is 16550
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log = ""
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log = ""
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filename, where to log memory accesses to, no log, if log command is not specified
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filename, where to log memory accesses to, no log, if log command is not specified
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*/
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*/
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section memory
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section memory
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/*random_seed = 12345
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/*random_seed = 12345
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type = random*/
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type = random*/
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pattern = 0x00
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pattern = 0x00
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type = unknown /* Fastest */
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type = unknown /* Fastest */
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nmemories = 2
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nmemories = 2
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device 0
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device 0
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name = "FLASH"
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name = "FLASH"
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ce = 0
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ce = 0
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baseaddr = 0x00000000
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baseaddr = 0x00000000
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size = 0x000200000
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size = 0x000200000
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delayr = 10
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delayr = 10
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delayw = -1
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delayw = -1
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enddevice
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enddevice
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device 1
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device 1
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name = "RAM"
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name = "RAM"
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ce = 1
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ce = 1
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baseaddr = 0x04000000
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baseaddr = 0x04000000
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size = 0x04000000
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size = 0x04000000
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delayr = 2
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delayr = 2
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delayw = 4
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delayw = 4
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enddevice
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enddevice
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end
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end
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/* IMMU SECTION
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/* IMMU SECTION
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This section configures Instruction Memory Menangement Unit
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This section configures Instruction Memory Menangement Unit
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enabled = 0/1
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enabled = 0/1
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whether IMMU is enabled
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whether IMMU is enabled
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(NOTE: UPR bit is set)
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(NOTE: UPR bit is set)
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nsets =
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nsets =
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number of ITLB sets; must be power of two
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number of ITLB sets; must be power of two
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nways =
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nways =
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number of ITLB ways
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number of ITLB ways
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pagesize =
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pagesize =
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instruction page size; must be power of two
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instruction page size; must be power of two
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entrysize =
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entrysize =
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instruction entry size in bytes
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instruction entry size in bytes
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ustates =
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ustates =
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number of ITLB usage states (2, 3, 4 etc., max is 4)
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number of ITLB usage states (2, 3, 4 etc., max is 4)
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hitdelay =
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hitdelay =
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number of cycles immu hit costs
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number of cycles immu hit costs
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missdelay =
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missdelay =
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number of cycles immu miss costs
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number of cycles immu miss costs
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*/
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*/
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section immu
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section immu
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enabled = 0
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enabled = 0
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nsets = 32
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nsets = 32
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nways = 1
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nways = 1
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pagesize = 8192
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pagesize = 8192
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hitdelay = 0
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hitdelay = 0
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missdelay = 0
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missdelay = 0
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end
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end
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/* DMMU SECTION
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/* DMMU SECTION
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This section configures Data Memory Menangement Unit
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This section configures Data Memory Menangement Unit
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enabled = 0/1
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enabled = 0/1
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whether DMMU is enabled
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whether DMMU is enabled
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(NOTE: UPR bit is set)
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(NOTE: UPR bit is set)
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nsets =
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nsets =
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number of DTLB sets; must be power of two
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number of DTLB sets; must be power of two
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nways =
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nways =
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number of DTLB ways
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number of DTLB ways
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pagesize =
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pagesize =
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data page size; must be power of two
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data page size; must be power of two
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entrysize =
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entrysize =
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data entry size in bytes
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data entry size in bytes
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ustates =
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ustates =
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number of DTLB usage states (2, 3, 4 etc., max is 4)
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number of DTLB usage states (2, 3, 4 etc., max is 4)
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hitdelay =
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hitdelay =
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number of cycles immu hit costs
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number of cycles immu hit costs
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missdelay =
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missdelay =
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number of cycles immu miss costs
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number of cycles immu miss costs
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*/
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*/
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section dmmu
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section dmmu
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enabled = 0
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enabled = 0
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nsets = 32
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nsets = 32
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nways = 1
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nways = 1
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pagesize = 8192
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pagesize = 8192
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hitdelay = 0
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hitdelay = 0
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missdelay = 0
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missdelay = 0
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end
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end
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/* IC SECTION
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/* IC SECTION
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This section configures Instruction Cache
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This section configures Instruction Cache
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enabled = 0/1
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enabled = 0/1
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whether IC is enabled
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whether IC is enabled
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(NOTE: UPR bit is set)
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(NOTE: UPR bit is set)
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nsets =
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nsets =
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number of IC sets; must be power of two
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number of IC sets; must be power of two
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nways =
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nways =
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number of IC ways
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number of IC ways
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blocksize =
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blocksize =
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IC block size in bytes; must be power of two
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IC block size in bytes; must be power of two
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ustates =
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ustates =
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number of IC usage states (2, 3, 4 etc., max is 4)
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number of IC usage states (2, 3, 4 etc., max is 4)
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hitdelay =
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hitdelay =
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number of cycles ic hit costs
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number of cycles ic hit costs
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missdelay =
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missdelay =
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number of cycles ic miss costs
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number of cycles ic miss costs
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*/
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*/
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section ic
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section ic
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enabled = 0
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enabled = 0
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nsets = 512
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nsets = 512
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nways = 1
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nways = 1
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blocksize = 16
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blocksize = 16
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hitdelay = 0
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hitdelay = 0
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missdelay = 0
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missdelay = 0
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end
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end
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/* DC SECTION
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/* DC SECTION
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This section configures Data Cache
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This section configures Data Cache
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enabled = 0/1
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enabled = 0/1
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whether DC is enabled
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whether DC is enabled
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(NOTE: UPR bit is set)
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(NOTE: UPR bit is set)
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nsets =
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nsets =
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number of DC sets; must be power of two
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number of DC sets; must be power of two
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nways =
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nways =
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number of DC ways
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number of DC ways
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blocksize =
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blocksize =
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DC block size in bytes; must be power of two
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DC block size in bytes; must be power of two
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ustates =
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ustates =
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number of DC usage states (2, 3, 4 etc., max is 4)
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number of DC usage states (2, 3, 4 etc., max is 4)
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load_hitdelay =
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load_hitdelay =
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number of cycles dc load hit costs
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number of cycles dc load hit costs
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load_missdelay =
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load_missdelay =
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number of cycles dc load miss costs
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number of cycles dc load miss costs
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store_hitdelay =
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store_hitdelay =
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number of cycles dc load hit costs
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number of cycles dc load hit costs
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store_missdelay =
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store_missdelay =
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number of cycles dc load miss costs
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number of cycles dc load miss costs
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*/
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*/
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section dc
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section dc
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enabled = 0
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enabled = 0
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nsets = 512
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nsets = 512
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nways = 1
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nways = 1
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blocksize = 16
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blocksize = 16
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load_hitdelay = 0
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load_hitdelay = 0
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load_missdelay = 0
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load_missdelay = 0
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store_hitdelay = 0
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store_hitdelay = 0
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store_missdelay = 0
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store_missdelay = 0
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end
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end
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/* SIM SECTION
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/* SIM SECTION
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This section specifies how should sim behave.
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This section specifies how should sim behave.
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verbose = 0/1
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verbose = 0/1
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whether to print out extra messages
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whether to print out extra messages
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debug = 0-9
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debug = 0-9
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= 0 disabled debug messages
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= 0 disabled debug messages
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1-9 level of sim debug information, greater the number more verbose is
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1-9 level of sim debug information, greater the number more verbose is
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the output
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the output
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profile = 0/1
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profile = 0/1
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whether to generate profiling file 'sim.profile'
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whether to generate profiling file 'sim.profile'
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prof_fn = ""
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prof_fn = ""
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filename, where to generate profiling info, used
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filename, where to generate profiling info, used
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only if 'profile' is set
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only if 'profile' is set
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mprofile = 0/1
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mprofile = 0/1
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whether to generate memory profiling file 'sim.mprofile'
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whether to generate memory profiling file 'sim.mprofile'
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mprof_fn = ""
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mprof_fn = ""
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filename, where to generate memory profiling info, used
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filename, where to generate memory profiling info, used
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only if 'mprofile' is set
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only if 'mprofile' is set
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history = 0/1
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history = 0/1
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whether instruction execution flow is tracked for
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whether instruction execution flow is tracked for
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display by simulator hist command. Useful for
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display by simulator hist command. Useful for
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back-trace debugging.
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back-trace debugging.
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iprompt = 0/1
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iprompt = 0/1
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whether we strart in interactive prompt
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whether we strart in interactive prompt
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exe_log = 0/1
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exe_log = 0/1
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whether execution log should be generated
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whether execution log should be generated
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exe_log_fn = ""
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exe_log_fn = ""
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where to put execution log in, used only if 'exe_log'
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where to put execution log in, used only if 'exe_log'
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is set
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is set
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spr_log = 0/1
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spr_log = 0/1
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whether log of writes/reads to/from sprs should be generated
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whether log of writes/reads to/from sprs should be generated
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spr_log_fn = ""
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spr_log_fn = ""
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where to put sprs writes/reads in log, used only if 'spr_log'
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where to put sprs writes/reads in log, used only if 'spr_log'
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is set
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is set
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clkcycle = [ps|ns|us|ms]
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clkcycle = [ps|ns|us|ms]
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specifies time measurement for one cycle
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specifies time measurement for one cycle
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*/
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*/
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section sim
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section sim
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/* verbose = 1 */
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/* verbose = 1 */
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debug = 0
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debug = 0
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profile = 1
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profile = 1
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prof_fn = "sim.profile"
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prof_fn = "sim.profile"
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mprofile = 1
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mprofile = 1
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mprof_fn = "sim.mprofile"
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mprof_fn = "sim.mprofile"
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history = 1
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history = 1
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/* iprompt = 0 */
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/* iprompt = 0 */
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exe_log = 0
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exe_log = 0
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exe_log_fn = "executed.log"
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exe_log_fn = "executed.log"
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spr_log = 0
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spr_log = 0
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spr_log_fn = "spr.log"
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spr_log_fn = "spr.log"
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clkcycle = 100ns
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clkcycle = 100ns
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end
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end
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/* SECTION VAPI
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/* SECTION VAPI
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This section configures Verification API, used for Advanced
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This section configures Verification API, used for Advanced
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Core Verification.
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Core Verification.
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enabled = 0/1
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enabled = 0/1
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whether to start VAPI server
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whether to start VAPI server
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server_port =
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server_port =
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TCP/IP port to start VAPI server on
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TCP/IP port to start VAPI server on
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log_enabled = 0/1
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log_enabled = 0/1
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whether logging of VAPI requests is enabled
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whether logging of VAPI requests is enabled
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hide_device_id = 0/1
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hide_device_id = 0/1
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whether to disable logging of device id (for compatability with old version)
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whether to disable logging of device id (for compatability with old version)
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vapi_fn =
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vapi_fn =
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specifies filename where to log into, if log_enabled is selected
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specifies filename where to log into, if log_enabled is selected
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*/
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*/
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section VAPI
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section VAPI
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enabled = 0
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enabled = 0
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server_port = 9998
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server_port = 9998
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log_enabled = 0
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log_enabled = 0
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vapi_log_fn = "vapi.log"
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vapi_log_fn = "vapi.log"
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end
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end
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/* CPU SECTION
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/* CPU SECTION
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|
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This section specifies various CPU parameters.
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This section specifies various CPU parameters.
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ver =
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ver =
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rev =
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rev =
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specifies version and revision of the CPU used
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specifies version and revision of the CPU used
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upr =
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upr =
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changes the upr register
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changes the upr register
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sr =
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sr =
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sets the initial Supervision Register value
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sets the initial Supervision Register value
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superscalar = 0/1
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superscalar = 0/1
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whether CPU is scalar or superscalar
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whether CPU is scalar or superscalar
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(modify cpu/or32/execute.c to tune superscalar model)
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(modify cpu/or32/execute.c to tune superscalar model)
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hazards = 0/1
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hazards = 0/1
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whether data hazards are tracked in superscalar CPU
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whether data hazards are tracked in superscalar CPU
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and displayed by the simulator r command
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and displayed by the simulator r command
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dependstats = 0/1
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dependstats = 0/1
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whether inter-instruction dependencies are calculated
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whether inter-instruction dependencies are calculated
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and displayed by simulator stats command.
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and displayed by simulator stats command.
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raw_range =
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raw_range =
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range in cycles for raw register over time analysis, 0 = disabled
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range in cycles for raw register over time analysis, 0 = disabled
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sbuf_len =
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sbuf_len =
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length of store buffer (<= 256), 0 = disabled
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length of store buffer (<= 256), 0 = disabled
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*/
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*/
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section cpu
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section cpu
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ver = 0x1200
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ver = 0x1200
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rev = 0x0001
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rev = 0x0001
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/* upr = */
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/* upr = */
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sr = 0x00008003
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sr = 0x00008003
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superscalar = 0
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superscalar = 0
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hazards = 0
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hazards = 0
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dependstats = 0
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dependstats = 0
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raw_range = 0
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raw_range = 0
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sbuf_len = 0
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sbuf_len = 0
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end
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end
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/* PM SECTION
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/* PM SECTION
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|
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This section specifies Power Menagement paramaters
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This section specifies Power Menagement paramaters
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|
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enabled = 0/1
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enabled = 0/1
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whether power menagement is enabled
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whether power menagement is enabled
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*/
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*/
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section pm
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section pm
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enabled = 0
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enabled = 0
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end
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end
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/* BPB SECTION
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/* BPB SECTION
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|
|
This section specifies how branch prediction should behave.
|
This section specifies how branch prediction should behave.
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|
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enabled = 0/1
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enabled = 0/1
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whether bpb is enabled
|
whether bpb is enabled
|
|
|
btic = 0/1
|
btic = 0/1
|
enable branch target instruction cache model
|
enable branch target instruction cache model
|
|
|
sbp_bf_fwd = 0/1
|
sbp_bf_fwd = 0/1
|
whether static branch prediction for l.bf uses forward prediction
|
whether static branch prediction for l.bf uses forward prediction
|
|
|
sbp_bnf_fwd = 0/1
|
sbp_bnf_fwd = 0/1
|
whether static branch prediction for l.bnf uses forward prediction
|
whether static branch prediction for l.bnf uses forward prediction
|
|
|
hitdelay =
|
hitdelay =
|
number of cycles bpb hit costs
|
number of cycles bpb hit costs
|
|
|
missdelay =
|
missdelay =
|
number of cycles bpb miss costs
|
number of cycles bpb miss costs
|
*/
|
*/
|
|
|
section bpb
|
section bpb
|
enabled = 0
|
enabled = 0
|
btic = 0
|
btic = 0
|
sbp_bf_fwd = 0
|
sbp_bf_fwd = 0
|
sbp_bnf_fwd = 0
|
sbp_bnf_fwd = 0
|
hitdelay = 0
|
hitdelay = 0
|
missdelay = 0
|
missdelay = 0
|
end
|
end
|
|
|
|
|
/* DEBUG SECTION
|
/* DEBUG SECTION
|
|
|
This sections specifies how debug unit should behave.
|
This sections specifies how debug unit should behave.
|
|
|
enabled = 0/1
|
enabled = 0/1
|
whether debug unit is enabled
|
whether debug unit is enabled
|
|
|
gdb_enabled = 0/1
|
gdb_enabled = 0/1
|
whether to start gdb server at 'server_port' port
|
whether to start gdb server at 'server_port' port
|
|
|
server_port =
|
server_port =
|
TCP/IP port to start gdb server on, used only if gdb_enabled
|
TCP/IP port to start gdb server on, used only if gdb_enabled
|
is set
|
is set
|
|
|
vapi_id =
|
vapi_id =
|
Used to create "fake" vapi log file containing the JTAG proxy messages.
|
Used to create "fake" vapi log file containing the JTAG proxy messages.
|
*/
|
*/
|
|
|
section debug
|
section debug
|
enabled = 0
|
enabled = 0
|
gdb_enabled = 0
|
gdb_enabled = 0
|
server_port = 9999
|
server_port = 9999
|
vapi_id = 0xFFFF
|
vapi_id = 0xFFFF
|
end
|
end
|
|
|
|
|
/* MC SECTION
|
/* MC SECTION
|
|
|
This section configures the memory controller
|
This section configures the memory controller
|
|
|
enabled = 0/1
|
enabled = 0/1
|
whether memory controller is enabled
|
whether memory controller is enabled
|
|
|
baseaddr =
|
baseaddr =
|
address of first MC register
|
address of first MC register
|
|
|
POC =
|
POC =
|
Power On Configuration register
|
Power On Configuration register
|
*/
|
*/
|
|
|
section mc
|
section mc
|
enabled = 1
|
enabled = 1
|
baseaddr = 0x60000000
|
baseaddr = 0x60000000
|
POC = 0x00000008 /* Power on configuration register */
|
POC = 0x00000008 /* Power on configuration register */
|
end
|
end
|
|
|
|
|
/* UART SECTION
|
/* UART SECTION
|
|
|
This section configures UARTs
|
This section configures UARTs
|
|
|
nuarts =
|
nuarts =
|
make specified number of instances, configure each
|
make specified number of instances, configure each
|
instance within device - enddevice construct.
|
instance within device - enddevice construct.
|
|
|
instance specific:
|
instance specific:
|
baseaddr =
|
baseaddr =
|
address of first UART register for this device
|
address of first UART register for this device
|
|
|
rx_file = ""
|
rxfile = ""
|
filename, where to read data from
|
filename, where to read data from
|
|
|
tx_file = ""
|
txfile = ""
|
filename, where to write data to
|
filename, where to write data to
|
|
|
irq =
|
irq =
|
irq number for this device
|
irq number for this device
|
|
|
16550 = 0/1
|
16550 = 0/1
|
0, if this device is uart 16450 and 1, if it is 16550
|
0, if this device is uart 16450 and 1, if it is 16550
|
|
|
jitter =
|
jitter =
|
in msecs... time to block, -1 to disable it
|
in msecs... time to block, -1 to disable it
|
|
|
vapi_id =
|
vapi_id =
|
VAPI id of this instance
|
VAPI id of this instance
|
*/
|
*/
|
|
|
section uart
|
section uart
|
nuarts = 1
|
nuarts = 1
|
|
|
device 0
|
device 0
|
baseaddr = 0x90000000
|
baseaddr = 0x90000000
|
irq = 2
|
irq = 2
|
rxfile = "/tmp/uart0.rx"
|
rxfile = "/tmp/uart0.rx"
|
txfile = "/tmp/uart0.tx"
|
txfile = "/tmp/uart0.tx"
|
jitter = -1 /* async behaviour */
|
jitter = -1 /* async behaviour */
|
enddevice
|
enddevice
|
end
|
end
|
|
|
|
|
/* DMA SECTION
|
/* DMA SECTION
|
|
|
This section configures DMAs
|
This section configures DMAs
|
|
|
ndmas =
|
ndmas =
|
make specified number of instances, configure each
|
make specified number of instances, configure each
|
instance within device - enddevice construct.
|
instance within device - enddevice construct.
|
|
|
instance specific:
|
instance specific:
|
baseaddr =
|
baseaddr =
|
address of first DMA register for this device
|
address of first DMA register for this device
|
|
|
irq =
|
irq =
|
irq number for this device
|
irq number for this device
|
|
|
vapi_id =
|
vapi_id =
|
VAPI id of this instance
|
VAPI id of this instance
|
*/
|
*/
|
|
|
section dma
|
section dma
|
ndmas = 0
|
ndmas = 0
|
/*
|
/*
|
device 0
|
device 0
|
baseaddr = 0x90000000
|
baseaddr = 0x90000000
|
irq = 4
|
irq = 4
|
enddevice
|
enddevice
|
*/
|
*/
|
end
|
end
|
|
|
|
|
/* ETHERNET SECTION
|
/* ETHERNET SECTION
|
|
|
This section configures ethernets
|
This section configures ethernets
|
|
|
nethernets =
|
nethernets =
|
make specified number of instances, configure each
|
make specified number of instances, configure each
|
instance within device - enddevice construct.
|
instance within device - enddevice construct.
|
|
|
instance specific:
|
instance specific:
|
baseaddr =
|
baseaddr =
|
address of first ethernet register for this device
|
address of first ethernet register for this device
|
|
|
dma =
|
dma =
|
which controller is this ethernet "connected" to
|
which controller is this ethernet "connected" to
|
|
|
rx_channel =
|
rx_channel =
|
DMA channel used for RX
|
DMA channel used for RX
|
|
|
tx_channel =
|
tx_channel =
|
DMA channel used for TX
|
DMA channel used for TX
|
|
|
rx_file = ""
|
rxfile = ""
|
filename, where to read data from
|
filename, where to read data from
|
|
|
tx_file = ""
|
txfile = ""
|
filename, where to write data to
|
filename, where to write data to
|
|
|
vapi_id =
|
vapi_id =
|
VAPI id of this instance
|
VAPI id of this instance
|
*/
|
*/
|
|
|
section ethernet
|
section ethernet
|
nethernets = 0
|
nethernets = 0
|
|
|
/*
|
/*
|
device 0
|
device 0
|
baseaddr = 0x88000000
|
baseaddr = 0x88000000
|
dma = 0
|
dma = 0
|
tx_channel = 0
|
tx_channel = 0
|
rx_channel = 1
|
rx_channel = 1
|
rxfile = "/tmp/eth0.rx"
|
rxfile = "/tmp/eth0.rx"
|
txfile = "/tmp/eth0.tx"
|
txfile = "/tmp/eth0.tx"
|
enddevice
|
enddevice
|
*/
|
*/
|
end
|
end
|
|
|
/* GPIO SECTION
|
/* GPIO SECTION
|
|
|
This section configures GPIOs
|
This section configure GPIOs
|
|
|
ngpios =
|
ngpios =
|
make specified number of instances, configure each
|
make specified number of instances, configure each
|
instance within device - enddevice construct.
|
instance within device - enddevice construct.
|
|
|
instance specific:
|
instance specific:
|
baseaddr =
|
baseaddr =
|
address of first GPIO register for this device
|
address of first GPIO register for this device
|
|
|
irq =
|
irq =
|
irq number for this device
|
irq number for this device
|
|
|
base_vapi_id =
|
base_vapi_id =
|
first VAPI id of this instance
|
first VAPI id of this instance
|
GPIO uses 8 consecutive VAPI IDs
|
GPIO uses 8 consecutive VAPI IDs
|
*/
|
*/
|
|
|
section gpio
|
section gpio
|
ngpios = 1
|
ngpios = 1
|
|
|
device 0
|
device 0
|
baseaddr = 0xA0000000
|
baseaddr = 0xA0000000
|
irq = 23
|
irq = 23
|
base_vapi_id = 0x0200
|
base_vapi_id = 0x0200
|
enddevice
|
enddevice
|
end
|
end
|
|
|
/* TICK TIMER SECTION
|
/* TICK TIMER SECTION
|
|
|
This section configures tick timer
|
This section configures tick timer
|
|
|
enabled = 0/1
|
enabled = 0/1
|
whether tick timer is enabled
|
whether tick timer is enabled
|
*/
|
*/
|
|
|
section tick
|
section tick
|
enabled = 0
|
enabled = 0
|
end
|
end
|
|
|
/* VGA SECTION
|
/* VGA SECTION
|
|
|
This section configure VGA/LCD controller
|
This section configures VGA/LCD controller
|
|
|
nvgas =
|
nvgas =
|
number of VGA devices connected
|
number of VGA devices connected
|
|
|
instance specific:
|
instance specific:
|
baseaddr =
|
baseaddr =
|
address of first VGA register
|
address of first VGA register
|
|
|
irq =
|
irq =
|
irq number for this device
|
irq number for this device
|
|
|
refresh_rate =
|
refresh_rate =
|
number of cycles between screen dumps
|
number of cycles between screen dumps
|
|
|
filename = ""
|
filename = ""
|
template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
*/
|
*/
|
|
|
section vga
|
section vga
|
nvgas = 1
|
nvgas = 1
|
|
|
device 0
|
device 0
|
baseaddr = 0xb0000000
|
baseaddr = 0xb0000000
|
irq = 20
|
irq = 20
|
refresh_rate = 100000
|
refresh_rate = 100000
|
filename = "primary"
|
filename = "primary"
|
enddevice
|
enddevice
|
end
|
end
|
|
|
/* FB SECTION
|
/* FB SECTION
|
|
|
This section configure frame buffer
|
This section configures frame buffer
|
|
|
enabled = 0/1
|
enabled = 0/1
|
whether frame buffer is enabled
|
whether frame buffer is enabled
|
|
|
bufaddr =
|
baseaddr =
|
base address of frame buffer
|
base address of frame buffer
|
|
|
paladdr =
|
paladdr =
|
base address of first palette entry
|
base address of first palette entry
|
|
|
refresh_rate =
|
refresh_rate =
|
number of cycles between screen dumps
|
number of cycles between screen dumps
|
|
|
filename = ""
|
filename = ""
|
template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
template name for generated names (e.g. "primary" produces "primary0023.bmp")
|
*/
|
*/
|
|
|
section fb
|
section fb
|
enabled = 1
|
enabled = 1
|
baseaddr = 0xb8000000
|
baseaddr = 0xb8000000
|
refresh_rate = 100000
|
refresh_rate = 100000
|
filename = "primary"
|
filename = "primary"
|
end
|
end
|
|
|
|
/* KBD SECTION
|
|
|
|
This section configures PS/2 compatible keyboard
|
|
|
|
enabled = 0/1
|
|
whether keyboard is enabled
|
|
|
|
baseaddr =
|
|
base address of the keyboard device
|
|
|
|
rxfile = ""
|
|
filename, where to read data from
|
|
*/
|
|
|
|
section kbd
|
|
enabled = 1
|
|
irq = 21
|
|
baseaddr = 0xb1000000
|
|
rxfile = "/tmp/kbd.rx"
|
|
end
|
|
|
