/* ethernet.h -- Definition of types and structures for Ethernet MAC
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/* ethernet.h -- Definition of types and structures for Ethernet MAC
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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*/
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#ifndef __OR1KSIM_PERIPHERAL_ETHERNET_H
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#ifndef __OR1KSIM_PERIPHERAL_ETHERNET_H
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#define __OR1KSIM_PERIPHERAL_ETHERNET_H
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#define __OR1KSIM_PERIPHERAL_ETHERNET_H
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/* Exported function prototypes */
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void eth_reset( void );
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void eth_clock( void );
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void eth_status( void );
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/* Address space required by one Ethernet MAC */
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/* Address space required by one Ethernet MAC */
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#define ETH_ADDR_SPACE 0x1000
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#define ETH_ADDR_SPACE 0x1000
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/* Relative Register Addresses */
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/* Relative Register Addresses */
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#define ETH_MODER (4 * 0x00)
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#define ETH_MODER (4 * 0x00)
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#define ETH_INT_SOURCE (4 * 0x01)
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#define ETH_INT_SOURCE (4 * 0x01)
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#define ETH_INT_MASK (4 * 0x02)
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#define ETH_INT_MASK (4 * 0x02)
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#define ETH_IPGT (4 * 0x03)
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#define ETH_IPGT (4 * 0x03)
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#define ETH_IPGR1 (4 * 0x04)
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#define ETH_IPGR1 (4 * 0x04)
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#define ETH_IPGR2 (4 * 0x05)
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#define ETH_IPGR2 (4 * 0x05)
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#define ETH_PACKETLEN (4 * 0x06)
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#define ETH_PACKETLEN (4 * 0x06)
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#define ETH_COLLCONF (4 * 0x07)
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#define ETH_COLLCONF (4 * 0x07)
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#define ETH_TX_BD_NUM (4 * 0x08)
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#define ETH_TX_BD_NUM (4 * 0x08)
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#define ETH_CTRLMODER (4 * 0x09)
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#define ETH_CTRLMODER (4 * 0x09)
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#define ETH_MIIMODER (4 * 0x0A)
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#define ETH_MIIMODER (4 * 0x0A)
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#define ETH_MIICOMMAND (4 * 0x0B)
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#define ETH_MIICOMMAND (4 * 0x0B)
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#define ETH_MIIADDRESS (4 * 0x0C)
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#define ETH_MIIADDRESS (4 * 0x0C)
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#define ETH_MIITX_DATA (4 * 0x0D)
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#define ETH_MIITX_DATA (4 * 0x0D)
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#define ETH_MIIRX_DATA (4 * 0x0E)
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#define ETH_MIIRX_DATA (4 * 0x0E)
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#define ETH_MIISTATUS (4 * 0x0F)
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#define ETH_MIISTATUS (4 * 0x0F)
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#define ETH_MAC_ADDR0 (4 * 0x10)
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#define ETH_MAC_ADDR0 (4 * 0x10)
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#define ETH_MAC_ADDR1 (4 * 0x11)
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#define ETH_MAC_ADDR1 (4 * 0x11)
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#define ETH_HASH0 (4 * 0x12)
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#define ETH_HASH0 (4 * 0x12)
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#define ETH_HASH1 (4 * 0x13)
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#define ETH_HASH1 (4 * 0x13)
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/* Where BD's are stored */
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/* Where BD's are stored */
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#define ETH_BD_BASE 0x400
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#define ETH_BD_BASE 0x400
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#define ETH_BD_COUNT 0x100
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#define ETH_BD_COUNT 0x100
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#define ETH_BD_SPACE (4 * ETH_BD_COUNT)
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#define ETH_BD_SPACE (4 * ETH_BD_COUNT)
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/* Where to point DMA to transmit/receive */
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/* Where to point DMA to transmit/receive */
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#define ETH_DMA_RX_TX 0x800
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#define ETH_DMA_RX_TX 0x800
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/* Field definitions for MODER */
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/* Field definitions for MODER */
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#define ETH_MODER_DMAEN_OFFSET 17
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#define ETH_MODER_DMAEN_OFFSET 17
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#define ETH_MODER_RECSMALL_OFFSET 16
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#define ETH_MODER_RECSMALL_OFFSET 16
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#define ETH_MODER_PAD_OFFSET 15
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#define ETH_MODER_PAD_OFFSET 15
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#define ETH_MODER_HUGEN_OFFSET 14
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#define ETH_MODER_HUGEN_OFFSET 14
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#define ETH_MODER_CRCEN_OFFSET 13
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#define ETH_MODER_CRCEN_OFFSET 13
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#define ETH_MODER_DLYCRCEN_OFFSET 12
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#define ETH_MODER_DLYCRCEN_OFFSET 12
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#define ETH_MODER_RST_OFFSET 11
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#define ETH_MODER_RST_OFFSET 11
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#define ETH_MODER_FULLD_OFFSET 10
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#define ETH_MODER_FULLD_OFFSET 10
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#define ETH_MODER_EXDFREN_OFFSET 9
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#define ETH_MODER_EXDFREN_OFFSET 9
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#define ETH_MODER_NOBCKOF_OFFSET 8
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#define ETH_MODER_NOBCKOF_OFFSET 8
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#define ETH_MODER_LOOPBCK_OFFSET 7
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#define ETH_MODER_LOOPBCK_OFFSET 7
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#define ETH_MODER_IFG_OFFSET 6
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#define ETH_MODER_IFG_OFFSET 6
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#define ETH_MODER_PRO_OFFSET 5
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#define ETH_MODER_PRO_OFFSET 5
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#define ETH_MODER_IAM_OFFSET 4
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#define ETH_MODER_IAM_OFFSET 4
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#define ETH_MODER_BRO_OFFSET 3
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#define ETH_MODER_BRO_OFFSET 3
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#define ETH_MODER_NOPRE_OFFSET 2
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#define ETH_MODER_NOPRE_OFFSET 2
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#define ETH_MODER_TXEN_OFFSET 1
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#define ETH_MODER_TXEN_OFFSET 1
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#define ETH_MODER_RXEN_OFFSET 0
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#define ETH_MODER_RXEN_OFFSET 0
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/* Field definitions for INT_SOURCE */
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/* Field definitions for INT_SOURCE */
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#define ETH_INT_SOURCE_RXC_OFFSET 6
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#define ETH_INT_SOURCE_RXC_OFFSET 6
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#define ETH_INT_SOURCE_TXC_OFFSET 5
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#define ETH_INT_SOURCE_TXC_OFFSET 5
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#define ETH_INT_SOURCE_BUSY_OFFSET 4
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#define ETH_INT_SOURCE_BUSY_OFFSET 4
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#define ETH_INT_SOURCE_RXE_OFFSET 3
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#define ETH_INT_SOURCE_RXE_OFFSET 3
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#define ETH_INT_SOURCE_RXB_OFFSET 2
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#define ETH_INT_SOURCE_RXB_OFFSET 2
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#define ETH_INT_SOURCE_TXE_OFFSET 1
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#define ETH_INT_SOURCE_TXE_OFFSET 1
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#define ETH_INT_SOURCE_TXB_OFFSET 0
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#define ETH_INT_SOURCE_TXB_OFFSET 0
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/* Field definitions for INT_MASK */
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/* Field definitions for INT_MASK */
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#define ETH_INT_MASK_RXC_M_OFFSET 6
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#define ETH_INT_MASK_RXC_M_OFFSET 6
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#define ETH_INT_MASK_TXC_M_OFFSET 5
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#define ETH_INT_MASK_TXC_M_OFFSET 5
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#define ETH_INT_MASK_BUSY_M_OFFSET 4
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#define ETH_INT_MASK_BUSY_M_OFFSET 4
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#define ETH_INT_MASK_RXE_M_OFFSET 3
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#define ETH_INT_MASK_RXE_M_OFFSET 3
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#define ETH_INT_MASK_RXB_M_OFFSET 2
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#define ETH_INT_MASK_RXB_M_OFFSET 2
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#define ETH_INT_MASK_TXE_M_OFFSET 1
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#define ETH_INT_MASK_TXE_M_OFFSET 1
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#define ETH_INT_MASK_TXB_M_OFFSET 0
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#define ETH_INT_MASK_TXB_M_OFFSET 0
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/* Field definitions for PACKETLEN */
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/* Field definitions for PACKETLEN */
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#define ETH_PACKETLEN_MINFL_OFFSET 16
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#define ETH_PACKETLEN_MINFL_OFFSET 16
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#define ETH_PACKETLEN_MINFL_WIDTH 16
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#define ETH_PACKETLEN_MINFL_WIDTH 16
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#define ETH_PACKETLEN_MAXFL_OFFSET 0
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#define ETH_PACKETLEN_MAXFL_OFFSET 0
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#define ETH_PACKETLEN_MAXFL_WIDTH 16
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#define ETH_PACKETLEN_MAXFL_WIDTH 16
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/* Field definitions for COLLCONF */
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/* Field definitions for COLLCONF */
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#define ETH_COLLCONF_MAXRET_OFFSET 16
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#define ETH_COLLCONF_MAXRET_OFFSET 16
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#define ETH_COLLCONF_MAXRET_WIDTH 4
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#define ETH_COLLCONF_MAXRET_WIDTH 4
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#define ETH_COLLCONF_COLLVALID_OFFSET 0
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#define ETH_COLLCONF_COLLVALID_OFFSET 0
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#define ETH_COLLCONF_COLLVALID_WIDTH 6
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#define ETH_COLLCONF_COLLVALID_WIDTH 6
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/* Field definitions for CTRLMODER */
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/* Field definitions for CTRLMODER */
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#define ETH_CMODER_TXFLOW_OFFSET 2
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#define ETH_CMODER_TXFLOW_OFFSET 2
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#define ETH_CMODER_RXFLOW_OFFSET 1
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#define ETH_CMODER_RXFLOW_OFFSET 1
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#define ETH_CMODER_PASSALL_OFFSET 0
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#define ETH_CMODER_PASSALL_OFFSET 0
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/* Field definitions for MIIMODER */
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/* Field definitions for MIIMODER */
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#define ETH_MIIMODER_MRST_OFFSET 9
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#define ETH_MIIMODER_MRST_OFFSET 9
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#define ETH_MIIMODER_NOPRE_OFFSET 8
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#define ETH_MIIMODER_NOPRE_OFFSET 8
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#define ETH_MIIMODER_CLKDIV_OFFSET 0
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#define ETH_MIIMODER_CLKDIV_OFFSET 0
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#define ETH_MIIMODER_CLKDIV_WIDTH 8
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#define ETH_MIIMODER_CLKDIV_WIDTH 8
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/* Field definitions for MIICOMMAND */
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/* Field definitions for MIICOMMAND */
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#define ETH_MIICOMM_WCDATA_OFFSET 2
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#define ETH_MIICOMM_WCDATA_OFFSET 2
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#define ETH_MIICOMM_RSTAT_OFFSET 1
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#define ETH_MIICOMM_RSTAT_OFFSET 1
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#define ETH_MIICOMM_SCANS_OFFSET 0
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#define ETH_MIICOMM_SCANS_OFFSET 0
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/* Field definitions for MIIADDRESS */
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/* Field definitions for MIIADDRESS */
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#define ETH_MIIADDR_RGAD_OFFSET 8
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#define ETH_MIIADDR_RGAD_OFFSET 8
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#define ETH_MIIADDR_RGAD_WIDTH 5
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#define ETH_MIIADDR_RGAD_WIDTH 5
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#define ETH_MIIADDR_FIAD_OFFSET 0
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#define ETH_MIIADDR_FIAD_OFFSET 0
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#define ETH_MIIADDR_FIAD_WIDTH 5
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#define ETH_MIIADDR_FIAD_WIDTH 5
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/* Field definitions for MIISTATUS */
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/* Field definitions for MIISTATUS */
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#define ETH_MIISTAT_NVALID_OFFSET 1
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#define ETH_MIISTAT_NVALID_OFFSET 1
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#define ETH_MIISTAT_BUSY_OFFSET 1
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#define ETH_MIISTAT_BUSY_OFFSET 1
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#define ETH_MIISTAT_FAIL_OFFSET 0
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#define ETH_MIISTAT_FAIL_OFFSET 0
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/* Field definitions for TX buffer descriptors */
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/* Field definitions for TX buffer descriptors */
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#define ETH_TX_BD_LENGTH_OFFSET 16
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#define ETH_TX_BD_LENGTH_OFFSET 16
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#define ETH_TX_BD_LENGTH_WIDTH 16
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#define ETH_TX_BD_LENGTH_WIDTH 16
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#define ETH_TX_BD_READY_OFFSET 15
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#define ETH_TX_BD_READY_OFFSET 15
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#define ETH_TX_BD_IRQ_OFFSET 14
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#define ETH_TX_BD_IRQ_OFFSET 14
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#define ETH_TX_BD_WRAP_OFFSET 13
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#define ETH_TX_BD_WRAP_OFFSET 13
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#define ETH_TX_BD_PAD_OFFSET 12
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#define ETH_TX_BD_PAD_OFFSET 12
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#define ETH_TX_BD_CRC_OFFSET 11
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#define ETH_TX_BD_CRC_OFFSET 11
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#define ETH_TX_BD_LAST_OFFSET 10
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#define ETH_TX_BD_LAST_OFFSET 10
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#define ETH_TX_BD_PAUSE_OFFSET 9
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#define ETH_TX_BD_PAUSE_OFFSET 9
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#define ETH_TX_BD_UNDERRUN_OFFSET 8
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#define ETH_TX_BD_UNDERRUN_OFFSET 8
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#define ETH_TX_BD_RETRY_OFFSET 4
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#define ETH_TX_BD_RETRY_OFFSET 4
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#define ETH_TX_BD_RETRY_WIDTH 4
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#define ETH_TX_BD_RETRY_WIDTH 4
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#define ETH_TX_BD_RETRANSMIT_OFFSET 3
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#define ETH_TX_BD_RETRANSMIT_OFFSET 3
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#define ETH_TX_BD_COLLISION_OFFSET 2
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#define ETH_TX_BD_COLLISION_OFFSET 2
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#define ETH_TX_BD_DEFER_OFFSET 1
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#define ETH_TX_BD_DEFER_OFFSET 1
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#define ETH_TX_BD_NO_CARRIER_OFFSET 0
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#define ETH_TX_BD_NO_CARRIER_OFFSET 0
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/* Field definitions for RX buffer descriptors */
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/* Field definitions for RX buffer descriptors */
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#define ETH_RX_BD_LENGTH_OFFSET 16
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#define ETH_RX_BD_LENGTH_OFFSET 16
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#define ETH_RX_BD_LENGTH_WIDTH 16
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#define ETH_RX_BD_LENGTH_WIDTH 16
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#define ETH_RX_BD_READY_OFFSET 15
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#define ETH_RX_BD_READY_OFFSET 15
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#define ETH_RX_BD_IRQ_OFFSET 14
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#define ETH_RX_BD_IRQ_OFFSET 14
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#define ETH_RX_BD_WRAP_OFFSET 13
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#define ETH_RX_BD_WRAP_OFFSET 13
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#define ETH_RX_BD_MISS_OFFSET 7
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#define ETH_RX_BD_MISS_OFFSET 7
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#define ETH_RX_BD_UVERRUN_OFFSET 6
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#define ETH_RX_BD_UVERRUN_OFFSET 6
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#define ETH_RX_BD_INVALID_OFFSET 5
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#define ETH_RX_BD_INVALID_OFFSET 5
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#define ETH_RX_BD_DRIBBLE_OFFSET 4
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#define ETH_RX_BD_DRIBBLE_OFFSET 4
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#define ETH_RX_BD_TOOBIG_OFFSET 3
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#define ETH_RX_BD_TOOBIG_OFFSET 3
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#define ETH_RX_BD_TOOSHORT_OFFSET 2
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#define ETH_RX_BD_TOOSHORT_OFFSET 2
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#define ETH_RX_BD_CRC_OFFSET 1
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#define ETH_RX_BD_CRC_OFFSET 1
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#define ETH_RX_BD_COLLISION_OFFSET 0
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#define ETH_RX_BD_COLLISION_OFFSET 0
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#endif /* __OR1KSIM_PERIPHERAL_ETHERNET_H */
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#endif /* __OR1KSIM_PERIPHERAL_ETHERNET_H */
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