/* execute.h -- Header file for architecture dependent execute.c
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/* execute.h -- Header file for architecture dependent execute.c
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#if DYNAMIC_EXECUTION
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#if DYNAMIC_EXECUTION
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#include "dyn_rec.h"
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#include "dyn_rec.h"
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#endif
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#endif
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struct cpu_state {
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struct cpu_state {
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/* General purpose registers. */
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/* General purpose registers. */
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uorreg_t reg[MAX_GPRS];
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uorreg_t reg[MAX_GPRS];
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/* Sprs */
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/* Sprs */
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uorreg_t sprs[MAX_SPRS];
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uorreg_t sprs[MAX_SPRS];
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/* Effective address of instructions that have an effective address. This is
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/* Effective address of instructions that have an effective address. This is
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* only used to get dump_exe_log correct */
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* only used to get dump_exe_log correct */
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oraddr_t insn_ea;
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oraddr_t insn_ea;
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/* Is current instruction in execution in a delay slot? */
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/* Is current instruction in execution in a delay slot? */
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int delay_insn;
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int delay_insn;
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/* Program counter (and translated PC) */
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/* Program counter (and translated PC) */
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oraddr_t pc;
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oraddr_t pc;
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/* Delay instruction effective address register */
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/* Delay instruction effective address register */
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oraddr_t pc_delay;
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oraddr_t pc_delay;
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/* Decoding of the just executed instruction. Only used in analysis(). */
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/* Decoding of the just executed instruction. Only used in analysis(). */
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struct iqueue_entry iqueue;
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struct iqueue_entry iqueue;
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/* decoding of the instruction that was executed before this one. Only used
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/* decoding of the instruction that was executed before this one. Only used
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* in analysis(). */
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* in analysis(). */
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struct iqueue_entry icomplet;
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struct iqueue_entry icomplet;
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#if DYNAMIC_EXECUTION
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#if DYNAMIC_EXECUTION
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/* Current page in execution */
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/* Current page in execution */
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struct dyn_page *curr_page;
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struct dyn_page *curr_page;
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/* Linked list of recompiled pages with their status */
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/* Pointers to recompiled pages */
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struct dyn_page *dyn_pages;
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struct dyn_page **dyn_pages;
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/* Micro operation queue. Only used to speed up recompile_page */
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/* Micro operation queue. Only used to speed up recompile_page */
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struct op_queue *opqs;
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struct op_queue *opqs;
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/* Set if all temporaries are stored */
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/* Set if all temporaries are stored */
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int ts_current;
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int ts_current;
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/* The contents of the temporaries. Only used in except_handle */
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/* The contents of the temporaries. Only used in except_handle */
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uorreg_t t0;
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uorreg_t t0;
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uorreg_t t1;
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uorreg_t t1;
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uorreg_t t2;
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uorreg_t t2;
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#endif
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#endif
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};
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};
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extern struct cpu_state cpu_state;
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extern struct cpu_state cpu_state;
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#define CURINSN(INSN) (strcmp(cur->insn, (INSN)) == 0)
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#define CURINSN(INSN) (strcmp(cur->insn, (INSN)) == 0)
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/*extern machword eval_operand(char *srcoperand,int* breakpoint);
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/*extern machword eval_operand(char *srcoperand,int* breakpoint);
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extern void set_operand(char *dstoperand, unsigned long value,int* breakpoint);*/
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extern void set_operand(char *dstoperand, unsigned long value,int* breakpoint);*/
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void dumpreg();
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void dumpreg();
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inline void dump_exe_log();
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inline void dump_exe_log();
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inline int cpu_clock ();
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inline int cpu_clock ();
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void cpu_reset ();
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void cpu_reset ();
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uorreg_t evalsim_reg(unsigned int regno);
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uorreg_t evalsim_reg(unsigned int regno);
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void setsim_reg(unsigned int regno, uorreg_t value);
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void setsim_reg(unsigned int regno, uorreg_t value);
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extern oraddr_t pcnext;
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extern oraddr_t pcnext;
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int depend_operands(struct iqueue_entry *prev, struct iqueue_entry *next);
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int depend_operands(struct iqueue_entry *prev, struct iqueue_entry *next);
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