# ====================================================================
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# ====================================================================
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#
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#
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# hal_arm_sa11x0.cdl
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# hal_arm_sa11x0.cdl
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#
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#
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# ARM SA11x0 architectural HAL package configuration data
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# ARM SA11x0 architectural HAL package configuration data
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#
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#
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# ====================================================================
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# ====================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## As a special exception, if other files instantiate templates or use macros
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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#####ECOSGPLCOPYRIGHTEND####
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# ====================================================================
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# ====================================================================
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######DESCRIPTIONBEGIN####
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######DESCRIPTIONBEGIN####
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#
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#
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# Author(s): gthomas
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# Author(s): gthomas
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# Original data: gthomas
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# Original data: gthomas
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# Contributors:
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# Contributors:
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# Date: 2000-05-08
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# Date: 2000-05-08
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#
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#
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#####DESCRIPTIONEND####
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#####DESCRIPTIONEND####
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#
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#
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# ====================================================================
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# ====================================================================
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cdl_package CYGPKG_HAL_ARM_SA11X0 {
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cdl_package CYGPKG_HAL_ARM_SA11X0 {
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display "ARM SA11X0 architecture"
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display "ARM SA11X0 architecture"
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parent CYGPKG_HAL_ARM
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parent CYGPKG_HAL_ARM
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hardware
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hardware
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include_dir cyg/hal
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include_dir cyg/hal
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define_header hal_arm_sa11x0.h
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define_header hal_arm_sa11x0.h
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description "
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description "
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This HAL variant package provides generic
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This HAL variant package provides generic
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support for the Intel StrongARM SA11x0 processors. It is also
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support for the Intel StrongARM SA11x0 processors. It is also
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necessary to select a specific target platform HAL
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necessary to select a specific target platform HAL
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package."
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package."
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implements CYGINT_HAL_ARM_ARCH_STRONGARM
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implements CYGINT_HAL_ARM_ARCH_STRONGARM
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implements CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
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implements CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
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# Let the architectural HAL see this variant's interrupts file -
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# Let the architectural HAL see this variant's interrupts file -
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# the SA11x0 has no variation between targets here.
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# the SA11x0 has no variation between targets here.
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define_proc {
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define_proc {
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puts $::cdl_header "#define CYGBLD_HAL_VAR_INTS_H "
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puts $::cdl_header "#define CYGBLD_HAL_VAR_INTS_H "
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puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"
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puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H"
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puts $::cdl_header "#define CYGPRI_KERNEL_TESTS_DHRYSTONE_PASSES 1000000"
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puts $::cdl_header "#define CYGPRI_KERNEL_TESTS_DHRYSTONE_PASSES 1000000"
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}
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}
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compile hal_diag.c sa11x0_misc.c
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compile hal_diag.c sa11x0_misc.c
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cdl_option CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK {
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cdl_option CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK {
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display "Processor clock rate"
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display "Processor clock rate"
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active_if { CYG_HAL_STARTUP == "ROM" }
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active_if { CYG_HAL_STARTUP == "ROM" }
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flavor data
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flavor data
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legal_values 59000 73700 88500 103200 118000 132700 147500 162200 176900 191700 206400 221200
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legal_values 59000 73700 88500 103200 118000 132700 147500 162200 176900 191700 206400 221200
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default_value { CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT ?
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default_value { CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT ?
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CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT : 221200}
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CYGHWR_HAL_ARM_SA11X0_PROCESSOR_CLOCK_OVERRIDE_DEFAULT : 221200}
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description "
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description "
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The SA-1100 processor can run at various frequencies.
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The SA-1100 processor can run at various frequencies.
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These values are expressed in KHz. Note that there are
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These values are expressed in KHz. Note that there are
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several steppings of the SA-1100 rated to run at different
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several steppings of the SA-1100 rated to run at different
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maximum frequencies. Check the specs to make sure that your
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maximum frequencies. Check the specs to make sure that your
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particular processor can run at the rate you select here."
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particular processor can run at the rate you select here."
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}
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}
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# Real-time clock/counter specifics
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# Real-time clock/counter specifics
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cdl_component CYGNUM_HAL_RTC_CONSTANTS {
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cdl_component CYGNUM_HAL_RTC_CONSTANTS {
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display "Real-time clock constants"
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display "Real-time clock constants"
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flavor none
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flavor none
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no_define
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no_define
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cdl_option CYGNUM_HAL_RTC_NUMERATOR {
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cdl_option CYGNUM_HAL_RTC_NUMERATOR {
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display "Real-time clock numerator"
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display "Real-time clock numerator"
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flavor data
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flavor data
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calculated 1000000000
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calculated 1000000000
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}
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}
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cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
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cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
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display "Real-time clock denominator"
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display "Real-time clock denominator"
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flavor data
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flavor data
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default_value 100
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default_value 100
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description "
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description "
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This option selects the heartbeat rate for the real-time clock.
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This option selects the heartbeat rate for the real-time clock.
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The rate is specified in ticks per second. Change this value
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The rate is specified in ticks per second. Change this value
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with caution - too high and your system will become saturated
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with caution - too high and your system will become saturated
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just handling clock interrupts, too low and some operations
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just handling clock interrupts, too low and some operations
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such as thread scheduling may become sluggish."
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such as thread scheduling may become sluggish."
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}
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}
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cdl_option CYGNUM_HAL_RTC_PERIOD {
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cdl_option CYGNUM_HAL_RTC_PERIOD {
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display "Real-time clock period"
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display "Real-time clock period"
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flavor data
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flavor data
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calculated (3686400/CYGNUM_HAL_RTC_DENOMINATOR) ;# Clock for OS Timer is 3.6864MHz
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calculated (3686400/CYGNUM_HAL_RTC_DENOMINATOR) ;# Clock for OS Timer is 3.6864MHz
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}
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}
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}
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}
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# Control over hardware layout.
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# Control over hardware layout.
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cdl_interface CYGHWR_HAL_ARM_SA11X0_UART1 {
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cdl_interface CYGHWR_HAL_ARM_SA11X0_UART1 {
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display "UART1 available as diagnostic/debug channel"
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display "UART1 available as diagnostic/debug channel"
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description "
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description "
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The SA11x0 chip has multiple serial channels which may be
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The SA11x0 chip has multiple serial channels which may be
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used for different things on different platforms. This
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used for different things on different platforms. This
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interface allows a platform to indicate that the specified
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interface allows a platform to indicate that the specified
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serial port can be used as a diagnostic and/or debug channel."
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serial port can be used as a diagnostic and/or debug channel."
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}
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}
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cdl_interface CYGHWR_HAL_ARM_SA11X0_UART3 {
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cdl_interface CYGHWR_HAL_ARM_SA11X0_UART3 {
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display "UART3 available as diagnostic/debug channel"
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display "UART3 available as diagnostic/debug channel"
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description "
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description "
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The SA11x0 chip has multiple serial channels which may be
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The SA11x0 chip has multiple serial channels which may be
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used for different things on different platforms. This
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used for different things on different platforms. This
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interface allows a platform to indicate that the specified
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interface allows a platform to indicate that the specified
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serial port can be used as a diagnostic and/or debug channel."
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serial port can be used as a diagnostic and/or debug channel."
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}
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}
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cdl_option CYGPKG_HAL_ARM_SA11X0_TESTS {
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cdl_option CYGPKG_HAL_ARM_SA11X0_TESTS {
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display "SA11x0 HAL tests"
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display "SA11x0 HAL tests"
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flavor data
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flavor data
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no_define
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no_define
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calculated { "tests/mmap_test" }
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calculated { "tests/mmap_test" }
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description "
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description "
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This option specifies the set of tests for the SA11x0 HAL."
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This option specifies the set of tests for the SA11x0 HAL."
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}
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}
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cdl_component CYGPKG_REDBOOT_HAL_SA11X0_OPTIONS {
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cdl_component CYGPKG_REDBOOT_HAL_SA11X0_OPTIONS {
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display "Redboot HAL variant options"
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display "Redboot HAL variant options"
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flavor none
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flavor none
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no_define
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no_define
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parent CYGPKG_REDBOOT
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parent CYGPKG_REDBOOT
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active_if CYGPKG_REDBOOT
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active_if CYGPKG_REDBOOT
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# RedBoot details
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# RedBoot details
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requires { CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT == 0xc0008000 }
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requires { CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT == 0xc0008000 }
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define_proc {
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define_proc {
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puts $::cdl_header "#define CYGHWR_REDBOOT_ARM_TRAMPOLINE_ADDRESS 0x00001f00"
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puts $::cdl_header "#define CYGHWR_REDBOOT_ARM_TRAMPOLINE_ADDRESS 0x00001f00"
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}
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}
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}
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}
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}
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}
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