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-->
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Installation and Testing
|
Installation and Testing
|
installing and testing RedBoot
|
installing and testing RedBoot
|
RedBootinstalling and testing
|
RedBootinstalling and testing
|
|
|
|
|
|
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AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
AM3x/MN103E010 Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
|
|
Overview
|
Overview
|
|
|
|
|
Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
installing and testing
|
installing and testing
|
|
|
|
|
installing and testing
|
installing and testing
|
Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
Matsushita MN103E010 (AM33/2.0) ASB2305 Board
|
|
|
RedBoot supports the debug serial port and the built in ethernet port for communication and
|
RedBoot supports the debug serial port and the built in ethernet port for communication and
|
downloads. The default serial port settings are 115200,8,N,1 with RTS/CTS flow control. RedBoot can
|
downloads. The default serial port settings are 115200,8,N,1 with RTS/CTS flow control. RedBoot can
|
run from either flash, and can support flash management for either the boot PROM or the system
|
run from either flash, and can support flash management for either the boot PROM or the system
|
flash regions.
|
flash regions.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
PROM
|
PROM
|
[ROM]
|
[ROM]
|
RedBoot running from the boot PROM and able to
|
RedBoot running from the boot PROM and able to
|
access the system flash.
|
access the system flash.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
FLASH
|
FLASH
|
[ROM]
|
[ROM]
|
RedBoot running from the system flash and able to
|
RedBoot running from the system flash and able to
|
access the boot PROM.
|
access the boot PROM.
|
redboot_FLASH.ecm
|
redboot_FLASH.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM and able to access the
|
RedBoot running from RAM and able to access the
|
boot PROM.
|
boot PROM.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
Unless a pre-programmed system flash module is available to be plugged into a new board,
|
Unless a pre-programmed system flash module is available to be plugged into a new board,
|
RedBoot must be installed with the aid of a JTAG interface unit. To achieve this, the RAM mode
|
RedBoot must be installed with the aid of a JTAG interface unit. To achieve this, the RAM mode
|
RedBoot must be loaded directly into RAM by JTAG and started, and then that
|
RedBoot must be loaded directly into RAM by JTAG and started, and then that
|
must be used to store the ROM mode RedBoot into the boot PROM.
|
must be used to store the ROM mode RedBoot into the boot PROM.
|
These instructions assume that you have binary images of the RAM-based and boot PROM-based
|
These instructions assume that you have binary images of the RAM-based and boot PROM-based
|
RedBoot images available.
|
RedBoot images available.
|
|
|
Preparing to program the board
|
Preparing to program the board
|
If the board is to be programmed, whether via JTAG or RedBoot, some hardware settings need to
|
If the board is to be programmed, whether via JTAG or RedBoot, some hardware settings need to
|
be changed:
|
be changed:
|
|
|
|
|
Jumper across ST18 on the board to allow write access to the boot PROM.
|
Jumper across ST18 on the board to allow write access to the boot PROM.
|
|
|
|
|
Set DIP switch S1-3 to OFF to allow RedBoot to write to the system flash.
|
Set DIP switch S1-3 to OFF to allow RedBoot to write to the system flash.
|
|
|
|
|
Set the switch S5 (on the front of the board) to boot from whichever flash is
|
Set the switch S5 (on the front of the board) to boot from whichever flash is
|
not being programmed. Note that the RedBoot image cannot access the flash from
|
not being programmed. Note that the RedBoot image cannot access the flash from
|
which it is currently executing (it can only access the other flash).
|
which it is currently executing (it can only access the other flash).
|
|
|
|
|
|
|
The RedBoot binary image files should also be copied to the TFTP pickup area on the host providing
|
The RedBoot binary image files should also be copied to the TFTP pickup area on the host providing
|
TFTP services if that is how RedBoot should pick up the images it is going to program into the
|
TFTP services if that is how RedBoot should pick up the images it is going to program into the
|
flash. Alternatively, the images can be passed by YMODEM over the serial link.
|
flash. Alternatively, the images can be passed by YMODEM over the serial link.
|
|
|
|
|
|
|
Preparing to use the JTAG debugger
|
Preparing to use the JTAG debugger
|
The JTAG debugger will also need setting up:
|
The JTAG debugger will also need setting up:
|
|
|
Install the JTAG debugger software (WICE103E) on a PC running Windows (WinNT is
|
Install the JTAG debugger software (WICE103E) on a PC running Windows (WinNT is
|
probably the best choice for this) in “C:/PanaX”.
|
probably the best choice for this) in “C:/PanaX”.
|
|
|
Install the Matsushita provided “project” into the
|
Install the Matsushita provided “project” into the
|
“C:/Panax/wice103e/prj” directory.
|
“C:/Panax/wice103e/prj” directory.
|
|
|
Install the RedBoot image files into the “C:/Panax/wice103e/prj”
|
Install the RedBoot image files into the “C:/Panax/wice103e/prj”
|
directory under the names redboot.ram and redboot.prom.
|
directory under the names redboot.ram and redboot.prom.
|
|
|
Make sure the PC's BIOS has the parallel port set to full bidirectional
|
Make sure the PC's BIOS has the parallel port set to full bidirectional
|
mode.
|
mode.
|
|
|
Connect the JTAG debugger to the PC's parallel port.
|
Connect the JTAG debugger to the PC's parallel port.
|
|
|
Connect the JTAG debugger to the board.
|
Connect the JTAG debugger to the board.
|
|
|
Set the switch on the front of the board to boot from “boot
|
Set the switch on the front of the board to boot from “boot
|
PROM”.
|
PROM”.
|
|
|
Power up the JTAG debugger and then power up the board.
|
Power up the JTAG debugger and then power up the board.
|
|
|
Connect the board's Debug Serial port to a computer by a null modem cable.
|
Connect the board's Debug Serial port to a computer by a null modem cable.
|
|
|
Start minicom or some other serial communication software and set for 115200 baud,
|
Start minicom or some other serial communication software and set for 115200 baud,
|
1-N-8 with hardware (RTS/CTS) flow control.
|
1-N-8 with hardware (RTS/CTS) flow control.
|
|
|
|
|
|
|
|
|
Loading the RAM-based RedBoot via JTAG
|
Loading the RAM-based RedBoot via JTAG
|
To perform the first half of the operation, the following steps should be followed:
|
To perform the first half of the operation, the following steps should be followed:
|
|
|
Start the JTAG debugger software.
|
Start the JTAG debugger software.
|
|
|
|
|
Run the following commands at the JTAG debugger's prompt to set up the MMU registers on the
|
Run the following commands at the JTAG debugger's prompt to set up the MMU registers on the
|
CPU.
|
CPU.
|
|
|
ed 0xc0002000, 0x12000580
|
ed 0xc0002000, 0x12000580
|
|
|
ed 0xd8c00100, 0x8000fe01
|
ed 0xd8c00100, 0x8000fe01
|
ed 0xd8c00200, 0x21111000
|
ed 0xd8c00200, 0x21111000
|
ed 0xd8c00204, 0x00100200
|
ed 0xd8c00204, 0x00100200
|
ed 0xd8c00208, 0x00000004
|
ed 0xd8c00208, 0x00000004
|
|
|
ed 0xd8c00110, 0x8400fe01
|
ed 0xd8c00110, 0x8400fe01
|
ed 0xd8c00210, 0x21111000
|
ed 0xd8c00210, 0x21111000
|
ed 0xd8c00214, 0x00100200
|
ed 0xd8c00214, 0x00100200
|
ed 0xd8c00218, 0x00000004
|
ed 0xd8c00218, 0x00000004
|
|
|
ed 0xd8c00120, 0x8600ff81
|
ed 0xd8c00120, 0x8600ff81
|
ed 0xd8c00220, 0x21111000
|
ed 0xd8c00220, 0x21111000
|
ed 0xd8c00224, 0x00100200
|
ed 0xd8c00224, 0x00100200
|
ed 0xd8c00228, 0x00000004
|
ed 0xd8c00228, 0x00000004
|
|
|
ed 0xd8c00130, 0x8680ff81
|
ed 0xd8c00130, 0x8680ff81
|
ed 0xd8c00230, 0x21111000
|
ed 0xd8c00230, 0x21111000
|
ed 0xd8c00234, 0x00100200
|
ed 0xd8c00234, 0x00100200
|
ed 0xd8c00238, 0x00000004
|
ed 0xd8c00238, 0x00000004
|
|
|
ed 0xd8c00140, 0x9800f801
|
ed 0xd8c00140, 0x9800f801
|
ed 0xd8c00240, 0x00140000
|
ed 0xd8c00240, 0x00140000
|
ed 0xd8c00244, 0x11011100
|
ed 0xd8c00244, 0x11011100
|
ed 0xd8c00248, 0x01000001
|
ed 0xd8c00248, 0x01000001
|
|
|
ed 0xda000000, 0x55561645
|
ed 0xda000000, 0x55561645
|
ed 0xda000004, 0x000003c0
|
ed 0xda000004, 0x000003c0
|
ed 0xda000008, 0x9000fe01
|
ed 0xda000008, 0x9000fe01
|
ed 0xda00000c, 0x9200fe01
|
ed 0xda00000c, 0x9200fe01
|
ed 0xda000000, 0xa89b0654
|
ed 0xda000000, 0xa89b0654
|
|
|
|
|
|
|
Run the following commands at the JTAG debugger's prompt to tell it what regions of the CPU's
|
Run the following commands at the JTAG debugger's prompt to tell it what regions of the CPU's
|
address space it can access:
|
address space it can access:
|
|
|
ex 0x80000000,0x81ffffff,/mexram
|
ex 0x80000000,0x81ffffff,/mexram
|
ex 0x84000000,0x85ffffff,/mexram
|
ex 0x84000000,0x85ffffff,/mexram
|
ex 0x86000000,0x867fffff,/mexram
|
ex 0x86000000,0x867fffff,/mexram
|
ex 0x86800000,0x87ffffff,/mexram
|
ex 0x86800000,0x87ffffff,/mexram
|
ex 0x8c000000,0x8cffffff,/mexram
|
ex 0x8c000000,0x8cffffff,/mexram
|
ex 0x90000000,0x93ffffff,/mexram
|
ex 0x90000000,0x93ffffff,/mexram
|
|
|
|
|
Instruct the debugger to load the RAM RedBoot image into RAM:
|
Instruct the debugger to load the RAM RedBoot image into RAM:
|
|
|
_pc=90000000
|
_pc=90000000
|
u_pc
|
u_pc
|
rd redboot.ram,90000000
|
rd redboot.ram,90000000
|
|
|
|
|
Load the boot PROM RedBoot into RAM:
|
Load the boot PROM RedBoot into RAM:
|
|
|
rd redboot.prom,91020000
|
rd redboot.prom,91020000
|
|
|
|
|
Start RedBoot in RAM:
|
Start RedBoot in RAM:
|
|
|
g
|
g
|
|
|
Note that RedBoot may take some time to start up, as it will attempt to query a BOOTP or DHCP
|
Note that RedBoot may take some time to start up, as it will attempt to query a BOOTP or DHCP
|
server to try and automatically get an IP address for the board. Note, however, that it should send
|
server to try and automatically get an IP address for the board. Note, however, that it should send
|
a plus over the serial port immediately, and the 7-segment LEDs should display “rh
|
a plus over the serial port immediately, and the 7-segment LEDs should display “rh
|
8”.
|
8”.
|
|
|
|
|
|
|
|
|
Loading the boot PROM-based RedBoot via the RAM mode RedBoot
|
Loading the boot PROM-based RedBoot via the RAM mode RedBoot
|
Once the RAM mode RedBoot is up and running, it can be communicated with by way of the serial
|
Once the RAM mode RedBoot is up and running, it can be communicated with by way of the serial
|
port. Commands can now be entered directly to RedBoot for flashing the boot PROM.
|
port. Commands can now be entered directly to RedBoot for flashing the boot PROM.
|
|
|
Instruct RedBoot to initialise the boot PROM:
|
Instruct RedBoot to initialise the boot PROM:
|
|
|
RedBoot> fi init
|
RedBoot> fi init
|
|
|
|
|
Write the previously loaded redboot.prom image into the boot PROM:
|
Write the previously loaded redboot.prom image into the boot PROM:
|
|
|
RedBoot> fi write -f 0x80000000 -b 0x91020000 -l 0x00020000
|
RedBoot> fi write -f 0x80000000 -b 0x91020000 -l 0x00020000
|
|
|
|
|
Check that RedBoot has written the image:
|
Check that RedBoot has written the image:
|
|
|
RedBoot> dump -b 0x91020000
|
RedBoot> dump -b 0x91020000
|
RedBoot> dump -b 0x80000000
|
RedBoot> dump -b 0x80000000
|
|
|
Barring the difference in address, the two dumps should be the same.
|
Barring the difference in address, the two dumps should be the same.
|
|
|
Close the JTAG software and power-cycle the board. The RedBoot banners should be
|
Close the JTAG software and power-cycle the board. The RedBoot banners should be
|
displayed again over the serial port, followed by the RedBoot prompt. The boot PROM-based RedBoot
|
displayed again over the serial port, followed by the RedBoot prompt. The boot PROM-based RedBoot
|
will now be running.
|
will now be running.
|
|
|
Power off the board and unjumper ST18 to write-protect the contents of the boot
|
Power off the board and unjumper ST18 to write-protect the contents of the boot
|
PROM. Then power the board back up.
|
PROM. Then power the board back up.
|
|
|
Run the following command to initialise the system flash:
|
Run the following command to initialise the system flash:
|
|
|
RedBoot> fi init
|
RedBoot> fi init
|
|
|
Then program the system flash based RedBoot into the system flash:
|
Then program the system flash based RedBoot into the system flash:
|
|
|
RedBoot> load -r -b %{FREEMEMLO} redboot_FLASH.bin
|
RedBoot> load -r -b %{FREEMEMLO} redboot_FLASH.bin
|
RedBoot> fi write -f 0x84000000 -b %{FREEMEMLO} -l 0x00020000
|
RedBoot> fi write -f 0x84000000 -b %{FREEMEMLO} -l 0x00020000
|
|
|
|
|
NOTE
|
NOTE
|
RedBoot arranges the flashes on booting such that they always appear at the same addresses,
|
RedBoot arranges the flashes on booting such that they always appear at the same addresses,
|
no matter which one was booted from.
|
no matter which one was booted from.
|
|
|
|
|
|
|
A similar sequence of commands can be used to program the boot PROM when RedBoot has been
|
A similar sequence of commands can be used to program the boot PROM when RedBoot has been
|
booted from an image stored in the system flash.
|
booted from an image stored in the system flash.
|
|
|
|
|
RedBoot> load -r -b %{FREEMEMLO} /tftpboot/redboot_ROM.bin
|
RedBoot> load -r -b %{FREEMEMLO} /tftpboot/redboot_ROM.bin
|
RedBoot> fi write -f 0x80000000 -b %{FREEMEMLO} -l 0x00020000
|
RedBoot> fi write -f 0x80000000 -b %{FREEMEMLO} -l 0x00020000
|
|
|
See for details on configuring the RedBoot in
|
See for details on configuring the RedBoot in
|
general, and also for more details on programming the system
|
general, and also for more details on programming the system
|
flash.
|
flash.
|
|
|
|
|
|
|
|
|
|
|
Additional Commands
|
Additional Commands
|
The exec command which allows the loading and execution of
|
The exec command which allows the loading and execution of
|
Linux kernels, is supported for this architecture (see ). The
|
Linux kernels, is supported for this architecture (see ). The
|
exec parameters used for ASB2305 board are:
|
exec parameters used for ASB2305 board are:
|
|
|
|
|
-w <time>
|
-w <time>
|
Wait time in seconds before starting kernel
|
Wait time in seconds before starting kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
<addr>
|
<addr>
|
Kernel entry point, defaulting to the entry point of the last image
|
Kernel entry point, defaulting to the entry point of the last image
|
loaded
|
loaded
|
|
|
The parameter string is stored in the on-chip memory at location 0x8C001000, and is prefixed
|
The parameter string is stored in the on-chip memory at location 0x8C001000, and is prefixed
|
by “cmdline:” if it was supplied.
|
by “cmdline:” if it was supplied.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the ASB2305 board.
|
RedBoot sets up the following memory map on the ASB2305 board.
|
|
|
NOTE
|
NOTE
|
The regions mapped between 0x80000000-0x9FFFFFFF are cached by the CPU. However, all those
|
The regions mapped between 0x80000000-0x9FFFFFFF are cached by the CPU. However, all those
|
regions can be accessed uncached by adding 0x20000000 to the address.
|
regions can be accessed uncached by adding 0x20000000 to the address.
|
|
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x9FFFFFFF Cached Region
|
0x80000000 - 0x9FFFFFFF Cached Region
|
0x80000000 - 0x81FFFFFF Boot PROM
|
0x80000000 - 0x81FFFFFF Boot PROM
|
0x84000000 - 0x85FFFFFF System Flash
|
0x84000000 - 0x85FFFFFF System Flash
|
0x86000000 - 0x86007FFF 64Kbit Sys Config EEPROM
|
0x86000000 - 0x86007FFF 64Kbit Sys Config EEPROM
|
0x86F90000 - 0x86F90003 4x 7-segment LEDs
|
0x86F90000 - 0x86F90003 4x 7-segment LEDs
|
0x86FA0000 - 0x86FA0003 Software DIP Switches
|
0x86FA0000 - 0x86FA0003 Software DIP Switches
|
0x86FB0000 - 0x86FB001F PC16550 Debug Serial Port
|
0x86FB0000 - 0x86FB001F PC16550 Debug Serial Port
|
0x8C000000 - 0x8FFFFFFF On-Chip Memory (repeated 16Kb SRAM)
|
0x8C000000 - 0x8FFFFFFF On-Chip Memory (repeated 16Kb SRAM)
|
0x90000000 - 0x93FFFFFF SDRAM
|
0x90000000 - 0x93FFFFFF SDRAM
|
0x98000000 - 0x9BFFFFFF Paged PCI Memory Space (64Mb)
|
0x98000000 - 0x9BFFFFFF Paged PCI Memory Space (64Mb)
|
0x9C000000 - 0x9DFFFFFF PCI Local SRAM (32Mb)
|
0x9C000000 - 0x9DFFFFFF PCI Local SRAM (32Mb)
|
0x9E000000 - 0x9E03FFFF PCI I/O Space
|
0x9E000000 - 0x9E03FFFF PCI I/O Space
|
0x9E040000 - 0x9E0400FF AM33-PCI Bridge Registers
|
0x9E040000 - 0x9E0400FF AM33-PCI Bridge Registers
|
0x9FFFFFF4 - 0x9FFFFFF7 PCI Memory Page Register
|
0x9FFFFFF4 - 0x9FFFFFF7 PCI Memory Page Register
|
0x9FFFFFF8 - 0x9FFFFFFF PCI Config Registers
|
0x9FFFFFF8 - 0x9FFFFFFF PCI Config Registers
|
0xA0000000 - 0xBFFFFFFF Uncached Mirror Region
|
0xA0000000 - 0xBFFFFFFF Uncached Mirror Region
|
0xC0000000 - 0xDFFFFFFF CPU Control Registers
|
0xC0000000 - 0xDFFFFFFF CPU Control Registers
|
|
|
The ASB2305 HAL makes use of the on-chip memory in the following way:
|
The ASB2305 HAL makes use of the on-chip memory in the following way:
|
|
|
0x8C000000 - 0x8C0000FF hal_vsr_table
|
0x8C000000 - 0x8C0000FF hal_vsr_table
|
0x8C000100 - 0x8C0001FF hal_virtual_vector_table
|
0x8C000100 - 0x8C0001FF hal_virtual_vector_table
|
0x8C001000 - Linux command line (RedBoot exec command)
|
0x8C001000 - Linux command line (RedBoot exec command)
|
- 0x8C003FFF Emergency DoubleFault Exception Stack
|
- 0x8C003FFF Emergency DoubleFault Exception Stack
|
|
|
Currently the CPU's interrupt table lies at the beginning of the RedBoot image, which must
|
Currently the CPU's interrupt table lies at the beginning of the RedBoot image, which must
|
therefore be aligned to a 0xFF000000 mask.
|
therefore be aligned to a 0xFF000000 mask.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=asb2305
|
export TARGET=asb2305
|
export ARCH_DIR=mn10300
|
export ARCH_DIR=mn10300
|
export PLATFORM_DIR=asb2305
|
export PLATFORM_DIR=asb2305
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM7 ARM Evaluator7T
|
ARM/ARM7 ARM Evaluator7T
|
|
|
Overview
|
Overview
|
ARM Evaluator7Tinstalling and
|
ARM Evaluator7Tinstalling and
|
testinginstalling and testing
|
testinginstalling and testing
|
ARM Evaluator7TRedBoot supports
|
ARM Evaluator7TRedBoot supports
|
both serial ports for communication and downloads. The default serial port
|
both serial ports for communication and downloads. The default serial port
|
settings are 38400,8,N,1.
|
settings are 38400,8,N,1.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from flash address 0x20000, with
|
RedBoot running from flash address 0x20000, with
|
ARM Boot Monitor in flash boot sector.
|
ARM Boot Monitor in flash boot sector.
|
redboot_ROMA.ecm
|
redboot_ROMA.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot is installed using the on-board boot environment. See the user
|
RedBoot is installed using the on-board boot environment. See the user
|
manual for full details.
|
manual for full details.
|
|
|
|
|
Quick download instructions
|
Quick download instructions
|
Here are quick start instructions for downloading the prebuilt Redboot
|
Here are quick start instructions for downloading the prebuilt Redboot
|
image:
|
image:
|
|
|
Boot the board and press ENTER:
|
Boot the board and press ENTER:
|
|
|
|
|
ARM Evaluator7T Boot Monitor PreRelease 1.00
|
ARM Evaluator7T Boot Monitor PreRelease 1.00
|
Press ENTER within 2 seconds to stop autoboot
|
Press ENTER within 2 seconds to stop autoboot
|
Boot:
|
Boot:
|
|
|
Erase the part of the flash where RedBoot will get programmed:
|
Erase the part of the flash where RedBoot will get programmed:
|
|
|
Boot: flasherase 01820000 10000
|
Boot: flasherase 01820000 10000
|
|
|
Prepare to download the UU-encoded version of the RedBoot
|
Prepare to download the UU-encoded version of the RedBoot
|
image:
|
image:
|
Boot: download 10000
|
Boot: download 10000
|
Ready to download. Use 'transmit' option on terminal emulator to download file.
|
Ready to download. Use 'transmit' option on terminal emulator to download file.
|
|
|
|
|
Either use ASCII transmit option in the terminal emulator,
|
Either use ASCII transmit option in the terminal emulator,
|
or on Linux, simply cat the file to the serial port: $
|
or on Linux, simply cat the file to the serial port: $
|
cat redboot.UU > /dev/ttyS0When complete, you should
|
cat redboot.UU > /dev/ttyS0When complete, you should
|
see: Loaded file redboot.bin at address 000100000, size = 41960
|
see: Loaded file redboot.bin at address 000100000, size = 41960
|
Boot:
|
Boot:
|
|
|
Program the flash: Boot: flashwrite 01820000 10000 10000
|
Program the flash: Boot: flashwrite 01820000 10000 10000
|
|
|
|
|
And verify that the module is available: Boot:
|
And verify that the module is available: Boot:
|
rommodules
|
rommodules
|
Header Base Limit
|
Header Base Limit
|
018057c8 01800000 018059e7 BootStrapLoader v1.0 Apr 27 2000 10:33:58
|
018057c8 01800000 018059e7 BootStrapLoader v1.0 Apr 27 2000 10:33:58
|
01828f24 01820000 0182a3e8 RedBoot Apr 5 2001
|
01828f24 01820000 0182a3e8 RedBoot Apr 5 2001
|
|
|
Reboot the board and you should see the RedBoot banner.
|
Reboot the board and you should see the RedBoot banner.
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the E7T board. </code></pre></td>
<td class="diff"><pre><code><para>RedBoot sets up the following memory map on the E7T board. <note><title></code></pre></td>
</tr>
<tr class="diffcode">
<td class="diff"><pre><code>NOTE
|
NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range C B Description
|
Physical Address Range C B Description
|
----------------------- - - -----------
|
----------------------- - - -----------
|
0x00000000 - 0x0007ffff Y N SDRAM
|
0x00000000 - 0x0007ffff Y N SDRAM
|
0x03ff0000 - 0x03ffffff N N Microcontroller registers
|
0x03ff0000 - 0x03ffffff N N Microcontroller registers
|
0x01820000 - 0x0187ffff N N System flash (mirrored)
|
0x01820000 - 0x0187ffff N N System flash (mirrored)
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=e7t
|
export TARGET=e7t
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=e7t
|
export PLATFORM_DIR=e7t
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM7+ARM9 ARM Integrator
|
ARM/ARM7+ARM9 ARM Integrator
|
|
|
Overview
|
Overview
|
ARM Integratorinstalling and
|
ARM Integratorinstalling and
|
testinginstalling and testing
|
testinginstalling and testing
|
ARM IntegratorRedBoot supports
|
ARM IntegratorRedBoot supports
|
both serial ports for communication and downloads. The default serial port
|
both serial ports for communication and downloads. The default serial port
|
settings are 38400,8,N,1.
|
settings are 38400,8,N,1.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot is installed using the on-board bootPROM environment. See the user
|
RedBoot is installed using the on-board bootPROM environment. See the user
|
manual for full details.
|
manual for full details.
|
|
|
|
|
Quick download instructions
|
Quick download instructions
|
Here are quick start instructions for downloading the prebuilt Redboot
|
Here are quick start instructions for downloading the prebuilt Redboot
|
image:
|
image:
|
|
|
Set DIP switch S1[1] to the ON position and reset or
|
Set DIP switch S1[1] to the ON position and reset or
|
power the board up. You will see the bootPROM startup message on
|
power the board up. You will see the bootPROM startup message on
|
serial port A (J14):
|
serial port A (J14):
|
|
|
Initialising...
|
Initialising...
|
|
|
|
|
ARM bootPROM [Version 1.3] Rebuilt on Jun 26 2001 at 22:04:10
|
ARM bootPROM [Version 1.3] Rebuilt on Jun 26 2001 at 22:04:10
|
Running on a Integrator Evaluation Board
|
Running on a Integrator Evaluation Board
|
Board Revision V1.0, ARM966E-S Processor
|
Board Revision V1.0, ARM966E-S Processor
|
Memory Size is 16MBytes, Flash Size is 32MBytes
|
Memory Size is 16MBytes, Flash Size is 32MBytes
|
Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
|
Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
|
Board designed by ARM Limited
|
Board designed by ARM Limited
|
Hardware support provided at http://www.arm.com/
|
Hardware support provided at http://www.arm.com/
|
For help on the available commands type ? or h
|
For help on the available commands type ? or h
|
boot Monitor >
|
boot Monitor >
|
|
|
|
|
|
|
Issue the FLASH ROM load command:
|
Issue the FLASH ROM load command:
|
|
|
|
|
boot Monitor > L
|
boot Monitor > L
|
Load Motorola S-Records into flash
|
Load Motorola S-Records into flash
|
|
|
Deleting Image 0
|
Deleting Image 0
|
|
|
The S-Record loader only accepts input on the serial port.
|
The S-Record loader only accepts input on the serial port.
|
Type Ctrl/C to exit loader.
|
Type Ctrl/C to exit loader.
|
|
|
|
|
Either use the ASCII transmit option in the terminal emulator,
|
Either use the ASCII transmit option in the terminal emulator,
|
or on Linux, simply cat the file to the serial port:
|
or on Linux, simply cat the file to the serial port:
|
|
|
|
|
$ cat redboot.srec > /dev/ttyS0
|
$ cat redboot.srec > /dev/ttyS0
|
|
|
|
|
When complete, type Ctrl-C and you should see something similar to:
|
When complete, type Ctrl-C and you should see something similar to:
|
|
|
|
|
................................
|
................................
|
................................
|
................................
|
....................
|
....................
|
Downloaded 5,394 records in 81 seconds.
|
Downloaded 5,394 records in 81 seconds.
|
|
|
Overwritten block/s
|
Overwritten block/s
|
0
|
0
|
|
|
boot Monitor >
|
boot Monitor >
|
|
|
|
|
Set DIP switch S1[1] to the OFF position and reboot
|
Set DIP switch S1[1] to the OFF position and reboot
|
the board and you should see the RedBoot banner.
|
the board and you should see the RedBoot banner.
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the Integrator board. </code></pre></td>
<td class="diff"><pre><code><para>RedBoot sets up the following memory map on the Integrator board. <note><title></code></pre></td>
</tr>
<tr class="diffcode">
<td class="diff"><pre><code>NOTE
|
NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
|
|
|
|
|
|
ARM7TDMI
|
ARM7TDMI
|
--------
|
--------
|
|
|
Physical Address Range C B Description
|
Physical Address Range C B Description
|
----------------------- - - -----------
|
----------------------- - - -----------
|
0x00000000 - 0x0007ffff N N SSRAM
|
0x00000000 - 0x0007ffff N N SSRAM
|
0x00080000 - 0x0fffffff N N SDRAM (depends on part fitted)
|
0x00080000 - 0x0fffffff N N SDRAM (depends on part fitted)
|
0x10000000 - 0x1fffffff N N System control and peripheral registers
|
0x10000000 - 0x1fffffff N N System control and peripheral registers
|
0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
|
0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
|
0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
|
0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
|
0x28000000 - 0x2bffffff N N SSRAM echo area
|
0x28000000 - 0x2bffffff N N SSRAM echo area
|
0x40000000 - 0x5fffffff N N PCI Memory access windows
|
0x40000000 - 0x5fffffff N N PCI Memory access windows
|
0x60000000 - 0x60ffffff N N PCI IO access window
|
0x60000000 - 0x60ffffff N N PCI IO access window
|
0x61000000 - 0x61ffffff N N PCI config space window
|
0x61000000 - 0x61ffffff N N PCI config space window
|
0x62000000 - 0x6200ffff N N PCI bridge register window
|
0x62000000 - 0x6200ffff N N PCI bridge register window
|
0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
|
0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
|
|
|
|
|
ARM966E
|
ARM966E
|
-------
|
-------
|
|
|
Physical Address Range C B Description
|
Physical Address Range C B Description
|
----------------------- - - -----------
|
----------------------- - - -----------
|
0x00000000 - 0x000fffff N N SSRAM
|
0x00000000 - 0x000fffff N N SSRAM
|
0x00100000 - 0x0fffffff N N SDRAM (depends on part fitted)
|
0x00100000 - 0x0fffffff N N SDRAM (depends on part fitted)
|
0x10000000 - 0x1fffffff N N System control and peripheral registers
|
0x10000000 - 0x1fffffff N N System control and peripheral registers
|
0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
|
0x20000000 - 0x23ffffff N N Boot ROM (contains boot Monitor)
|
0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
|
0x24000000 - 0x27ffffff N N FLASH ROM (contains RedBoot)
|
0x28000000 - 0x2bffffff N N SSRAM echo area
|
0x28000000 - 0x2bffffff N N SSRAM echo area
|
0x40000000 - 0x5fffffff N N PCI Memory access windows
|
0x40000000 - 0x5fffffff N N PCI Memory access windows
|
0x60000000 - 0x60ffffff N N PCI IO access window
|
0x60000000 - 0x60ffffff N N PCI IO access window
|
0x61000000 - 0x61ffffff N N PCI config space window
|
0x61000000 - 0x61ffffff N N PCI config space window
|
0x62000000 - 0x6200ffff N N PCI bridge register window
|
0x62000000 - 0x6200ffff N N PCI bridge register window
|
0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
|
0x80000000 - 0x8fffffff N N SDRAM echo area (used for PCI accesses)
|
|
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=integrator
|
export TARGET=integrator
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=integrator
|
export PLATFORM_DIR=integrator
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM7+ARM9 ARM PID Board and EPI Dev7+Dev9
|
ARM/ARM7+ARM9 ARM PID Board and EPI Dev7+Dev9
|
|
|
Overview
|
Overview
|
ARM ARM7 PID, Dev7 and Dev9
|
ARM ARM7 PID, Dev7 and Dev9
|
installing and testinginstalling
|
installing and testinginstalling
|
and testingARM ARM7 PID, Dev7 and Dev9RedBoot
|
and testingARM ARM7 PID, Dev7 and Dev9RedBoot
|
uses either of the serial ports. The default serial port settings are 38400,8,N,1.
|
uses either of the serial ports. The default serial port settings are 38400,8,N,1.
|
Management of onboard flash is also supported.
|
Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
Device programmer is used to program socketed flash parts with ROM version
|
Device programmer is used to program socketed flash parts with ROM version
|
of RedBoot.
|
of RedBoot.
|
Alternatively, to install RedBoot on a target that already has eCos
|
Alternatively, to install RedBoot on a target that already has eCos
|
GDB stubs, download the RAM mode image of RedBoot and run it. Initialize the
|
GDB stubs, download the RAM mode image of RedBoot and run it. Initialize the
|
flash image directory: fis init Then
|
flash image directory: fis init Then
|
download the ROM version of RedBoot and program it into flash:
|
download the ROM version of RedBoot and program it into flash:
|
RedBoot> load -b %{FREEMEMLO} -m ymodem
|
RedBoot> load -b %{FREEMEMLO} -m ymodem
|
RedBoot> fi cr RedBoot
|
RedBoot> fi cr RedBoot
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the PID board.
|
RedBoot sets up the following memory map on the PID board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x00000000 - 0x0007ffff DRAM
|
0x00000000 - 0x0007ffff DRAM
|
0x04000000 - 0x04080000 flash
|
0x04000000 - 0x04080000 flash
|
0x08000000 - 0x09ffffff ASB Expansion
|
0x08000000 - 0x09ffffff ASB Expansion
|
0x0a000000 - 0x0bffffff APB Reference Peripheral
|
0x0a000000 - 0x0bffffff APB Reference Peripheral
|
0x0c000000 - 0x0fffffff NISA Serial, Parallel and PC Card ports
|
0x0c000000 - 0x0fffffff NISA Serial, Parallel and PC Card ports
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=pid
|
export TARGET=pid
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=pid
|
export PLATFORM_DIR=pid
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM7 Atmel AT91 Evaluation Board (EB40)
|
ARM/ARM7 Atmel AT91 Evaluation Board (EB40)
|
|
|
Overview
|
Overview
|
Atmel AT91/EB40
|
Atmel AT91/EB40
|
installing and testing
|
installing and testing
|
installing and testingAtmel AT91/EB40
|
installing and testingAtmel AT91/EB40
|
RedBoot supports both serial ports.
|
RedBoot supports both serial ports.
|
The default serial port settings are 38400,8,N,1. RedBoot
|
The default serial port settings are 38400,8,N,1. RedBoot
|
also supports minimal flash management on the EB40.
|
also supports minimal flash management on the EB40.
|
However, since the flash device (AT29LV1024) is so small (only the upper 64K is
|
However, since the flash device (AT29LV1024) is so small (only the upper 64K is
|
available for general use), only the simple flash write command 'fis
|
available for general use), only the simple flash write command 'fis
|
write' is supported.
|
write' is supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
|
|
This development board comes with ARM's debug tool, Angel, installed in flash.
|
This development board comes with ARM's debug tool, Angel, installed in flash.
|
At this time, Angel will not be replaced. Rather, RedBoot will be placed in
|
At this time, Angel will not be replaced. Rather, RedBoot will be placed in
|
the alternate half of flash. Switch SW1 is used which monitor to boot. Selecting
|
the alternate half of flash. Switch SW1 is used which monitor to boot. Selecting
|
SW1 to "lower mem" will choose Angel. Select SW1 to "Upper mem" for RedBoot once
|
SW1 to "lower mem" will choose Angel. Select SW1 to "Upper mem" for RedBoot once
|
it has been installed.
|
it has been installed.
|
|
|
|
|
Set SW1 to "lower mem" and connect serial port A to a host computer. Using GDB
|
Set SW1 to "lower mem" and connect serial port A to a host computer. Using GDB
|
from the host and Angel on the board, download the RAM mode image of RedBoot
|
from the host and Angel on the board, download the RAM mode image of RedBoot
|
to the board. SW1 should then be set to "upper mem" just before starting RedBoot using
|
to the board. SW1 should then be set to "upper mem" just before starting RedBoot using
|
the 'cont' command. Once RedBoot is started, the Angel session must be interrupted (on
|
the 'cont' command. Once RedBoot is started, the Angel session must be interrupted (on
|
Linux this can be done using ^Z). Follow this by connecting to the board using
|
Linux this can be done using ^Z). Follow this by connecting to the board using
|
minicom at 38400-8N1. At this point, RedBoot will be running on the board in
|
minicom at 38400-8N1. At this point, RedBoot will be running on the board in
|
RAM. Now, download the ROMRAM mode image and program it to flash.
|
RAM. Now, download the ROMRAM mode image and program it to flash.
|
|
|
arm-elf-gdb redboot_RAM.elf
|
arm-elf-gdb redboot_RAM.elf
|
(gdb) tar rdi s=/dev/ttyS0
|
(gdb) tar rdi s=/dev/ttyS0
|
Angel Debug Monitor (serial) 1.04 (Advanced RISC Machines SDT 2.5) for
|
Angel Debug Monitor (serial) 1.04 (Advanced RISC Machines SDT 2.5) for
|
AT91EB40 (2.00)
|
AT91EB40 (2.00)
|
Angel Debug Monitor rebuilt on Apr 07 2000 at 12:40:31
|
Angel Debug Monitor rebuilt on Apr 07 2000 at 12:40:31
|
Serial Rate: 9600
|
Serial Rate: 9600
|
Connected to ARM RDI target.
|
Connected to ARM RDI target.
|
(gdb) set $cpsr=0xd3
|
(gdb) set $cpsr=0xd3
|
(gdb) load
|
(gdb) load
|
Loading section .rom_vectors, size 0x40 lma 0x2020000
|
Loading section .rom_vectors, size 0x40 lma 0x2020000
|
Loading section .text, size 0x7fd8 lma 0x2020040
|
Loading section .text, size 0x7fd8 lma 0x2020040
|
Loading section .rodata, size 0x15a0 lma 0x2028018
|
Loading section .rodata, size 0x15a0 lma 0x2028018
|
Loading section .data, size 0x2e4 lma 0x20295b8
|
Loading section .data, size 0x2e4 lma 0x20295b8
|
Start address 0x2020040 , load size 39068
|
Start address 0x2020040 , load size 39068
|
Transfer rate: 6250 bits/sec, 500 bytes/write.
|
Transfer rate: 6250 bits/sec, 500 bytes/write.
|
|
|
At this point, set SW1 to "upper mem".
|
At this point, set SW1 to "upper mem".
|
|
|
(gdb) cont
|
(gdb) cont
|
Continuing.
|
Continuing.
|
|
|
At this point, suspend the GDB session (use Ctrl-Z) and start a
|
At this point, suspend the GDB session (use Ctrl-Z) and start a
|
terminal emulator:
|
terminal emulator:
|
|
|
RedBoot> version
|
RedBoot> version
|
|
|
RedBoot(tm) bootstrap and debug environment [RAM]
|
RedBoot(tm) bootstrap and debug environment [RAM]
|
Non-certified release, version UNKNOWN - built 14:09:27, Jul 20 2001
|
Non-certified release, version UNKNOWN - built 14:09:27, Jul 20 2001
|
|
|
Platform: Atmel AT91/EB40 (ARM7TDMI)
|
Platform: Atmel AT91/EB40 (ARM7TDMI)
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
|
|
RAM: 0x02000000-0x02080000, 0x020116d8-0x0207fd00 available
|
RAM: 0x02000000-0x02080000, 0x020116d8-0x0207fd00 available
|
FLASH: 0x01010000 - 0x01020000, 256 blocks of 0x00000100 bytes each.
|
FLASH: 0x01010000 - 0x01020000, 256 blocks of 0x00000100 bytes each.
|
|
|
RedBoot> load -m ymodem -b %{FREEMEMLO}
|
RedBoot> load -m ymodem -b %{FREEMEMLO}
|
|
|
Use minicom to send the file redboot_ROMRAM.srec via YModem.
|
Use minicom to send the file redboot_ROMRAM.srec via YModem.
|
|
|
RedBoot> fi wr -f 0x01010000 -b %{FREEMEMLO} -l 0xe100
|
RedBoot> fi wr -f 0x01010000 -b %{FREEMEMLO} -l 0xe100
|
|
|
Press the "reset" pushbutton and RedBoot
|
Press the "reset" pushbutton and RedBoot
|
should come up on the board.
|
should come up on the board.
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
This processor has no MMU, so the only memory map is for physical addresses.
|
This processor has no MMU, so the only memory map is for physical addresses.
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x00000fff On-chip SRAM
|
0x00000000 - 0x00000fff On-chip SRAM
|
0x01000000 - 0x0101ffff Flash
|
0x01000000 - 0x0101ffff Flash
|
0x02000000 - 0x0207ffff RAM
|
0x02000000 - 0x0207ffff RAM
|
0xffe00000 - 0xffffffff I/O registers
|
0xffe00000 - 0xffffffff I/O registers
|
|
|
The flash based RedBoot image occupies virtual addresses 0x01010000 - 0x0101dfff
|
The flash based RedBoot image occupies virtual addresses 0x01010000 - 0x0101dfff
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=eb40
|
export TARGET=eb40
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=at91
|
export PLATFORM_DIR=at91
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM7 Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
ARM/ARM7 Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
|
|
Overview
|
Overview
|
Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
Cirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
installing and testing
|
installing and testing
|
installing and testingCirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
installing and testingCirrus Logic EP7xxx (EDB7211, EDB7212, EDB7312)
|
RedBoot supports both serial ports on the board and
|
RedBoot supports both serial ports on the board and
|
the ethernet port. The default serial port settings are 38400,8,N,1. RedBoot
|
the ethernet port. The default serial port settings are 38400,8,N,1. RedBoot
|
also supports flash management on the EDB7xxx for the NOR flash
|
also supports flash management on the EDB7xxx for the NOR flash
|
only.
|
only.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector (EDB7312 only).
|
board's flash boot sector (EDB7312 only).
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A Windows or Linux utility is used to program flash using serial port
|
A Windows or Linux utility is used to program flash using serial port
|
#1 via on-chip programming firmware. See board documentation for details on
|
#1 via on-chip programming firmware. See board documentation for details on
|
in situ flash programming.
|
in situ flash programming.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The MMU page tables and LCD display buffer, if enabled, are located
|
The MMU page tables and LCD display buffer, if enabled, are located
|
at the end of DRAM. NOTE</code></pre></td>
<td class="diff"><pre><code>at the end of DRAM. <note><title>NOTE</code></pre></td>
</tr>
<tr class="diffcode">
<td class="diff"><pre><code>
|
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x01ffffff NOR Flash (EDB7211, EDB7212)
|
0x00000000 - 0x01ffffff NOR Flash (EDB7211, EDB7212)
|
0x00000000 - 0x00ffffff NOR Flash (EDB7312)
|
0x00000000 - 0x00ffffff NOR Flash (EDB7312)
|
0x10000000 - 0x11ffffff NAND Flash
|
0x10000000 - 0x11ffffff NAND Flash
|
0x20000000 - 0x2fffffff Expansion 2
|
0x20000000 - 0x2fffffff Expansion 2
|
0x30000000 - 0x3fffffff Expansion 3
|
0x30000000 - 0x3fffffff Expansion 3
|
0x40000000 - 0x4fffffff PCMCIA 0
|
0x40000000 - 0x4fffffff PCMCIA 0
|
0x50000000 - 0x5fffffff PCMCIA 1
|
0x50000000 - 0x5fffffff PCMCIA 1
|
0x60000000 - 0x600007ff On-chip SRAM
|
0x60000000 - 0x600007ff On-chip SRAM
|
0x80000000 - 0x8fffffff I/O registers
|
0x80000000 - 0x8fffffff I/O registers
|
0xc0000000 - 0xc1ffffff DRAM (EDB7211, EDB7212)
|
0xc0000000 - 0xc1ffffff DRAM (EDB7211, EDB7212)
|
0xc0000000 - 0xc0ffffff DRAM (EDB7312)
|
0xc0000000 - 0xc0ffffff DRAM (EDB7312)
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01ffffff Y Y DRAM
|
0x00000000 - 0x01ffffff Y Y DRAM
|
0x00000000 - 0x00fcffff Y Y DRAM (EDB7312)
|
0x00000000 - 0x00fcffff Y Y DRAM (EDB7312)
|
0x20000000 - 0x2fffffff N N Expansion 2
|
0x20000000 - 0x2fffffff N N Expansion 2
|
0x30000000 - 0x3fffffff N N Expansion 3
|
0x30000000 - 0x3fffffff N N Expansion 3
|
0x40000000 - 0x4fffffff N N PCMCIA 0
|
0x40000000 - 0x4fffffff N N PCMCIA 0
|
0x50000000 - 0x5fffffff N N PCMCIA 1
|
0x50000000 - 0x5fffffff N N PCMCIA 1
|
0x60000000 - 0x600007ff Y Y On-chip SRAM
|
0x60000000 - 0x600007ff Y Y On-chip SRAM
|
0x80000000 - 0x8fffffff N N I/O registers
|
0x80000000 - 0x8fffffff N N I/O registers
|
0xc0000000 - 0xc001ffff N Y LCD buffer (if configured)
|
0xc0000000 - 0xc001ffff N Y LCD buffer (if configured)
|
0xe0000000 - 0xe1ffffff Y Y NOR Flash (EDB7211, EDB7212)
|
0xe0000000 - 0xe1ffffff Y Y NOR Flash (EDB7211, EDB7212)
|
0xe0000000 - 0xe0ffffff Y Y NOR Flash (EDB7312)
|
0xe0000000 - 0xe0ffffff Y Y NOR Flash (EDB7312)
|
0xf0000000 - 0xf1ffffff Y Y NAND Flash
|
0xf0000000 - 0xf1ffffff Y Y NAND Flash
|
|
|
The flash based RedBoot image occupies virtual addresses 0xe0000000 - 0xe003ffff.
|
The flash based RedBoot image occupies virtual addresses 0xe0000000 - 0xe003ffff.
|
|
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
The EP7xxx timer #2 is used as a polled timer to provide timeout support
|
The EP7xxx timer #2 is used as a polled timer to provide timeout support
|
for network and XModem file transfers.
|
for network and XModem file transfers.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=edb7211
|
export TARGET=edb7211
|
export TARGET=edb7212
|
export TARGET=edb7212
|
export TARGET=edb7312
|
export TARGET=edb7312
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=edb7xxx
|
export PLATFORM_DIR=edb7xxx
|
|
|
|
|
Use one of the TARGET settings only.
|
Use one of the TARGET settings only.
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM9 Agilent AAED2000
|
ARM/ARM9 Agilent AAED2000
|
|
|
Overview
|
Overview
|
Agilent AAED2000 ARM9 (aaed)
|
Agilent AAED2000 ARM9 (aaed)
|
installing and testing
|
installing and testing
|
installing and testingAgilent AAED2000 ARM9 (aaed)
|
installing and testingAgilent AAED2000 ARM9 (aaed)
|
RedBoot supports the serial and ethernet ports
|
RedBoot supports the serial and ethernet ports
|
on the board. The default serial port settings are 38400,8,N,1.
|
on the board. The default serial port settings are 38400,8,N,1.
|
RedBoot also supports flash management on the AAED2000.
|
RedBoot also supports flash management on the AAED2000.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_primary_ROMRAM.ecm
|
redboot_primary_ROMRAM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_primary_RAM.ecm
|
redboot_primary_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
It is possible to install RedBoot in one of two ways. Either as
|
It is possible to install RedBoot in one of two ways. Either as
|
the primary bootmonitor on the board (installed to blocks 0-1 of the
|
the primary bootmonitor on the board (installed to blocks 0-1 of the
|
flash) or as the secondary bootmonitor on the board (installed to
|
flash) or as the secondary bootmonitor on the board (installed to
|
blocks 1-2 of the flash).
|
blocks 1-2 of the flash).
|
|
|
Presently, only the former method is supported.
|
Presently, only the former method is supported.
|
|
-->
|
|
|
RedBoot as Primary Bootmonitor
|
RedBoot as Primary Bootmonitor
|
|
|
RedBoot is installed in flash using the on-board ARM Boot
|
RedBoot is installed in flash using the on-board ARM Boot
|
Monitor.
|
Monitor.
|
Boot the board while pressing SPACE. This should bring up the
|
Boot the board while pressing SPACE. This should bring up the
|
Boot Monitor:
|
Boot Monitor:
|
ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
|
ARM bootPROM [Version 1.3] Rebuilt on Jul 16 2001 at 16:21:36
|
Running on a P920 board Evaluation Board
|
Running on a P920 board Evaluation Board
|
Board Revision V1.0, ARM920T processor Processor
|
Board Revision V1.0, ARM920T processor Processor
|
Memory Size is 32MBytes, Flash Size is 32MBytes
|
Memory Size is 32MBytes, Flash Size is 32MBytes
|
Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
|
Copyright (c) ARM Limited 1999 - 2001. All rights reserved.
|
Board designed by ARM Limited
|
Board designed by ARM Limited
|
Hardware support provided at http://www.arm.com/
|
Hardware support provided at http://www.arm.com/
|
For help on the available commands type ? or h
|
For help on the available commands type ? or h
|
boot Monitor >
|
boot Monitor >
|
|
|
|
|
Download the RAM mode image of RedBoot configured as a primary
|
Download the RAM mode image of RedBoot configured as a primary
|
bootmonitor using the ARM bootmonitor's SREC-download command:
|
bootmonitor using the ARM bootmonitor's SREC-download command:
|
|
|
boot Monitor > m
|
boot Monitor > m
|
Load Motorola S-Record image into memory and execute it
|
Load Motorola S-Record image into memory and execute it
|
The S-Record loader only accepts input on the serial port.
|
The S-Record loader only accepts input on the serial port.
|
Record addresses must be between 0x00008000 and 0x01E0F510.
|
Record addresses must be between 0x00008000 and 0x01E0F510.
|
Type Ctrl/C to exit loader.
|
Type Ctrl/C to exit loader.
|
|
|
|
|
Use the terminal emulator's ASCII upload command, or (on Linux) simply
|
Use the terminal emulator's ASCII upload command, or (on Linux) simply
|
cat the file to the serial port:
|
cat the file to the serial port:
|
|
|
$ cat redboot_primary_RAM/redboot.srec >/dev/ttyS1
|
$ cat redboot_primary_RAM/redboot.srec >/dev/ttyS1
|
|
|
|
|
You should see RedBoot start up:
|
You should see RedBoot start up:
|
|
|
FLASH configuration checksum error or invalid key
|
FLASH configuration checksum error or invalid key
|
Ethernet eth0: MAC address 00:30:d3:03:04:99
|
Ethernet eth0: MAC address 00:30:d3:03:04:99
|
IP: 192.168.42.111, Default server: 192.168.42.3
|
IP: 192.168.42.111, Default server: 192.168.42.3
|
|
|
RedBoot(tm) bootstrap and debug environment [RAM]
|
RedBoot(tm) bootstrap and debug environment [RAM]
|
Non-certified release, version UNKNOWN - built 13:15:40, Nov 9 2001
|
Non-certified release, version UNKNOWN - built 13:15:40, Nov 9 2001
|
|
|
Platform: AAED2000 system (ARM9) [Primary]
|
Platform: AAED2000 system (ARM9) [Primary]
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
|
|
RAM: 0x00000000-0x01f80000, 0x0006f208-0x01f51000 available
|
RAM: 0x00000000-0x01f80000, 0x0006f208-0x01f51000 available
|
FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
|
FLASH: 0x60000000 - 0x62000000, 256 blocks of 0x00020000 bytes each.
|
RedBoot>
|
RedBoot>
|
|
|
As can be seen from the output above, the network has been configured
|
As can be seen from the output above, the network has been configured
|
to give the board an IP address and information about the default
|
to give the board an IP address and information about the default
|
server. If things are not set up on your network, you can still
|
server. If things are not set up on your network, you can still
|
continue, but use the Y-modem download method when loading the RedBoot
|
continue, but use the Y-modem download method when loading the RedBoot
|
ROMRAM mode image.
|
ROMRAM mode image.
|
|
|
Now initialize RedBoot's FIS:
|
Now initialize RedBoot's FIS:
|
|
|
RedBoot> fis init
|
RedBoot> fis init
|
About to initialize [format] FLASH image system - continue (y/n)? y
|
About to initialize [format] FLASH image system - continue (y/n)? y
|
*** Initialize FLASH Image System
|
*** Initialize FLASH Image System
|
Warning: device contents not erased, some blocks may not be usable
|
Warning: device contents not erased, some blocks may not be usable
|
... Erase from 0x61fe0000-0x62000000: .
|
... Erase from 0x61fe0000-0x62000000: .
|
... Program from 0x01f5f000-0x01f5f300 at 0x61fe0000: .
|
... Program from 0x01f5f000-0x01f5f300 at 0x61fe0000: .
|
|
|
|
|
Download the ROMRAM mode image of RedBoot via ethernet:
|
Download the ROMRAM mode image of RedBoot via ethernet:
|
|
|
RedBoot> load -b %{FREEMEMLO} redboot_primary_ROMRAM/redboot.srec
|
RedBoot> load -b %{FREEMEMLO} redboot_primary_ROMRAM/redboot.srec
|
|
|
|
|
or using serial Y-modem protocol:
|
or using serial Y-modem protocol:
|
|
|
RedBoot> load -mode ymodem -b %{FREEMEMLO}
|
RedBoot> load -mode ymodem -b %{FREEMEMLO}
|
|
|
|
|
(Use the terminal emulator's Y-modem upload command to send the file
|
(Use the terminal emulator's Y-modem upload command to send the file
|
redboot_primary_ROMRAM/redboot.srec.)
|
redboot_primary_ROMRAM/redboot.srec.)
|
|
|
When the image has been downloaded, program it into flash:
|
When the image has been downloaded, program it into flash:
|
|
|
Address offset = 0x00ff8000
|
Address offset = 0x00ff8000
|
Entry point: 0x00008040, address range: 0x00008000-0x0002da80
|
Entry point: 0x00008040, address range: 0x00008000-0x0002da80
|
RedBoot> fi cr RedBoot
|
RedBoot> fi cr RedBoot
|
An image named 'RedBoot' exists - continue (y/n)? y
|
An image named 'RedBoot' exists - continue (y/n)? y
|
* CAUTION * about to program 'RedBoot'
|
* CAUTION * about to program 'RedBoot'
|
at 0x60000000..0x6003ffff from 0x00100000 - continue (y/n)? y
|
at 0x60000000..0x6003ffff from 0x00100000 - continue (y/n)? y
|
... Erase from 0x60000000-0x60040000: ..
|
... Erase from 0x60000000-0x60040000: ..
|
... Program from 0x00100000-0x00140000 at 0x60000000: ..
|
... Program from 0x00100000-0x00140000 at 0x60000000: ..
|
... Erase from 0x61fe0000-0x62000000: .
|
... Erase from 0x61fe0000-0x62000000: .
|
... Program from 0x01f5f000-0x01f7f000 at 0x61fe0000: .
|
... Program from 0x01f5f000-0x01f7f000 at 0x61fe0000: .
|
|
|
|
|
Now reset the board. You should see the RedBoot banner.
|
Now reset the board. You should see the RedBoot banner.
|
|
|
|
|
|
|
|
-->
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels,
|
and execution of Linux kernels,
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the AAED2000 are:
|
exec parameters used for the AAED2000 are:
|
|
|
-b <addr>
|
-b <addr>
|
Location Linux kernel was loaded to
|
Location Linux kernel was loaded to
|
|
|
-l <len>
|
-l <len>
|
Length of kernel
|
Length of kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
-r <addr>
|
-r <addr>
|
'initrd' ramdisk location
|
'initrd' ramdisk location
|
-s <len>
|
-s <len>
|
Length of initrd ramdisk
|
Length of initrd ramdisk
|
|
|
|
|
The parameters for kernel image base and size are automatically
|
The parameters for kernel image base and size are automatically
|
set after a load operation. So one way of starting the kernel would
|
set after a load operation. So one way of starting the kernel would
|
be:
|
be:
|
|
|
RedBoot> load -r -b 0x100000 zImage
|
RedBoot> load -r -b 0x100000 zImage
|
Raw file loaded 0x00100000-0x001a3d6c
|
Raw file loaded 0x00100000-0x001a3d6c
|
RedBoot> exec -c "console=ttyAC0,38400"
|
RedBoot> exec -c "console=ttyAC0,38400"
|
Using base address 0x00100000 and length 0x000a3d6c
|
Using base address 0x00100000 and length 0x000a3d6c
|
Uncompressing Linux.....
|
Uncompressing Linux.....
|
|
|
|
|
An image could also be put in flash and started directly:
|
An image could also be put in flash and started directly:
|
|
|
RedBoot> exec -b 0x60040000 -l 0xc0000 -c "console=ttyAC0,38400"
|
RedBoot> exec -b 0x60040000 -l 0xc0000 -c "console=ttyAC0,38400"
|
Uncompressing Linux.....
|
Uncompressing Linux.....
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The MMU page tables are located at 0x4000. NOTE</code></pre></td>
<td class="diff"><pre><code><para>The MMU page tables are located at 0x4000. <note><title>NOTE</code></pre></td>
</tr>
<tr class="diffcode">
<td class="diff"><pre><code>
|
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x01ffffff Flash
|
0x00000000 - 0x01ffffff Flash
|
0x10000000 - 0x100fffff Ethernet
|
0x10000000 - 0x100fffff Ethernet
|
0x30000000 - 0x300fffff Board registers
|
0x30000000 - 0x300fffff Board registers
|
0x40000000 - 0x4fffffff PCMCIA Slot (0)
|
0x40000000 - 0x4fffffff PCMCIA Slot (0)
|
0x50000000 - 0x5fffffff Compact Flash Slot (1)
|
0x50000000 - 0x5fffffff Compact Flash Slot (1)
|
0x80000000 - 0x800037ff I/O registers
|
0x80000000 - 0x800037ff I/O registers
|
0xb0060000 - 0xb00fffff On-chip SRAM
|
0xb0060000 - 0xb00fffff On-chip SRAM
|
0xf0000000 - 0xfd3fffff SDRAM
|
0xf0000000 - 0xfd3fffff SDRAM
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01f7ffff Y Y SDRAM
|
0x00000000 - 0x01f7ffff Y Y SDRAM
|
0x01f80000 - 0x01ffffff Y Y SDRAM (used for LCD frame buffer)
|
0x01f80000 - 0x01ffffff Y Y SDRAM (used for LCD frame buffer)
|
0x10000000 - 0x100fffff N N Ethernet
|
0x10000000 - 0x100fffff N N Ethernet
|
0x30000000 - 0x300fffff N N Board registers
|
0x30000000 - 0x300fffff N N Board registers
|
0x40000000 - 0x4fffffff N N PCMCIA Slot (0)
|
0x40000000 - 0x4fffffff N N PCMCIA Slot (0)
|
0x50000000 - 0x5fffffff N N Compact Flash Slot (1)
|
0x50000000 - 0x5fffffff N N Compact Flash Slot (1)
|
0x60000000 - 0x61ffffff N N Flash
|
0x60000000 - 0x61ffffff N N Flash
|
0x80000000 - 0x800037ff N N I/O registers
|
0x80000000 - 0x800037ff N N I/O registers
|
0xf0000000 - 0xffffffff N N SDRAM (uncached)
|
0xf0000000 - 0xffffffff N N SDRAM (uncached)
|
|
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=aaed
|
export TARGET=aaed
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=arm9/aaed2000
|
export PLATFORM_DIR=arm9/aaed2000
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/ARM9 Altera Excalibur
|
ARM/ARM9 Altera Excalibur
|
|
|
Overview
|
Overview
|
Altera Excalibur ARM9 (excalibur_arm9)
|
Altera Excalibur ARM9 (excalibur_arm9)
|
installing and testing
|
installing and testing
|
installing and testingAltera Excalibur ARM9 (excalibur_arm9)
|
installing and testingAltera Excalibur ARM9 (excalibur_arm9)
|
RedBoot supports the serial port labelled
|
RedBoot supports the serial port labelled
|
P2 on the board. The default serial port settings are 57600,8,N,1. RedBoot
|
P2 on the board. The default serial port settings are 57600,8,N,1. RedBoot
|
also supports flash management on the Excalibur.
|
also supports flash management on the Excalibur.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
REDBOOT
|
REDBOOT
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from top of RAM, but contained in
|
RedBoot running from top of RAM, but contained in
|
the board's flash boot sector.
|
the board's flash boot sector.
|
redboot_REDBOOT.ecm
|
redboot_REDBOOT.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
NOTE
|
NOTE
|
RedBoot is currently hardwired to use a 128MB SDRAM SIMM module.
|
RedBoot is currently hardwired to use a 128MB SDRAM SIMM module.
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A Windows utility
|
A Windows utility
|
(exc_flash_programmer.exe) is used to
|
(exc_flash_programmer.exe) is used to
|
program flash using the ByteBlasterMV JTAG unit.
|
program flash using the ByteBlasterMV JTAG unit.
|
See board documentation for details on
|
See board documentation for details on
|
in situ flash programming.
|
in situ flash programming.
|
For ethernet to work (under Linux) the following jumper
|
For ethernet to work (under Linux) the following jumper
|
settings should be used on a REV 2 board:
|
settings should be used on a REV 2 board:
|
SW2-9 : OFF
|
SW2-9 : OFF
|
U179 : 2-3
|
U179 : 2-3
|
JP14-18 : OPEN
|
JP14-18 : OPEN
|
JP40-41 : 2-3
|
JP40-41 : 2-3
|
JP51-55 : 2-3
|
JP51-55 : 2-3
|
|
|
|
|
|
|
|
|
Flash management
|
Flash management
|
|
|
The ROMRAM and REDBOOT configurations supported on this platform
|
The ROMRAM and REDBOOT configurations supported on this platform
|
differ only in the memory layout (ROMRAM configuration runs RedBoot from
|
differ only in the memory layout (ROMRAM configuration runs RedBoot from
|
0x00008000 while REDBOOT configuration runs RedBoot from 0x07f80000). The
|
0x00008000 while REDBOOT configuration runs RedBoot from 0x07f80000). The
|
REDBOOT configuration allows applications to be loaded and run from
|
REDBOOT configuration allows applications to be loaded and run from
|
address 0x00008000.
|
address 0x00008000.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels,
|
and execution of Linux kernels,
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the Excalibur are:
|
exec parameters used for the Excalibur are:
|
|
|
-b <addr>
|
-b <addr>
|
Location Linux kernel was loaded to
|
Location Linux kernel was loaded to
|
|
|
-l <len>
|
-l <len>
|
Length of kernel
|
Length of kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
-r <addr>
|
-r <addr>
|
'initrd' ramdisk location
|
'initrd' ramdisk location
|
-s <len>
|
-s <len>
|
Length of initrd ramdisk
|
Length of initrd ramdisk
|
|
|
|
|
The parameters for kernel image base and size are automatically
|
The parameters for kernel image base and size are automatically
|
set after a load operation. So one way of starting the kernel would
|
set after a load operation. So one way of starting the kernel would
|
be:
|
be:
|
|
|
RedBoot> load -r -b 0x100000 zImage
|
RedBoot> load -r -b 0x100000 zImage
|
Raw file loaded 0x00100000-0x001a3d6c
|
Raw file loaded 0x00100000-0x001a3d6c
|
RedBoot> exec -c "console=ttyUA0,57600"
|
RedBoot> exec -c "console=ttyUA0,57600"
|
Using base address 0x00100000 and length 0x000a3d6c
|
Using base address 0x00100000 and length 0x000a3d6c
|
Uncompressing Linux.....
|
Uncompressing Linux.....
|
|
|
|
|
An image could also be put in flash and started directly:
|
An image could also be put in flash and started directly:
|
|
|
RedBoot> exec -b 0x40400000 -l 0xc0000 -c "console=ttyUA0,57600"
|
RedBoot> exec -b 0x40400000 -l 0xc0000 -c "console=ttyUA0,57600"
|
Uncompressing Linux.....
|
Uncompressing Linux.....
|
|
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The MMU page tables are located at 0x4000. NOTE</code></pre></td>
<td class="diff"><pre><code><para>The MMU page tables are located at 0x4000. <note><title>NOTE</code></pre></td>
</tr>
<tr class="diffcode">
<td class="diff"><pre><code>
|
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x07ffffff SDRAM
|
0x00000000 - 0x07ffffff SDRAM
|
0x08000000 - 0x0805ffff On-chip SRAM
|
0x08000000 - 0x0805ffff On-chip SRAM
|
0x40000000 - 0x40ffffff Flash
|
0x40000000 - 0x40ffffff Flash
|
0x7fffc000 - 0x7fffffff I/O registers
|
0x7fffc000 - 0x7fffffff I/O registers
|
0x80000000 - 0x8001ffff PLD
|
0x80000000 - 0x8001ffff PLD
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x07ffffff Y Y SDRAM
|
0x00000000 - 0x07ffffff Y Y SDRAM
|
0x08000000 - 0x0805ffff Y Y On-chip SRAM
|
0x08000000 - 0x0805ffff Y Y On-chip SRAM
|
0x40000000 - 0x403fffff N Y Flash
|
0x40000000 - 0x403fffff N Y Flash
|
0x7fffc000 - 0x7fffffff N N I/O registers
|
0x7fffc000 - 0x7fffffff N N I/O registers
|
0x80000000 - 0x8001ffff N N PLD
|
0x80000000 - 0x8001ffff N N PLD
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=excalibur_arm9
|
export TARGET=excalibur_arm9
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=arm9/excalibur
|
export PLATFORM_DIR=arm9/excalibur
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA110) Intel EBSA 285
|
ARM/StrongARM(SA110) Intel EBSA 285
|
|
|
Overview
|
Overview
|
Intel StrongArm EBSA 285installing
|
Intel StrongArm EBSA 285installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Intel StrongArm EBSA 285RedBoot
|
Intel StrongArm EBSA 285RedBoot
|
uses the single EBSA-285 serial port. The default serial port settings are
|
uses the single EBSA-285 serial port. The default serial port settings are
|
38400,8,N,1. If the EBSA-285 is used as a host on a PCI backplane, ethernet
|
38400,8,N,1. If the EBSA-285 is used as a host on a PCI backplane, ethernet
|
is supported using an Intel PRO/100+ ethernet adapter. Management of
|
is supported using an Intel PRO/100+ ethernet adapter. Management of
|
onboard flash is also supported.
|
onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A linux application is used to program the flash over the PCI bus. Sources
|
A linux application is used to program the flash over the PCI bus. Sources
|
and build instructions for this utility are located in the RedBoot sources
|
and build instructions for this utility are located in the RedBoot sources
|
in: packages/hal/arm/ebsa285/current/support/linux/safl_util
|
in: packages/hal/arm/ebsa285/current/support/linux/safl_util
|
|
|
|
|
|
|
Communication Channels
|
Communication Channels
|
Serial, Intel PRO 10/100+ 82559 PCI ethernet card.
|
Serial, Intel PRO 10/100+ 82559 PCI ethernet card.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
Physical and virtual mapping are mapped one to one on the EBSA-285 using
|
Physical and virtual mapping are mapped one to one on the EBSA-285 using
|
a first level page table located at address 0x4000. No second level tables
|
a first level page table located at address 0x4000. No second level tables
|
are used. NOTE
|
are used. NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Address Range C B Description
|
Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01ffffff Y Y SDRAM
|
0x00000000 - 0x01ffffff Y Y SDRAM
|
0x40000000 - 0x400fffff N N 21285 Registers
|
0x40000000 - 0x400fffff N N 21285 Registers
|
0x41000000 - 0x413fffff Y N flash
|
0x41000000 - 0x413fffff Y N flash
|
0x42000000 - 0x420fffff N N 21285 CSR Space
|
0x42000000 - 0x420fffff N N 21285 CSR Space
|
0x50000000 - 0x50ffffff Y Y Cache Clean
|
0x50000000 - 0x50ffffff Y Y Cache Clean
|
0x78000000 - 0x78ffffff N N Outbound Write Flush
|
0x78000000 - 0x78ffffff N N Outbound Write Flush
|
0x79000000 - 0x7c0fffff N N PCI IACK/Config/IO
|
0x79000000 - 0x7c0fffff N N PCI IACK/Config/IO
|
0x80000000 - 0xffffffff N Y PCI Memory
|
0x80000000 - 0xffffffff N Y PCI Memory
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
Timer3 is used as a polled timer to provide timeout support for networking
|
Timer3 is used as a polled timer to provide timeout support for networking
|
and XModem file transfers.
|
and XModem file transfers.
|
|
|
|
-->
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=ebsa285
|
export TARGET=ebsa285
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=ebsa285
|
export PLATFORM_DIR=ebsa285
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA1100) Intel Brutus
|
ARM/StrongARM(SA1100) Intel Brutus
|
|
|
Overview
|
Overview
|
Intel-SA1100 (Brutus)installing
|
Intel-SA1100 (Brutus)installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Intel SA1100 (Brutus)RedBoot
|
Intel SA1100 (Brutus)RedBoot
|
supports both board serial ports on the Brutus board. The default serial port
|
supports both board serial ports on the Brutus board. The default serial port
|
settings are 38400,8,N,1. flash management is not currently supported.
|
settings are 38400,8,N,1. flash management is not currently supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
Device programmer is used to program socketed flash parts.
|
Device programmer is used to program socketed flash parts.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The first level page table is located at physical address 0xc0004000.
|
The first level page table is located at physical address 0xc0004000.
|
No second level tables are used.
|
No second level tables are used.
|
|
|
NOTE
|
NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x000fffff Boot ROM
|
0x00000000 - 0x000fffff Boot ROM
|
0x08000000 - 0x083fffff Application flash
|
0x08000000 - 0x083fffff Application flash
|
0x10000000 - 0x100fffff SRAM
|
0x10000000 - 0x100fffff SRAM
|
0x18000000 - 0x180fffff Chip Select 3
|
0x18000000 - 0x180fffff Chip Select 3
|
0x20000000 - 0x3fffffff PCMCIA
|
0x20000000 - 0x3fffffff PCMCIA
|
0x80000000 - 0xbfffffff SA-1100 Internal Registers
|
0x80000000 - 0xbfffffff SA-1100 Internal Registers
|
0xc0000000 - 0xc7ffffff DRAM Bank 0
|
0xc0000000 - 0xc7ffffff DRAM Bank 0
|
0xc8000000 - 0xcfffffff DRAM Bank 1
|
0xc8000000 - 0xcfffffff DRAM Bank 1
|
0xd0000000 - 0xd7ffffff DRAM Bank 2
|
0xd0000000 - 0xd7ffffff DRAM Bank 2
|
0xd8000000 - 0xdfffffff DRAM Bank 3
|
0xd8000000 - 0xdfffffff DRAM Bank 3
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
|
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x003fffff Y Y DRAM Bank 0
|
0x00000000 - 0x003fffff Y Y DRAM Bank 0
|
0x00400000 - 0x007fffff Y Y DRAM Bank 1
|
0x00400000 - 0x007fffff Y Y DRAM Bank 1
|
0x00800000 - 0x00bfffff Y Y DRAM Bank 2
|
0x00800000 - 0x00bfffff Y Y DRAM Bank 2
|
0x00c00000 - 0x00ffffff Y Y DRAM Bank 3
|
0x00c00000 - 0x00ffffff Y Y DRAM Bank 3
|
0x08000000 - 0x083fffff Y Y Application flash
|
0x08000000 - 0x083fffff Y Y Application flash
|
0x10000000 - 0x100fffff Y N SRAM
|
0x10000000 - 0x100fffff Y N SRAM
|
0x20000000 - 0x3fffffff N N PCMCIA
|
0x20000000 - 0x3fffffff N N PCMCIA
|
0x40000000 - 0x400fffff Y Y Boot ROM
|
0x40000000 - 0x400fffff Y Y Boot ROM
|
0x80000000 - 0xbfffffff N N SA-1100 Internal Registers
|
0x80000000 - 0xbfffffff N N SA-1100 Internal Registers
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
|
|
The SA11x0 OS timer is used as a polled timer to provide timeout
|
The SA11x0 OS timer is used as a polled timer to provide timeout
|
support for XModem file transfers.
|
support for XModem file transfers.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=brutus
|
export TARGET=brutus
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/brutus
|
export PLATFORM_DIR=sa11x0/brutus
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board
|
ARM/StrongARM(SA1100) Intel SA1100 Multimedia Board
|
|
|
Overview
|
Overview
|
Intel SA1100 Multimedia Board
|
Intel SA1100 Multimedia Board
|
installing and testinginstalling
|
installing and testinginstalling
|
and testingIntel SA1100 Multimedia Board
|
and testingIntel SA1100 Multimedia Board
|
RedBoot supports both board serial ports. The default serial port
|
RedBoot supports both board serial ports. The default serial port
|
settings are 38400,8,N,1. flash management is also supported.
|
settings are 38400,8,N,1. flash management is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A device programmer is used to program socketed flash parts.
|
A device programmer is used to program socketed flash parts.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The first level page table is located at physical address 0xc0004000.
|
The first level page table is located at physical address 0xc0004000.
|
No second level tables are used.NOTE
|
No second level tables are used.NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x000fffff Boot flash
|
0x00000000 - 0x000fffff Boot flash
|
0x08000000 - 0x083fffff Application flash
|
0x08000000 - 0x083fffff Application flash
|
0x10000000 - 0x107fffff SA-1101 Board Registers
|
0x10000000 - 0x107fffff SA-1101 Board Registers
|
0x18000000 - 0x180fffff Ct8020 DSP
|
0x18000000 - 0x180fffff Ct8020 DSP
|
0x18400000 - 0x184fffff XBusReg
|
0x18400000 - 0x184fffff XBusReg
|
0x18800000 - 0x188fffff SysRegA
|
0x18800000 - 0x188fffff SysRegA
|
0x18c00000 - 0x18cfffff SysRegB
|
0x18c00000 - 0x18cfffff SysRegB
|
0x19000000 - 0x193fffff Spare CPLD A
|
0x19000000 - 0x193fffff Spare CPLD A
|
0x19400000 - 0x197fffff Spare CPLD B
|
0x19400000 - 0x197fffff Spare CPLD B
|
0x20000000 - 0x3fffffff PCMCIA
|
0x20000000 - 0x3fffffff PCMCIA
|
0x80000000 - 0xbfffffff SA1100 Internal Registers
|
0x80000000 - 0xbfffffff SA1100 Internal Registers
|
0xc0000000 - 0xc07fffff DRAM Bank 0
|
0xc0000000 - 0xc07fffff DRAM Bank 0
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
|
|
|
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x007fffff Y Y DRAM Bank 0
|
0x00000000 - 0x007fffff Y Y DRAM Bank 0
|
0x08000000 - 0x083fffff Y Y Application flash
|
0x08000000 - 0x083fffff Y Y Application flash
|
0x10000000 - 0x100fffff N N SA-1101 Registers
|
0x10000000 - 0x100fffff N N SA-1101 Registers
|
0x18000000 - 0x180fffff N N Ct8020 DSP
|
0x18000000 - 0x180fffff N N Ct8020 DSP
|
0x18400000 - 0x184fffff N N XBusReg
|
0x18400000 - 0x184fffff N N XBusReg
|
0x18800000 - 0x188fffff N N SysRegA
|
0x18800000 - 0x188fffff N N SysRegA
|
0x18c00000 - 0x18cfffff N N SysRegB
|
0x18c00000 - 0x18cfffff N N SysRegB
|
0x19000000 - 0x193fffff N N Spare CPLD A
|
0x19000000 - 0x193fffff N N Spare CPLD A
|
0x19400000 - 0x197fffff N N Spare CPLD B
|
0x19400000 - 0x197fffff N N Spare CPLD B
|
0x20000000 - 0x3fffffff N N PCMCIA
|
0x20000000 - 0x3fffffff N N PCMCIA
|
0x50000000 - 0x500fffff Y Y Boot flash
|
0x50000000 - 0x500fffff Y Y Boot flash
|
0x80000000 - 0xbfffffff N N SA1100 Internal Registers
|
0x80000000 - 0xbfffffff N N SA1100 Internal Registers
|
0xc0000000 - 0xc07fffff N Y DRAM Bank 0
|
0xc0000000 - 0xc07fffff N Y DRAM Bank 0
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
The SA11x0 OS timer is used as a polled timer to provide timeout support
|
The SA11x0 OS timer is used as a polled timer to provide timeout support
|
for XModem file transfers.
|
for XModem file transfers.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=sa1100mm
|
export TARGET=sa1100mm
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/sa1100mm
|
export PLATFORM_DIR=sa11x0/sa1100mm
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA1110) Intel SA1110 (Assabet)
|
ARM/StrongARM(SA1110) Intel SA1110 (Assabet)
|
|
|
Overview
|
Overview
|
Intel SA1110 (Assabet)installing
|
Intel SA1110 (Assabet)installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Intel SA1110 (Assabet)RedBoot
|
Intel SA1110 (Assabet)RedBoot
|
supports the board serial port and the compact flash ethernet port. The default
|
supports the board serial port and the compact flash ethernet port. The default
|
serial port settings are 38400,8,N,1. RedBoot also supports flash management
|
serial port settings are 38400,8,N,1. RedBoot also supports flash management
|
on the Assabet.
|
on the Assabet.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A Windows or Linux utility is used to program flash over parallel port
|
A Windows or Linux utility is used to program flash over parallel port
|
driven JTAG interface. See board documentation for details on in situ flash
|
driven JTAG interface. See board documentation for details on in situ flash
|
programming.
|
programming.
|
The flash parts are also socketed and may be programmed in a suitable
|
The flash parts are also socketed and may be programmed in a suitable
|
device programmer.
|
device programmer.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The first level page table is located at physical address 0xc0004000.
|
The first level page table is located at physical address 0xc0004000.
|
No second level tables are used.NOTE
|
No second level tables are used.NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x07ffffff flash
|
0x00000000 - 0x07ffffff flash
|
0x08000000 - 0x0fffffff SA-1111 Board flash
|
0x08000000 - 0x0fffffff SA-1111 Board flash
|
0x10000000 - 0x17ffffff Board Registers
|
0x10000000 - 0x17ffffff Board Registers
|
0x18000000 - 0x1fffffff Ethernet
|
0x18000000 - 0x1fffffff Ethernet
|
0x20000000 - 0x2fffffff SA-1111 Board PCMCIA
|
0x20000000 - 0x2fffffff SA-1111 Board PCMCIA
|
0x30000000 - 0x3fffffff Compact Flash
|
0x30000000 - 0x3fffffff Compact Flash
|
0x40000000 - 0x47ffffff SA-1111 Board
|
0x40000000 - 0x47ffffff SA-1111 Board
|
0x48000000 - 0x4bffffff GFX
|
0x48000000 - 0x4bffffff GFX
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0xc0000000 - 0xc7ffffff DRAM Bank 0
|
0xc0000000 - 0xc7ffffff DRAM Bank 0
|
0xc8000000 - 0xcfffffff DRAM Bank 1
|
0xc8000000 - 0xcfffffff DRAM Bank 1
|
0xd0000000 - 0xd7ffffff DRAM Bank 2
|
0xd0000000 - 0xd7ffffff DRAM Bank 2
|
0xd8000000 - 0xdfffffff DRAM Bank 3
|
0xd8000000 - 0xdfffffff DRAM Bank 3
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
|
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01ffffff Y Y DRAM Bank 0
|
0x00000000 - 0x01ffffff Y Y DRAM Bank 0
|
0x08000000 - 0x0fffffff Y Y SA-1111 Board flash
|
0x08000000 - 0x0fffffff Y Y SA-1111 Board flash
|
0x10000000 - 0x17ffffff N N Board Registers
|
0x10000000 - 0x17ffffff N N Board Registers
|
0x18000000 - 0x1fffffff N N Ethernet
|
0x18000000 - 0x1fffffff N N Ethernet
|
0x20000000 - 0x2fffffff N N SA-1111 Board PCMCIA
|
0x20000000 - 0x2fffffff N N SA-1111 Board PCMCIA
|
0x30000000 - 0x3fffffff N N Compact Flash
|
0x30000000 - 0x3fffffff N N Compact Flash
|
0x40000000 - 0x47ffffff N N SA-1111 Board
|
0x40000000 - 0x47ffffff N N SA-1111 Board
|
0x48000000 - 0x4bffffff N N GFX
|
0x48000000 - 0x4bffffff N N GFX
|
0x50000000 - 0x57ffffff Y Y flash
|
0x50000000 - 0x57ffffff Y Y flash
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
The SA11x0 OS timer is used as a polled timer to provide timeout support
|
The SA11x0 OS timer is used as a polled timer to provide timeout support
|
for network and XModem file transfers.
|
for network and XModem file transfers.
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=assabet
|
export TARGET=assabet
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/assabet
|
export PLATFORM_DIR=sa11x0/assabet
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA11X0) Bright Star Engineering commEngine and nanoEngine
|
ARM/StrongARM(SA11X0) Bright Star Engineering commEngine and nanoEngine
|
|
|
Overview
|
Overview
|
commEngineinstalling and testing
|
commEngineinstalling and testing
|
nanoEngine
|
nanoEngine
|
installing and testinginstalling
|
installing and testinginstalling
|
and testingcommEngine
|
and testingcommEngine
|
installing and testingnanoEngine
|
installing and testingnanoEngine
|
RedBoot supports a serial port and the built in ethernet port
|
RedBoot supports a serial port and the built in ethernet port
|
for communication and downloads. The default serial port settings are 38400,8,N,1.
|
for communication and downloads. The default serial port settings are 38400,8,N,1.
|
RedBoot runs from and supports flash management for the system flash
|
RedBoot runs from and supports flash management for the system flash
|
region.
|
region.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
POST
|
POST
|
[ROM]
|
[ROM]
|
RedBoot running from the first free flash block
|
RedBoot running from the first free flash block
|
at 0x40000.
|
at 0x40000.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
Unlike other targets, the nanoEngine comes equipped with boot firmware
|
Unlike other targets, the nanoEngine comes equipped with boot firmware
|
which you cannot modify. See chapter 5, "nanoEngine Firmware" of the
|
which you cannot modify. See chapter 5, "nanoEngine Firmware" of the
|
nanoEngine Hardware Reference Manual (we refer to "July 17, 2000
|
nanoEngine Hardware Reference Manual (we refer to "July 17, 2000
|
Rev 0.6") from Bright Star Engineering.
|
Rev 0.6") from Bright Star Engineering.
|
Because of this, eCos, and therefore Redboot, only supports a
|
Because of this, eCos, and therefore Redboot, only supports a
|
special configuration of the ROM mode, starting at offset 0x40000 in
|
special configuration of the ROM mode, starting at offset 0x40000 in
|
the flash.
|
the flash.
|
Briefly, the POST-configuration RedBoot image lives in flash following the
|
Briefly, the POST-configuration RedBoot image lives in flash following the
|
BSE firmware. The BSE firmware is configured, using its standard
|
BSE firmware. The BSE firmware is configured, using its standard
|
bootcmd command, to run RedBoot at startup.
|
bootcmd command, to run RedBoot at startup.
|
|
|
|
|
|
|
Download Instructions
|
Download Instructions
|
You can perform the initial load of the POST-configuration RedBoot image into
|
You can perform the initial load of the POST-configuration RedBoot image into
|
flash using the BSE firmware's load command.
|
flash using the BSE firmware's load command.
|
This will load a binary file, using TFTP, and program it into flash in one
|
This will load a binary file, using TFTP, and program it into flash in one
|
operation. Because no memory management is used in the BSE firmware, flash
|
operation. Because no memory management is used in the BSE firmware, flash
|
is mapped from address zero upwards, so the address for the RedBoot POST image
|
is mapped from address zero upwards, so the address for the RedBoot POST image
|
is 0x40000. You must use the binary version of RedBoot for this,
|
is 0x40000. You must use the binary version of RedBoot for this,
|
redboot-post.bin.
|
redboot-post.bin.
|
|
|
This assumes you have set up the other BSE firmware config
|
This assumes you have set up the other BSE firmware config
|
parameters such that it can communicate over your network to your TFTP
|
parameters such that it can communicate over your network to your TFTP
|
server.
|
server.
|
>load redboot-post.bin 40000
|
>load redboot-post.bin 40000
|
loading ... erasing blk at 00040000
|
loading ... erasing blk at 00040000
|
erasing blk at 00050000
|
erasing blk at 00050000
|
94168 bytes loaded cksum 00008579
|
94168 bytes loaded cksum 00008579
|
done
|
done
|
>
|
>
|
> set bootcmd "go 40000"
|
> set bootcmd "go 40000"
|
> get
|
> get
|
myip = 10.16.19.198
|
myip = 10.16.19.198
|
netmask = 255.255.255.0
|
netmask = 255.255.255.0
|
eth = 0
|
eth = 0
|
gateway = 10.16.19.66
|
gateway = 10.16.19.66
|
serverip = 10.16.19.66
|
serverip = 10.16.19.66
|
bootcmd = go 40000
|
bootcmd = go 40000
|
>
|
>
|
|
|
NOTE
|
NOTE
|
the BSE firmware runs its serial IO at 9600 Baud; RedBoot runs instead
|
the BSE firmware runs its serial IO at 9600 Baud; RedBoot runs instead
|
at 38400 Baud. You must select the right baud rate in your terminal program
|
at 38400 Baud. You must select the right baud rate in your terminal program
|
to be able to set up the BSE firmware.
|
to be able to set up the BSE firmware.
|
|
|
|
|
After a reset, the BSE firmware will print
|
After a reset, the BSE firmware will print
|
|
|
Boot: BSE 2000 Sep 12 2000 14:00:30
|
Boot: BSE 2000 Sep 12 2000 14:00:30
|
autoboot: "go 40000" [hit ESC to abort]
|
autoboot: "go 40000" [hit ESC to abort]
|
|
|
and then RedBoot starts, switching to 38400 Baud.
|
and then RedBoot starts, switching to 38400 Baud.
|
|
|
Once you have installed a bootable RedBoot in the system in this
|
Once you have installed a bootable RedBoot in the system in this
|
manner, we advise re-installing using the generic method described in
|
manner, we advise re-installing using the generic method described in
|
in order that the Flash Image System
|
in order that the Flash Image System
|
contains an appropriate description of the flash entries.
|
contains an appropriate description of the flash entries.
|
|
|
|
|
Cohabiting with POST in Flash
|
Cohabiting with POST in Flash
|
The configuration file named redboot_POST.ecm
|
The configuration file named redboot_POST.ecm
|
configures RedBoot to build for execution at address 0x50040000 (or, during
|
configures RedBoot to build for execution at address 0x50040000 (or, during
|
bootup, 0x00040000). This is to allow power-on self-test (POST) code or immutable
|
bootup, 0x00040000). This is to allow power-on self-test (POST) code or immutable
|
firmware to live in the lower addresses of the flash and to run before RedBoot
|
firmware to live in the lower addresses of the flash and to run before RedBoot
|
gets control. The assumption is that RedBoot will be entered at its base address
|
gets control. The assumption is that RedBoot will be entered at its base address
|
in physical memory, that is 0x00040000.
|
in physical memory, that is 0x00040000.
|
|
|
Alternatively, for testing, you can call it in an already running system
|
Alternatively, for testing, you can call it in an already running system
|
by using go 0x50040040 at another RedBoot prompt, or
|
by using go 0x50040040 at another RedBoot prompt, or
|
a branch to that address. The address is where the reset vector
|
a branch to that address. The address is where the reset vector
|
points. It is reported by RedBoot's load command
|
points. It is reported by RedBoot's load command
|
and listed
|
and listed
|
by the fis list command, amongst other
|
by the fis list command, amongst other
|
places.
|
places.
|
|
|
Using the POST configuration enables a normal config option which causes
|
Using the POST configuration enables a normal config option which causes
|
linking and initialization against memory layout files called "...post..."
|
linking and initialization against memory layout files called "...post..."
|
rather than "...rom..." or "...ram..." in the include/pkgconf
|
rather than "...rom..." or "...ram..." in the include/pkgconf
|
directory. Specifically:include/pkgconf/mlt_arm_sa11x0_nano_post.h
|
directory. Specifically:include/pkgconf/mlt_arm_sa11x0_nano_post.h
|
include/pkgconf/mlt_arm_sa11x0_nano_post.ldi
|
include/pkgconf/mlt_arm_sa11x0_nano_post.ldi
|
include/pkgconf/mlt_arm_sa11x0_nano_post.mlt
|
include/pkgconf/mlt_arm_sa11x0_nano_post.mlt
|
|
|
It is these you should edit if you wish to move the execution address
|
It is these you should edit if you wish to move the execution address
|
from 0x50040000 in the POST configuration. Startup mode naturally
|
from 0x50040000 in the POST configuration. Startup mode naturally
|
remains ROM in this configuration.
|
remains ROM in this configuration.
|
|
|
Because the nanoEngine contains immutable boot firmware at the start
|
Because the nanoEngine contains immutable boot firmware at the start
|
of flash, RedBoot for this target is configured to reserve that area in the
|
of flash, RedBoot for this target is configured to reserve that area in the
|
Flash Image System, and to create by default an entry for the POST
|
Flash Image System, and to create by default an entry for the POST
|
mode RedBoot.
|
mode RedBoot.
|
|
|
RedBoot> fis list
|
RedBoot> fis list
|
Name FLASH addr Mem addr Length Entry point
|
Name FLASH addr Mem addr Length Entry point
|
(reserved) 0x50000000 0x50000000 0x00040000 0x00000000
|
(reserved) 0x50000000 0x50000000 0x00040000 0x00000000
|
RedBoot[post] 0x50040000 0x00100000 0x00020000 0x50040040
|
RedBoot[post] 0x50040000 0x00100000 0x00020000 0x50040040
|
RedBoot config 0x503E0000 0x503E0000 0x00010000 0x00000000
|
RedBoot config 0x503E0000 0x503E0000 0x00010000 0x00000000
|
FIS directory 0x503F0000 0x503F0000 0x00010000 0x00000000
|
FIS directory 0x503F0000 0x503F0000 0x00010000 0x00000000
|
RedBoot>
|
RedBoot>
|
|
|
The entry "(reserved)" ensures that the FIS cannot attempt
|
The entry "(reserved)" ensures that the FIS cannot attempt
|
to overwrite the BSE firmware, thus ensuring that the board remains bootable
|
to overwrite the BSE firmware, thus ensuring that the board remains bootable
|
and recoverable even after installing a broken RedBoot image.
|
and recoverable even after installing a broken RedBoot image.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The nanoEngine/commEngine has one or two Intel i82559 Ethernet controllers
|
The nanoEngine/commEngine has one or two Intel i82559 Ethernet controllers
|
installed, but these have no associated serial EEPROM in which to record their
|
installed, but these have no associated serial EEPROM in which to record their
|
Ethernet Station Address (ESA, or MAC address). The BSE firmware records an
|
Ethernet Station Address (ESA, or MAC address). The BSE firmware records an
|
ESA for the device it uses, but this information is not available to RedBoot;
|
ESA for the device it uses, but this information is not available to RedBoot;
|
we cannot share it.
|
we cannot share it.
|
To keep the ESAs for the two ethernet interfaces, two new items of RedBoot
|
To keep the ESAs for the two ethernet interfaces, two new items of RedBoot
|
configuration data are introduced. You can list them with the RedBoot command
|
configuration data are introduced. You can list them with the RedBoot command
|
fconfig -l thus:
|
fconfig -l thus:
|
|
|
RedBoot> fconfig -l
|
RedBoot> fconfig -l
|
Run script at boot: false
|
Run script at boot: false
|
Use BOOTP for network configuration: false
|
Use BOOTP for network configuration: false
|
Local IP address: 10.16.19.91
|
Local IP address: 10.16.19.91
|
Default server IP address: 10.16.19.66
|
Default server IP address: 10.16.19.66
|
Network hardware address [MAC] for eth0: 0x00:0xB5:0xE0:0xB5:0xE0:0x99
|
Network hardware address [MAC] for eth0: 0x00:0xB5:0xE0:0xB5:0xE0:0x99
|
Network hardware address [MAC] for eth1: 0x00:0xB5:0xE0:0xB5:0xE0:0x9A
|
Network hardware address [MAC] for eth1: 0x00:0xB5:0xE0:0xB5:0xE0:0x9A
|
GDB connection port: 9000
|
GDB connection port: 9000
|
Network debug at boot time: false
|
Network debug at boot time: false
|
RedBoot>
|
RedBoot>
|
|
|
You should set them before running RedBoot or eCos applications with
|
You should set them before running RedBoot or eCos applications with
|
the board connected to a network. The fconfig
|
the board connected to a network. The fconfig
|
command can be used as for any configuration data item; the entire ESA
|
command can be used as for any configuration data item; the entire ESA
|
is entered in one line.
|
is entered in one line.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The first level page table is located at physical address 0xc0004000.
|
The first level page table is located at physical address 0xc0004000.
|
No second level tables are used. NOTE
|
No second level tables are used. NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x003fffff 4Mb FLASH (nCS0)
|
0x00000000 - 0x003fffff 4Mb FLASH (nCS0)
|
0x18000000 - 0x18ffffff Internal PCI bus - 2 x i82559 ethernet
|
0x18000000 - 0x18ffffff Internal PCI bus - 2 x i82559 ethernet
|
0x40000000 - 0x4fffffff External IO or PCI bus
|
0x40000000 - 0x4fffffff External IO or PCI bus
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0xc0000000 - 0xc7ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xc0000000 - 0xc7ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xc8000000 - 0xcfffffff DRAM Bank 1 - empty
|
0xc8000000 - 0xcfffffff DRAM Bank 1 - empty
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x001fffff Y Y DRAM - 8Mb to 32Mb
|
0x00000000 - 0x001fffff Y Y DRAM - 8Mb to 32Mb
|
0x18000000 - 0x180fffff N N Internal PCI bus - 2 x i82559 ethernet
|
0x18000000 - 0x180fffff N N Internal PCI bus - 2 x i82559 ethernet
|
0x40000000 - 0x4fffffff N N External IO or PCI bus
|
0x40000000 - 0x4fffffff N N External IO or PCI bus
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0xc0000000 - 0xc0ffffff N Y DRAM Bank 0: 8 or 16Mb
|
0xc0000000 - 0xc0ffffff N Y DRAM Bank 0: 8 or 16Mb
|
0xc8000000 - 0xc8ffffff N Y DRAM Bank 1: 8 or 16Mb or absent
|
0xc8000000 - 0xc8ffffff N Y DRAM Bank 1: 8 or 16Mb or absent
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
The ethernet devices use a "PCI window" to communicate with the CPU.
|
The ethernet devices use a "PCI window" to communicate with the CPU.
|
This is 1Mb of SDRAM which is shared with the ethernet devices that are on
|
This is 1Mb of SDRAM which is shared with the ethernet devices that are on
|
the PCI bus. It is neither cached nor buffered, to ensure that CPU and PCI
|
the PCI bus. It is neither cached nor buffered, to ensure that CPU and PCI
|
accesses see correct data in the correct order. By default it is configured
|
accesses see correct data in the correct order. By default it is configured
|
to be megabyte number 30, at addresses 0x01e00000-0x01efffff. This can be
|
to be megabyte number 30, at addresses 0x01e00000-0x01efffff. This can be
|
modified, and indeed must be, if less than 32Mb of SDRAM is installed, via
|
modified, and indeed must be, if less than 32Mb of SDRAM is installed, via
|
the memory layout tool, or by moving the section __pci_window
|
the memory layout tool, or by moving the section __pci_window
|
referred to by symbols CYGMEM_SECTION_pci_window*
|
referred to by symbols CYGMEM_SECTION_pci_window*
|
in the linker script.
|
in the linker script.
|
Though the nanoEngine ships with 32Mb of SDRAM all attached to DRAM
|
Though the nanoEngine ships with 32Mb of SDRAM all attached to DRAM
|
bank 0, the code can cope with any of these combinations also; "2 x " in this
|
bank 0, the code can cope with any of these combinations also; "2 x " in this
|
context means one device in each DRAM Bank. 1 x 8Mb = 8Mb 2 x 8Mb = 16Mb
|
context means one device in each DRAM Bank. 1 x 8Mb = 8Mb 2 x 8Mb = 16Mb
|
1 x 16Mb = 16Mb 2 x 16Mb = 32MbAll are programmed the same
|
1 x 16Mb = 16Mb 2 x 16Mb = 32MbAll are programmed the same
|
in the memory controller.
|
in the memory controller.
|
Startup code detects which is fitted and programs the memory map accordingly.
|
Startup code detects which is fitted and programs the memory map accordingly.
|
If the device(s) is 8Mb, then there are gaps in the physical memory map, because
|
If the device(s) is 8Mb, then there are gaps in the physical memory map, because
|
a high order address bit is not connected. The gaps are the higher 2Mb out
|
a high order address bit is not connected. The gaps are the higher 2Mb out
|
of every 4Mb.
|
of every 4Mb.
|
|
|
The SA11x0 OS timer is used as a polled timer to provide timeout
|
The SA11x0 OS timer is used as a polled timer to provide timeout
|
support within RedBoot.
|
support within RedBoot.
|
|
|
|
|
Nano Platform Port
|
Nano Platform Port
|
The nano is in the set of SA11X0-based platforms. It uses the arm architectural
|
The nano is in the set of SA11X0-based platforms. It uses the arm architectural
|
HAL, the sa11x0 variant HAL, plus the nano platform hal. These are components
|
HAL, the sa11x0 variant HAL, plus the nano platform hal. These are components
|
CYGPKG_HAL_ARM hal/arm/arch/
|
CYGPKG_HAL_ARM hal/arm/arch/
|
CYGPKG_HAL_ARM_SA11X0 hal/arm/sa11x0/var
|
CYGPKG_HAL_ARM_SA11X0 hal/arm/sa11x0/var
|
CYGPKG_HAL_ARM_SA11X0_NANO hal/arm/sa11x0/nano respectively.
|
CYGPKG_HAL_ARM_SA11X0_NANO hal/arm/sa11x0/nano respectively.
|
|
|
The target name is "nano" which includes all these, plus the ethernet
|
The target name is "nano" which includes all these, plus the ethernet
|
driver packages, flash driver, and so on.
|
driver packages, flash driver, and so on.
|
|
|
|
|
Ethernet Driver
|
Ethernet Driver
|
The ethernet driver is in two parts:
|
The ethernet driver is in two parts:
|
A generic ether driver for Intel i8255x series devices, specifically
|
A generic ether driver for Intel i8255x series devices, specifically
|
the i82559, is devs/eth/intel/i82559. Its
|
the i82559, is devs/eth/intel/i82559. Its
|
package name is CYGPKG_DEVS_ETH_INTEL_I82559.
|
package name is CYGPKG_DEVS_ETH_INTEL_I82559.
|
|
|
The platform-specific ether driver is devs/eth/arm/nano
|
The platform-specific ether driver is devs/eth/arm/nano
|
. Its package is CYGPKG_DEVS_ETH_ARM_NANO
|
. Its package is CYGPKG_DEVS_ETH_ARM_NANO
|
. This tells the generic driver the address in IO memory
|
. This tells the generic driver the address in IO memory
|
of the chip, for example, and other configuration details. This driver picks
|
of the chip, for example, and other configuration details. This driver picks
|
up the ESA from RedBoot's configuration data - unless configured to use a
|
up the ESA from RedBoot's configuration data - unless configured to use a
|
static ESA in the usual manner.
|
static ESA in the usual manner.
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=nano
|
export TARGET=nano
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/nano
|
export PLATFORM_DIR=sa11x0/nano
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA11X0) Compaq iPAQ PocketPC
|
ARM/StrongARM(SA11X0) Compaq iPAQ PocketPC
|
Compaq iPAQ PocketPCinstalling and
|
Compaq iPAQ PocketPCinstalling and
|
testinginstalling and testing
|
testinginstalling and testing
|
Compaq iPAQ PocketPC
|
Compaq iPAQ PocketPC
|
|
|
Overview
|
Overview
|
RedBoot supports the serial port via cradle or cable, and Compact Flash
|
RedBoot supports the serial port via cradle or cable, and Compact Flash
|
ethernet cards if fitted for communication and downloads. The LCD touchscreen
|
ethernet cards if fitted for communication and downloads. The LCD touchscreen
|
may also be used for the console, although by default RedBoot will switch
|
may also be used for the console, although by default RedBoot will switch
|
exclusively to one channel once input arrives.
|
exclusively to one channel once input arrives.
|
The default serial port settings are 38400,8,N,1. RedBoot runs from
|
The default serial port settings are 38400,8,N,1. RedBoot runs from
|
and supports flash management for the system flash region.
|
and supports flash management for the system flash region.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
WinCE
|
WinCE
|
[RAM]
|
[RAM]
|
RedBoot running from RAM, started from
|
RedBoot running from RAM, started from
|
OSloader.
|
OSloader.
|
redboot_WinCE.ecm
|
redboot_WinCE.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot ROM and WinCE mode images are needed by the installation process.
|
RedBoot ROM and WinCE mode images are needed by the installation process.
|
|
|
|
|
Installing RedBoot on the iPAQ using Windows/CE
|
Installing RedBoot on the iPAQ using Windows/CE
|
|
|
The Windows/CE environment originally shipped with the iPAQ contains a hidden
|
The Windows/CE environment originally shipped with the iPAQ contains a hidden
|
mini-loader, sometimes referred to as the "Parrot" loader. This loader can
|
mini-loader, sometimes referred to as the "Parrot" loader. This loader can
|
be started by holding down the action button (the joypad) while resetting
|
be started by holding down the action button (the joypad) while resetting
|
the unit or when powering on. At this point, a blue bird will appear on
|
the unit or when powering on. At this point, a blue bird will appear on
|
the LCD screen. Also at this point, a simple loader can be accessed over the
|
the LCD screen. Also at this point, a simple loader can be accessed over the
|
serial port at 115200/8N1. Using this loader, the contents of the iPAQ flash
|
serial port at 115200/8N1. Using this loader, the contents of the iPAQ flash
|
memory can be saved to a Compact Flash memory card.
|
memory can be saved to a Compact Flash memory card.
|
NOTEWe have only tested this operation with a 32Mbyte CF memory card.
|
NOTEWe have only tested this operation with a 32Mbyte CF memory card.
|
Given that the backup will take 16MBytes + 1KByte, something more than a 16MByte
|
Given that the backup will take 16MBytes + 1KByte, something more than a 16MByte
|
card will be required.
|
card will be required.
|
|
|
|
|
Use the "r2c" command to dump Flash contents to the CF memory card. Once this
|
Use the "r2c" command to dump Flash contents to the CF memory card. Once this
|
completes, RedBoot can be installed with no fear since the Parrot loader can
|
completes, RedBoot can be installed with no fear since the Parrot loader can
|
be used to restore the Flash contents at a later time.
|
be used to restore the Flash contents at a later time.
|
|
|
|
|
If you expect to completely recover the state of the iPAQ Win/CE environment, then
|
If you expect to completely recover the state of the iPAQ Win/CE environment, then
|
HotSync should be run to backup all "RAM" files as well before installing RedBoot.
|
HotSync should be run to backup all "RAM" files as well before installing RedBoot.
|
|
|
The next step in installing RedBoot on the iPAQ actually involves Windows/CE,
|
The next step in installing RedBoot on the iPAQ actually involves Windows/CE,
|
which is the native environment on the unit. Using WinCE, you need to
|
which is the native environment on the unit. Using WinCE, you need to
|
install an application which will run a RAM based version of RedBoot. Once
|
install an application which will run a RAM based version of RedBoot. Once
|
this is installed and running, RedBoot can be used to update the flash with
|
this is installed and running, RedBoot can be used to update the flash with
|
a native/ROM version of RedBoot.
|
a native/ROM version of RedBoot.
|
Using ActiveSync, copy the file OSloader to your iPAQ.
|
Using ActiveSync, copy the file OSloader to your iPAQ.
|
|
|
Using ActiveSync, copy the file redboot_WinCE.bin to the iPAQ
|
Using ActiveSync, copy the file redboot_WinCE.bin to the iPAQ
|
as bootldr in its root directory. Note: this is not the top level folder
|
as bootldr in its root directory. Note: this is not the top level folder
|
displayed by Windows (Mobile Device), but rather the 'My Pocket PC' folder
|
displayed by Windows (Mobile Device), but rather the 'My Pocket PC' folder
|
within it.
|
within it.
|
|
|
Execute OSloader. If you didn't create a shortcut, then you
|
Execute OSloader. If you didn't create a shortcut, then you
|
will have to poke around for it using the WinCE file explorer.
|
will have to poke around for it using the WinCE file explorer.
|
|
|
Choose the Tools->BootLdr->Run after loading
|
Choose the Tools->BootLdr->Run after loading
|
from file menu item.
|
from file menu item.
|
|
|
At this point, the RAM based version of RedBoot should be running.
|
At this point, the RAM based version of RedBoot should be running.
|
You should be able to return to this point by just executing the last two
|
You should be able to return to this point by just executing the last two
|
steps of the previous process if necessary.
|
steps of the previous process if necessary.
|
|
|
|
|
Installing RedBoot on the iPAQ - using the Compaq boot loader
|
Installing RedBoot on the iPAQ - using the Compaq boot loader
|
This method of installation is no longer supported.
|
This method of installation is no longer supported.
|
If you have previously installed either the Compaq boot loader or older
|
If you have previously installed either the Compaq boot loader or older
|
versions of RedBoot, restore the Win/CE environment and proceed as outlined
|
versions of RedBoot, restore the Win/CE environment and proceed as outlined
|
above.
|
above.
|
|
|
|
|
|
|
Setting up and testing RedBoot
|
Setting up and testing RedBoot
|
When RedBoot first comes up, it will want to initialize its LCD touch
|
When RedBoot first comes up, it will want to initialize its LCD touch
|
screen parameters. It does this by displaying a keyboard graphic and asks
|
screen parameters. It does this by displaying a keyboard graphic and asks
|
you to press certain keys. Using the stylus, press and hold until the prompt
|
you to press certain keys. Using the stylus, press and hold until the prompt
|
is withdrawn. When you lift the stylus, RedBoot will continue with the next
|
is withdrawn. When you lift the stylus, RedBoot will continue with the next
|
calibration.
|
calibration.
|
Once the LCD touchscreen has been calibrated, RedBoot will start. The
|
Once the LCD touchscreen has been calibrated, RedBoot will start. The
|
calibration step can be skipped by pressing the return/abort
|
calibration step can be skipped by pressing the return/abort
|
button on the unit (right most button with a curved arrow icon). Additionally,
|
button on the unit (right most button with a curved arrow icon). Additionally,
|
the unit will assume default values if the screen is not touched within about
|
the unit will assume default values if the screen is not touched within about
|
15 seconds.
|
15 seconds.
|
Once RedBoot has started, you should get information similar to this
|
Once RedBoot has started, you should get information similar to this
|
on the LCD screen. It will also appear on the serial port at 38400,8,N,1.
|
on the LCD screen. It will also appear on the serial port at 38400,8,N,1.
|
|
|
RedBoot(tm) bootstrap and debug environment [ROM]
|
RedBoot(tm) bootstrap and debug environment [ROM]
|
Non-certified release, version UNKNOWN - built 06:17:41, Mar 19 2001
|
Non-certified release, version UNKNOWN - built 06:17:41, Mar 19 2001
|
Platform: Compaq iPAQ Pocket PC (StrongARM 1110)
|
Platform: Compaq iPAQ Pocket PC (StrongARM 1110)
|
|
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
Copyright (C) 2000, 2001, Red Hat, Inc.
|
|
|
RAM: 0x00000000-0x01fc0000, 0x0001f200-0x01f70000 available
|
RAM: 0x00000000-0x01fc0000, 0x0001f200-0x01f70000 available
|
FLASH: 0x50000000 - 0x51000000, 64 blocks of 0x00040000 bytes
|
FLASH: 0x50000000 - 0x51000000, 64 blocks of 0x00040000 bytes
|
each.
|
each.
|
|
|
Since the LCD touchscreen is only 30 characters wide, some of this
|
Since the LCD touchscreen is only 30 characters wide, some of this
|
data will be off the right hand side of the display. The joypad may be
|
data will be off the right hand side of the display. The joypad may be
|
used to pan left and right in order to see the full lines.
|
used to pan left and right in order to see the full lines.
|
If you have a Compact Flash ethernet card, RedBoot should find
|
If you have a Compact Flash ethernet card, RedBoot should find
|
it. You'll need to have BOOTP enabled for this unit (see your
|
it. You'll need to have BOOTP enabled for this unit (see your
|
sysadmin for details). If it does, it will print a message like:
|
sysadmin for details). If it does, it will print a message like:
|
|
|
... Waiting for network card: .Ready!
|
... Waiting for network card: .Ready!
|
Socket Communications Inc: CF+ LPE Revision E 08/04/99
|
Socket Communications Inc: CF+ LPE Revision E 08/04/99
|
IP: 192.168.1.34, Default server: 192.168.1.101
|
IP: 192.168.1.34, Default server: 192.168.1.101
|
|
|
|
|
|
|
Installing RedBoot permanently
|
Installing RedBoot permanently
|
Once you are satisfied with the setup and that RedBoot is operating
|
Once you are satisfied with the setup and that RedBoot is operating
|
properly in your environment, you can set up your iPAQ unit to have RedBoot
|
properly in your environment, you can set up your iPAQ unit to have RedBoot
|
be the bootstrap application.
|
be the bootstrap application.
|
|
|
CAUTION
|
CAUTION
|
This step will destroy your Windows/CE environment.
|
This step will destroy your Windows/CE environment.
|
Before you take this step, it is strongly recommended you save your WinCE FLASH contents
|
Before you take this step, it is strongly recommended you save your WinCE FLASH contents
|
as outlined above using the "parrot" loader, or
|
as outlined above using the "parrot" loader, or
|
by using the Compaq OSloader:
|
by using the Compaq OSloader:
|
|
|
Using OSloader on the iPAQ, select the Tools->Flash->Save
|
Using OSloader on the iPAQ, select the Tools->Flash->Save
|
to files.... menu item.
|
to files.... menu item.
|
|
|
|
|
Four (4) files, 4MB each in size will be created.
|
Four (4) files, 4MB each in size will be created.
|
|
|
|
|
After each file is created, copy the file to your computer,
|
After each file is created, copy the file to your computer,
|
then delete the file from the iPAQ to make room in the WinCE ramdisk for the
|
then delete the file from the iPAQ to make room in the WinCE ramdisk for the
|
next file.
|
next file.
|
|
|
|
|
You will need to download the version of RedBoot designed as the
|
You will need to download the version of RedBoot designed as the
|
ROM bootstrap. Then install it permanently using these commands:
|
ROM bootstrap. Then install it permanently using these commands:
|
|
|
RedBoot> lo -r -b 0x100000 redboot_ROM.bin
|
RedBoot> lo -r -b 0x100000 redboot_ROM.bin
|
RedBoot> fi loc -f 0x50000000 -l 0x40000
|
RedBoot> fi loc -f 0x50000000 -l 0x40000
|
RedBoot> fis init
|
RedBoot> fis init
|
RedBoot> fi unl -f 0x50040000 -l 0x40000
|
RedBoot> fi unl -f 0x50040000 -l 0x40000
|
RedBoot> fi cr RedBoot -b 0x100000
|
RedBoot> fi cr RedBoot -b 0x100000
|
RedBoot> fi loc -f 0x50040000 -l 0x40000
|
RedBoot> fi loc -f 0x50040000 -l 0x40000
|
RedBoot> reset
|
RedBoot> reset
|
|
|
|
|
WARNING
|
WARNING
|
You must type these commands exactly! Failure to do so may render your
|
You must type these commands exactly! Failure to do so may render your
|
iPAQ totally useless. Once you've done this, RedBoot should come up every
|
iPAQ totally useless. Once you've done this, RedBoot should come up every
|
time you reset.
|
time you reset.
|
|
|
|
|
|
|
|
|
Restoring Windows/CE
|
Restoring Windows/CE
|
To restore Windows/CE from the backup taken in ,
|
To restore Windows/CE from the backup taken in ,
|
visit http://www.handhelds.org/projects/wincerestoration.html
|
visit http://www.handhelds.org/projects/wincerestoration.html
|
for directions.
|
for directions.
|
|
|
|
|
|
|
|
|
Additional commands
|
Additional commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels,
|
and execution of Linux kernels,
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the iPAQ are:
|
exec parameters used for the iPAQ are:
|
|
|
-b <addr>
|
-b <addr>
|
Location Linux kernel was loaded to
|
Location Linux kernel was loaded to
|
|
|
-l <len>
|
-l <len>
|
Length of kernel
|
Length of kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
-r <addr>
|
-r <addr>
|
'initrd' ramdisk location
|
'initrd' ramdisk location
|
-s <len>
|
-s <len>
|
Length of initrd ramdisk
|
Length of initrd ramdisk
|
|
|
Linux kernels may be run on the iPAQ using the sources from the anonymous
|
Linux kernels may be run on the iPAQ using the sources from the anonymous
|
CVS repository at the Handhelds project (
|
CVS repository at the Handhelds project (
|
http://www.handhelds.org/) with
|
http://www.handhelds.org/) with
|
the elinux.patch patch file applied. This file can be
|
the elinux.patch patch file applied. This file can be
|
found in the
|
found in the
|
misc/ subdirectory of the iPAQ platform HAL in the
|
misc/ subdirectory of the iPAQ platform HAL in the
|
RedBoot sources, normally
|
RedBoot sources, normally
|
hal/arm/sa11x0/ipaq/VERSION/misc/
|
hal/arm/sa11x0/ipaq/VERSION/misc/
|
|
|
|
|
On the iPAQ (and indeed all SA11x0 platforms), Linux expects to be loaded
|
On the iPAQ (and indeed all SA11x0 platforms), Linux expects to be loaded
|
at address 0xC0008000 and the entry point is also at 0xC0008000.
|
at address 0xC0008000 and the entry point is also at 0xC0008000.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the iPAQ: The first level
|
RedBoot sets up the following memory map on the iPAQ: The first level
|
page table is located at physical address 0xC0004000. No second level tables
|
page table is located at physical address 0xC0004000. No second level tables
|
are used. NOTE
|
are used. NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
|
0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
|
0x000000 - 0x0003ffff Parrot Loader
|
0x000000 - 0x0003ffff Parrot Loader
|
0x040000 - 0x0007ffff RedBoot
|
0x040000 - 0x0007ffff RedBoot
|
0xf80000 - 0x00fbffff Fconfig data
|
0xf80000 - 0x00fbffff Fconfig data
|
0xfc0000 - 0x00ffffff FIS directory
|
0xfc0000 - 0x00ffffff FIS directory
|
0x30000000 - 0x3fffffff Compact Flash
|
0x30000000 - 0x3fffffff Compact Flash
|
0x48000000 - 0x4bffffff iPAQ internal registers
|
0x48000000 - 0x4bffffff iPAQ internal registers
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
|
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
|
0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
|
0x30000000 - 0x3fffffff N N Compact Flash
|
0x30000000 - 0x3fffffff N N Compact Flash
|
0x48000000 - 0x4bffffff N N iPAQ internal registers
|
0x48000000 - 0x4bffffff N N iPAQ internal registers
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=ipaq
|
export TARGET=ipaq
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/ipaq
|
export PLATFORM_DIR=sa11x0/ipaq
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
ARM/StrongARM(SA11X0) Intrinsyc CerfCube
|
ARM/StrongARM(SA11X0) Intrinsyc CerfCube
|
Intrinsyc CerfCubeinstalling and
|
Intrinsyc CerfCubeinstalling and
|
testinginstalling and testing
|
testinginstalling and testing
|
Intrinsyc CerfCube
|
Intrinsyc CerfCube
|
|
|
Overview
|
Overview
|
RedBoot supports the serial port and the builtin
|
RedBoot supports the serial port and the builtin
|
ethernet connection for communication and downloads.
|
ethernet connection for communication and downloads.
|
|
|
The default serial port settings are 38400,8,N,1. RedBoot runs from
|
The default serial port settings are 38400,8,N,1. RedBoot runs from
|
and supports flash management for the system flash region.
|
and supports flash management for the system flash region.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
|
|
The original boot loader supplied with the CerfCube can be used to install
|
The original boot loader supplied with the CerfCube can be used to install
|
RedBoot. Connect to the device using a serial port at 38400/8N1.
|
RedBoot. Connect to the device using a serial port at 38400/8N1.
|
Copy the binary RedBoot ROM mode image to an available TFTP server.
|
Copy the binary RedBoot ROM mode image to an available TFTP server.
|
Issue these commands to the Instrinsyc loader:
|
Issue these commands to the Instrinsyc loader:
|
|
|
download tftp:x.x.x.x redboot_ROM.bin 0xc0000000
|
download tftp:x.x.x.x redboot_ROM.bin 0xc0000000
|
flashloader 0x00000000 0xc0000000 0x20000
|
flashloader 0x00000000 0xc0000000 0x20000
|
|
|
where x.x.x.x is the IP address of the TFTP
|
where x.x.x.x is the IP address of the TFTP
|
server.
|
server.
|
|
|
NOTE
|
NOTE
|
|
|
Other installation methods may be available via the Intrinsyc loader.
|
Other installation methods may be available via the Intrinsyc loader.
|
Contact Intrinsyc for details.
|
Contact Intrinsyc for details.
|
|
|
|
|
|
|
|
|
|
|
Additional commands
|
Additional commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels,
|
and execution of Linux kernels,
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the CerfCube are:
|
exec parameters used for the CerfCube are:
|
|
|
-b <addr>
|
-b <addr>
|
Location Linux kernel was loaded to
|
Location Linux kernel was loaded to
|
|
|
-l <len>
|
-l <len>
|
Length of kernel
|
Length of kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
-r <addr>
|
-r <addr>
|
'initrd' ramdisk location
|
'initrd' ramdisk location
|
-s <len>
|
-s <len>
|
Length of initrd ramdisk
|
Length of initrd ramdisk
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the CerfCube: The first level
|
RedBoot sets up the following memory map on the CerfCube: The first level
|
page table is located at physical address 0xC0004000. No second level tables
|
page table is located at physical address 0xC0004000. No second level tables
|
are used. NOTE
|
are used. NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
|
0x00000000 - 0x01ffffff 16Mb to 32Mb FLASH (nCS0) [organized as below]
|
0x000000 - 0x0001ffff RedBoot
|
0x000000 - 0x0001ffff RedBoot
|
0x020000 - 0x0003ffff RedBoot [RAM version]
|
0x020000 - 0x0003ffff RedBoot [RAM version]
|
0xfc0000 - 0x00fdffff Fconfig data
|
0xfc0000 - 0x00fdffff Fconfig data
|
0xfe0000 - 0x00ffffff FIS directory
|
0xfe0000 - 0x00ffffff FIS directory
|
0x0f000000 - 0x0fffffff Onboard ethernet
|
0x0f000000 - 0x0fffffff Onboard ethernet
|
0x10000000 - 0x17ffffff CerfCube internal registers
|
0x10000000 - 0x17ffffff CerfCube internal registers
|
0x20000000 - 0x3fffffff PCMCIA / Compact Flash
|
0x20000000 - 0x3fffffff PCMCIA / Compact Flash
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff SA-1110 Internal Registers
|
0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xc0000000 - 0xc1ffffff DRAM Bank 0 - 32Mb SDRAM
|
0xe0000000 - 0xe7ffffff Cache Clean
|
0xe0000000 - 0xe7ffffff Cache Clean
|
|
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
|
0x00000000 - 0x01ffffff Y Y DRAM - 32Mb
|
0x08000000 - 0x0fffffff N N Onboard ethernet controller
|
0x08000000 - 0x0fffffff N N Onboard ethernet controller
|
0x10000000 - 0x17ffffff N N CerfCube internal registers
|
0x10000000 - 0x17ffffff N N CerfCube internal registers
|
0x20000000 - 0x3fffffff N N PCMCIA / Compact Flash
|
0x20000000 - 0x3fffffff N N PCMCIA / Compact Flash
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x50000000 - 0x51ffffff Y Y Up to 32Mb FLASH (nCS0)
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0x80000000 - 0xbfffffff N N SA-1110 Internal Registers
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
|
0xc0000000 - 0xc1ffffff N Y DRAM Bank 0: 32Mb
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
0xe0000000 - 0xe7ffffff Y Y Cache Clean
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=cerf
|
export TARGET=cerf
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=sa11x0/cerf
|
export PLATFORM_DIR=sa11x0/cerf
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
ARM/Xscale Cyclone IQ80310
|
ARM/Xscale Cyclone IQ80310
|
|
|
Overview
|
Overview
|
Cyclone IQ80310installing and
|
Cyclone IQ80310installing and
|
testinginstalling and testing
|
testinginstalling and testing
|
Cyclone IQ80310RedBoot supports
|
Cyclone IQ80310RedBoot supports
|
both serial ports and the built-in ethernet port for communication and downloads.
|
both serial ports and the built-in ethernet port for communication and downloads.
|
The default serial port settings are 115200,8,N,1. RedBoot also supports flash
|
The default serial port settings are 115200,8,N,1. RedBoot also supports flash
|
management for the onboard 8MB flash.
|
management for the onboard 8MB flash.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
ROMA
|
ROMA
|
[ROM]
|
[ROM]
|
RedBoot running from flash address 0x40000, with
|
RedBoot running from flash address 0x40000, with
|
ARM bootloader in flash boot sector.
|
ARM bootloader in flash boot sector.
|
redboot_ROMA.ecm
|
redboot_ROMA.ecm
|
|
|
|
|
|
|
RAMA
|
RAMA
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with ARM bootloader in
|
RedBoot running from RAM with ARM bootloader in
|
flash boot sector.
|
flash boot sector.
|
redboot_RAMA.ecm
|
redboot_RAMA.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
|
|
The board manufacturer provides a DOS application which is
|
The board manufacturer provides a DOS application which is
|
capable of programming the flash over the PCI bus, and this is
|
capable of programming the flash over the PCI bus, and this is
|
required for initial installations of RedBoot. Please see the board
|
required for initial installations of RedBoot. Please see the board
|
manual for information on using this utility. In general, the process
|
manual for information on using this utility. In general, the process
|
involves programming one of the two flash based RedBoot images to
|
involves programming one of the two flash based RedBoot images to
|
flash. The ROM mode RedBoot (which runs from the flash boot sector)
|
flash. The ROM mode RedBoot (which runs from the flash boot sector)
|
should be programmed to flash address 0x00000000. The ROMA RedBoot
|
should be programmed to flash address 0x00000000. The ROMA RedBoot
|
mode (which is started by the ARM bootloader) should be programmed to
|
mode (which is started by the ARM bootloader) should be programmed to
|
flash address 0x00004000.
|
flash address 0x00004000.
|
|
|
|
|
To install RedBoot to run from the flash boot sector, use the manufacturer's
|
To install RedBoot to run from the flash boot sector, use the manufacturer's
|
flash utility to install the ROM mode image at address zero.
|
flash utility to install the ROM mode image at address zero.
|
|
|
To install RedBoot to run from address 0x40000 with the ARM bootloader
|
To install RedBoot to run from address 0x40000 with the ARM bootloader
|
in the flash boot sector, use the manufacturer's flash utility to install
|
in the flash boot sector, use the manufacturer's flash utility to install
|
the ROMA mode image at address 0x40000.
|
the ROMA mode image at address 0x40000.
|
|
|
After booting the initial installation of RedBoot, this warning may
|
After booting the initial installation of RedBoot, this warning may
|
be printed: flash configuration checksum error or invalid key
|
be printed: flash configuration checksum error or invalid key
|
This is normal, and indicates that the flash must be configured
|
This is normal, and indicates that the flash must be configured
|
for use by RedBoot. Even if the above message is not printed, it may be a
|
for use by RedBoot. Even if the above message is not printed, it may be a
|
good idea to reinitialize the flash anyway. Do this with the
|
good idea to reinitialize the flash anyway. Do this with the
|
fis command: RedBoot> fis init
|
fis command: RedBoot> fis init
|
About to initialize [format] flash image system - continue (y/n)? y
|
About to initialize [format] flash image system - continue (y/n)? y
|
*** Initialize flash Image System
|
*** Initialize flash Image System
|
Warning: device contents not erased, some blocks may not be usable
|
Warning: device contents not erased, some blocks may not be usable
|
... Unlock from 0x007e0000-0x00800000: .
|
... Unlock from 0x007e0000-0x00800000: .
|
... Erase from 0x007e0000-0x00800000: .
|
... Erase from 0x007e0000-0x00800000: .
|
... Program from 0xa1fd0000-0xa1fd0400 at 0x007e0000: .
|
... Program from 0xa1fd0000-0xa1fd0400 at 0x007e0000: .
|
... Lock from 0x007e0000-0x00800000: .
|
... Lock from 0x007e0000-0x00800000: .
|
Followed by the fconfig command:
|
Followed by the fconfig command:
|
RedBoot> fconfig
|
RedBoot> fconfig
|
Run script at boot: false
|
Run script at boot: false
|
Use BOOTP for network configuration: false
|
Use BOOTP for network configuration: false
|
Local IP address: 192.168.1.153
|
Local IP address: 192.168.1.153
|
Default server IP address: 192.168.1.10
|
Default server IP address: 192.168.1.10
|
GDB connection port: 1000
|
GDB connection port: 1000
|
Network debug at boot time: false
|
Network debug at boot time: false
|
Update RedBoot non-volatile configuration - continue (y/n)? y
|
Update RedBoot non-volatile configuration - continue (y/n)? y
|
... Unlock from 0x007c0000-0x007e0000: .
|
... Unlock from 0x007c0000-0x007e0000: .
|
... Erase from 0x007c0000-0x007e0000: .
|
... Erase from 0x007c0000-0x007e0000: .
|
... Program from 0xa0013018-0xa0013418 at 0x007c0000: .
|
... Program from 0xa0013018-0xa0013418 at 0x007c0000: .
|
... Lock from 0x007c0000-0x007e0000: .
|
... Lock from 0x007c0000-0x007e0000: .
|
|
|
When later updating RedBoot in situ, it is important to
|
When later updating RedBoot in situ, it is important to
|
use a matching ROM and RAM mode pair of images. So use either RAM/ROM
|
use a matching ROM and RAM mode pair of images. So use either RAM/ROM
|
or RAMA/ROMA images. Do not mix them.
|
or RAMA/ROMA images. Do not mix them.
|
|
|
|
|
|
|
Error codes
|
Error codes
|
RedBoot uses the two digit LED display to indicate errors during board
|
RedBoot uses the two digit LED display to indicate errors during board
|
initialization. Possible error codes are: 88 - Unknown Error
|
initialization. Possible error codes are: 88 - Unknown Error
|
55 - I2C Error
|
55 - I2C Error
|
FF - SDRAM Error
|
FF - SDRAM Error
|
01 - No Error
|
01 - No Error
|
|
|
|
|
Using RedBoot with ARM Bootloader
|
Using RedBoot with ARM Bootloader
|
RedBoot can coexist with ARM tools in flash on the IQ80310 board. In
|
RedBoot can coexist with ARM tools in flash on the IQ80310 board. In
|
this configuration, the ARM bootloader will occupy the flash boot sector while
|
this configuration, the ARM bootloader will occupy the flash boot sector while
|
RedBoot is located at flash address 0x40000. The sixteen position rotary switch
|
RedBoot is located at flash address 0x40000. The sixteen position rotary switch
|
is used to tell the ARM bootloader to jump to the RedBoot image located at
|
is used to tell the ARM bootloader to jump to the RedBoot image located at
|
address 0x40000. RedBoot is selected by switch position 0 or 1. Other switch
|
address 0x40000. RedBoot is selected by switch position 0 or 1. Other switch
|
positions are used by the ARM firmware and RedBoot will not be started.
|
positions are used by the ARM firmware and RedBoot will not be started.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
A special RedBoot command, diag, is used to
|
A special RedBoot command, diag, is used to
|
access a set of hardware diagnostics provided by the board
|
access a set of hardware diagnostics provided by the board
|
manufacturer. To access the diagnostic menu, enter diag at the RedBoot prompt:
|
manufacturer. To access the diagnostic menu, enter diag at the RedBoot prompt:
|
|
|
RedBoot> diag
|
RedBoot> diag
|
Entering Hardware Diagnostics - Disabling Data Cache!
|
Entering Hardware Diagnostics - Disabling Data Cache!
|
1 - Memory Tests
|
1 - Memory Tests
|
2 - Repeating Memory Tests
|
2 - Repeating Memory Tests
|
3 - 16C552 DUART Serial Port Tests
|
3 - 16C552 DUART Serial Port Tests
|
4 - Rotary Switch S1 Test for positions 0-3
|
4 - Rotary Switch S1 Test for positions 0-3
|
5 - seven Segment LED Tests
|
5 - seven Segment LED Tests
|
6 - Backplane Detection Test
|
6 - Backplane Detection Test
|
7 - Battery Status Test
|
7 - Battery Status Test
|
8 - External Timer Test
|
8 - External Timer Test
|
9 - i82559 Ethernet Configuration
|
9 - i82559 Ethernet Configuration
|
10 - i82559 Ethernet Test
|
10 - i82559 Ethernet Test
|
11 - Secondary PCI Bus Test
|
11 - Secondary PCI Bus Test
|
12 - Primary PCI Bus Test
|
12 - Primary PCI Bus Test
|
13 - i960Rx/303 PCI Interrupt Test
|
13 - i960Rx/303 PCI Interrupt Test
|
14 - Internal Timer Test
|
14 - Internal Timer Test
|
15 - GPIO Test
|
15 - GPIO Test
|
0 - quit Enter the menu item number (0 to quit):
|
0 - quit Enter the menu item number (0 to quit):
|
|
|
Tests for various hardware subsystems are provided, and some
|
Tests for various hardware subsystems are provided, and some
|
tests require special hardware in order to execute normally. The Ethernet
|
tests require special hardware in order to execute normally. The Ethernet
|
Configuration item may be used to set the board ethernet address.
|
Configuration item may be used to set the board ethernet address.
|
|
|
|
|
IQ80310 Hardware Tests
|
IQ80310 Hardware Tests
|
1 - Memory Tests
|
1 - Memory Tests
|
2 - Repeating Memory Tests
|
2 - Repeating Memory Tests
|
3 - 16C552 DUART Serial Port Tests
|
3 - 16C552 DUART Serial Port Tests
|
4 - Rotary Switch S1 Test for positions 0-3
|
4 - Rotary Switch S1 Test for positions 0-3
|
5 - 7 Segment LED Tests
|
5 - 7 Segment LED Tests
|
6 - Backplane Detection Test
|
6 - Backplane Detection Test
|
7 - Battery Status Test
|
7 - Battery Status Test
|
8 - External Timer Test
|
8 - External Timer Test
|
9 - i82559 Ethernet Configuration
|
9 - i82559 Ethernet Configuration
|
10 - i82559 Ethernet Test
|
10 - i82559 Ethernet Test
|
11 - i960Rx/303 PCI Interrupt Test
|
11 - i960Rx/303 PCI Interrupt Test
|
12 - Internal Timer Test
|
12 - Internal Timer Test
|
13 - Secondary PCI Bus Test
|
13 - Secondary PCI Bus Test
|
14 - Primary PCI Bus Test
|
14 - Primary PCI Bus Test
|
15 - Battery Backup SDRAM Memory Test
|
15 - Battery Backup SDRAM Memory Test
|
16 - GPIO Test
|
16 - GPIO Test
|
17 - Repeat-On-Fail Memory Test
|
17 - Repeat-On-Fail Memory Test
|
18 - Coyonosa Cache Loop (No return)
|
18 - Coyonosa Cache Loop (No return)
|
19 - Show Software and Hardware Revision
|
19 - Show Software and Hardware Revision
|
0 - quit
|
0 - quit
|
Enter the menu item number (0 to quit):
|
Enter the menu item number (0 to quit):
|
Tests for various hardware subsystems are provided, and some tests require
|
Tests for various hardware subsystems are provided, and some tests require
|
special hardware in order to execute normally. The Ethernet Configuration
|
special hardware in order to execute normally. The Ethernet Configuration
|
item may be used to set the board ethernet address.
|
item may be used to set the board ethernet address.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=iq80310
|
export TARGET=iq80310
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=iq80310
|
export PLATFORM_DIR=iq80310
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
Interrupts
|
Interrupts
|
RedBoot uses an interrupt vector table which is located at address 0xA000A004.
|
RedBoot uses an interrupt vector table which is located at address 0xA000A004.
|
Entries in this table are pointers to functions with this protoype::
|
Entries in this table are pointers to functions with this protoype::
|
int irq_handler( unsigned vector, unsigned data )On an IQ80310
|
int irq_handler( unsigned vector, unsigned data )On an IQ80310
|
board, the vector argument is one of 49 interrupts defined in
|
board, the vector argument is one of 49 interrupts defined in
|
hal/arm/iq80310/current/include/hal_platform_ints.h::
|
hal/arm/iq80310/current/include/hal_platform_ints.h::
|
// *** 80200 CPU ***
|
// *** 80200 CPU ***
|
#define CYGNUM_HAL_INTERRUPT_reserved0 0
|
#define CYGNUM_HAL_INTERRUPT_reserved0 0
|
#define CYGNUM_HAL_INTERRUPT_PMU_PMN0_OVFL 1 // See Ch.12 - Performance Mon.
|
#define CYGNUM_HAL_INTERRUPT_PMU_PMN0_OVFL 1 // See Ch.12 - Performance Mon.
|
#define CYGNUM_HAL_INTERRUPT_PMU_PMN1_OVFL 2 // PMU counter 0/1 overflow
|
#define CYGNUM_HAL_INTERRUPT_PMU_PMN1_OVFL 2 // PMU counter 0/1 overflow
|
#define CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL 3 // PMU clock overflow
|
#define CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL 3 // PMU clock overflow
|
#define CYGNUM_HAL_INTERRUPT_BCU_INTERRUPT 4 // See Ch.11 - Bus Control Unit
|
#define CYGNUM_HAL_INTERRUPT_BCU_INTERRUPT 4 // See Ch.11 - Bus Control Unit
|
#define CYGNUM_HAL_INTERRUPT_NIRQ 5 // external IRQ
|
#define CYGNUM_HAL_INTERRUPT_NIRQ 5 // external IRQ
|
#define CYGNUM_HAL_INTERRUPT_NFIQ 6 // external FIQ
|
#define CYGNUM_HAL_INTERRUPT_NFIQ 6 // external FIQ
|
|
|
|
|
// *** XINT6 interrupts ***
|
// *** XINT6 interrupts ***
|
#define CYGNUM_HAL_INTERRUPT_DMA_0 7
|
#define CYGNUM_HAL_INTERRUPT_DMA_0 7
|
#define CYGNUM_HAL_INTERRUPT_DMA_1 8
|
#define CYGNUM_HAL_INTERRUPT_DMA_1 8
|
#define CYGNUM_HAL_INTERRUPT_DMA_2 9
|
#define CYGNUM_HAL_INTERRUPT_DMA_2 9
|
#define CYGNUM_HAL_INTERRUPT_GTSC 10 // Global Time Stamp Counter
|
#define CYGNUM_HAL_INTERRUPT_GTSC 10 // Global Time Stamp Counter
|
#define CYGNUM_HAL_INTERRUPT_PEC 11 // Performance Event Counter
|
#define CYGNUM_HAL_INTERRUPT_PEC 11 // Performance Event Counter
|
#define CYGNUM_HAL_INTERRUPT_AAIP 12 // application accelerator unit
|
#define CYGNUM_HAL_INTERRUPT_AAIP 12 // application accelerator unit
|
|
|
|
|
// *** XINT7 interrupts ***
|
// *** XINT7 interrupts ***
|
// I2C interrupts
|
// I2C interrupts
|
#define CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY 13
|
#define CYGNUM_HAL_INTERRUPT_I2C_TX_EMPTY 13
|
#define CYGNUM_HAL_INTERRUPT_I2C_RX_FULL 14
|
#define CYGNUM_HAL_INTERRUPT_I2C_RX_FULL 14
|
#define CYGNUM_HAL_INTERRUPT_I2C_BUS_ERR 15
|
#define CYGNUM_HAL_INTERRUPT_I2C_BUS_ERR 15
|
#define CYGNUM_HAL_INTERRUPT_I2C_STOP 16
|
#define CYGNUM_HAL_INTERRUPT_I2C_STOP 16
|
#define CYGNUM_HAL_INTERRUPT_I2C_LOSS 17
|
#define CYGNUM_HAL_INTERRUPT_I2C_LOSS 17
|
#define CYGNUM_HAL_INTERRUPT_I2C_ADDRESS 18
|
#define CYGNUM_HAL_INTERRUPT_I2C_ADDRESS 18
|
|
|
|
|
// Messaging Unit interrupts
|
// Messaging Unit interrupts
|
#define CYGNUM_HAL_INTERRUPT_MESSAGE_0 19
|
#define CYGNUM_HAL_INTERRUPT_MESSAGE_0 19
|
#define CYGNUM_HAL_INTERRUPT_MESSAGE_1 20
|
#define CYGNUM_HAL_INTERRUPT_MESSAGE_1 20
|
#define CYGNUM_HAL_INTERRUPT_DOORBELL 21
|
#define CYGNUM_HAL_INTERRUPT_DOORBELL 21
|
#define CYGNUM_HAL_INTERRUPT_NMI_DOORBELL 22
|
#define CYGNUM_HAL_INTERRUPT_NMI_DOORBELL 22
|
#define CYGNUM_HAL_INTERRUPT_QUEUE_POST 23
|
#define CYGNUM_HAL_INTERRUPT_QUEUE_POST 23
|
#define CYGNUM_HAL_INTERRUPT_OUTBOUND_QUEUE_FULL 24
|
#define CYGNUM_HAL_INTERRUPT_OUTBOUND_QUEUE_FULL 24
|
#define CYGNUM_HAL_INTERRUPT_INDEX_REGISTER 25
|
#define CYGNUM_HAL_INTERRUPT_INDEX_REGISTER 25
|
// PCI Address Translation Unit
|
// PCI Address Translation Unit
|
#define CYGNUM_HAL_INTERRUPT_BIST 26
|
#define CYGNUM_HAL_INTERRUPT_BIST 26
|
|
|
|
|
// *** External board interrupts (XINT3) ***
|
// *** External board interrupts (XINT3) ***
|
#define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer
|
#define CYGNUM_HAL_INTERRUPT_TIMER 27 // external timer
|
#define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet
|
#define CYGNUM_HAL_INTERRUPT_ETHERNET 28 // onboard enet
|
#define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A
|
#define CYGNUM_HAL_INTERRUPT_SERIAL_A 29 // 16x50 uart A
|
#define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B
|
#define CYGNUM_HAL_INTERRUPT_SERIAL_B 30 // 16x50 uart B
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTD 31 // secondary PCI INTD
|
// The hardware doesn't (yet?) provide masking or status for these
|
// The hardware doesn't (yet?) provide masking or status for these
|
// even though they can trigger cpu interrupts. ISRs will need to
|
// even though they can trigger cpu interrupts. ISRs will need to
|
// poll the device to see if the device actually triggered the
|
// poll the device to see if the device actually triggered the
|
// interrupt.
|
// interrupt.
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTC 32 // secondary PCI INTC
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTB 33 // secondary PCI INTB
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA
|
#define CYGNUM_HAL_INTERRUPT_PCI_S_INTA 34 // secondary PCI INTA
|
|
|
|
|
// *** NMI Interrupts go to FIQ ***
|
// *** NMI Interrupts go to FIQ ***
|
#define CYGNUM_HAL_INTERRUPT_MCU_ERR 35
|
#define CYGNUM_HAL_INTERRUPT_MCU_ERR 35
|
#define CYGNUM_HAL_INTERRUPT_PATU_ERR 36
|
#define CYGNUM_HAL_INTERRUPT_PATU_ERR 36
|
#define CYGNUM_HAL_INTERRUPT_SATU_ERR 37
|
#define CYGNUM_HAL_INTERRUPT_SATU_ERR 37
|
#define CYGNUM_HAL_INTERRUPT_PBDG_ERR 38
|
#define CYGNUM_HAL_INTERRUPT_PBDG_ERR 38
|
#define CYGNUM_HAL_INTERRUPT_SBDG_ERR 39
|
#define CYGNUM_HAL_INTERRUPT_SBDG_ERR 39
|
#define CYGNUM_HAL_INTERRUPT_DMA0_ERR 40
|
#define CYGNUM_HAL_INTERRUPT_DMA0_ERR 40
|
#define CYGNUM_HAL_INTERRUPT_DMA1_ERR 41
|
#define CYGNUM_HAL_INTERRUPT_DMA1_ERR 41
|
#define CYGNUM_HAL_INTERRUPT_DMA2_ERR 42
|
#define CYGNUM_HAL_INTERRUPT_DMA2_ERR 42
|
#define CYGNUM_HAL_INTERRUPT_MU_ERR 43
|
#define CYGNUM_HAL_INTERRUPT_MU_ERR 43
|
#define CYGNUM_HAL_INTERRUPT_reserved52 44
|
#define CYGNUM_HAL_INTERRUPT_reserved52 44
|
#define CYGNUM_HAL_INTERRUPT_AAU_ERR 45
|
#define CYGNUM_HAL_INTERRUPT_AAU_ERR 45
|
#define CYGNUM_HAL_INTERRUPT_BIU_ERR 46
|
#define CYGNUM_HAL_INTERRUPT_BIU_ERR 46
|
|
|
|
|
// *** ATU FIQ sources ***
|
// *** ATU FIQ sources ***
|
#define CYGNUM_HAL_INTERRUPT_P_SERR 47
|
#define CYGNUM_HAL_INTERRUPT_P_SERR 47
|
#define CYGNUM_HAL_INTERRUPT_S_SERR 48The data passed
|
#define CYGNUM_HAL_INTERRUPT_S_SERR 48The data passed
|
to the ISR is pulled from a data table (hal_interrupt_data)
|
to the ISR is pulled from a data table (hal_interrupt_data)
|
which immediately follows the interrupt vector table. With
|
which immediately follows the interrupt vector table. With
|
49 interrupts, the data table starts at address 0xA000A0C8.
|
49 interrupts, the data table starts at address 0xA000A0C8.
|
An application may create a normal C function with the above prototype
|
An application may create a normal C function with the above prototype
|
to be an ISR. Just poke its address into the table at the correct index and
|
to be an ISR. Just poke its address into the table at the correct index and
|
enable the interrupt at its source. The return value of the ISR is ignored
|
enable the interrupt at its source. The return value of the ISR is ignored
|
by RedBoot.
|
by RedBoot.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The first level page table is located at 0xa0004000. Two second level
|
The first level page table is located at 0xa0004000. Two second level
|
tables are also used. One second level table is located at 0xa0008000 and
|
tables are also used. One second level table is located at 0xa0008000 and
|
maps the first 1MB of flash. The other second level table is at 0xa0008400,
|
maps the first 1MB of flash. The other second level table is at 0xa0008400,
|
and maps the first 1MB of SDRAM. NOTE
|
and maps the first 1MB of SDRAM. NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x00000fff flash Memory
|
0x00000000 - 0x00000fff flash Memory
|
0x00001000 - 0x00001fff 80312 Internal Registers
|
0x00001000 - 0x00001fff 80312 Internal Registers
|
0x00002000 - 0x007fffff flash Memory
|
0x00002000 - 0x007fffff flash Memory
|
0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
|
0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
|
0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
|
0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
|
0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
|
0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
|
0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
|
0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
|
0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
|
0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
|
0x90000000 - 0x9000ffff Primary PCI IO Space
|
0x90000000 - 0x9000ffff Primary PCI IO Space
|
0x90010000 - 0x9001ffff Secondary PCI IO Space
|
0x90010000 - 0x9001ffff Secondary PCI IO Space
|
0x90020000 - 0x9fffffff Unused
|
0x90020000 - 0x9fffffff Unused
|
0xa0000000 - 0xbfffffff SDRAM
|
0xa0000000 - 0xbfffffff SDRAM
|
0xc0000000 - 0xefffffff Unused
|
0xc0000000 - 0xefffffff Unused
|
0xf0000000 - 0xffffffff 80200 Internal Registers
|
0xf0000000 - 0xffffffff 80200 Internal Registers
|
|
|
|
|
Virtual Address Range C B Description
|
Virtual Address Range C B Description
|
----------------------- - - ----------------------------------
|
----------------------- - - ----------------------------------
|
0x00000000 - 0x00000fff Y Y SDRAM
|
0x00000000 - 0x00000fff Y Y SDRAM
|
0x00001000 - 0x00001fff N N 80312 Internal Registers
|
0x00001000 - 0x00001fff N N 80312 Internal Registers
|
0x00002000 - 0x007fffff Y N flash Memory
|
0x00002000 - 0x007fffff Y N flash Memory
|
0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
|
0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
|
0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
|
0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
|
0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
|
0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
|
0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
|
0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
|
0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
|
0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
|
0x90000000 - 0x9000ffff N N Primary PCI IO Space
|
0x90000000 - 0x9000ffff N N Primary PCI IO Space
|
0x90010000 - 0x9001ffff N N Secondary PCI IO Space
|
0x90010000 - 0x9001ffff N N Secondary PCI IO Space
|
0xa0000000 - 0xbfffffff Y Y SDRAM
|
0xa0000000 - 0xbfffffff Y Y SDRAM
|
0xc0000000 - 0xcfffffff Y Y Cache Flush Region
|
0xc0000000 - 0xcfffffff Y Y Cache Flush Region
|
0xd0000000 - 0xd0000fff Y N first 4k page of flash
|
0xd0000000 - 0xd0000fff Y N first 4k page of flash
|
0xf0000000 - 0xffffffff N N 80200 Internal Registers
|
0xf0000000 - 0xffffffff N N 80200 Internal Registers
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
The external timer is used as a polled timer to provide timeout support
|
The external timer is used as a polled timer to provide timeout support
|
for networking and XModem file transfers.
|
for networking and XModem file transfers.
|
|
|
|
|
|
|
|
|
ARM/Xscale Intel IQ80321
|
ARM/Xscale Intel IQ80321
|
|
|
Overview
|
Overview
|
Intel IQ80321installing and
|
Intel IQ80321installing and
|
testinginstalling and testing
|
testinginstalling and testing
|
Intel IQ80321RedBoot supports
|
Intel IQ80321RedBoot supports
|
the serial port and the built-in ethernet port for communication and downloads.
|
the serial port and the built-in ethernet port for communication and downloads.
|
The default serial port settings are 115200,8,N,1. RedBoot also supports flash
|
The default serial port settings are 115200,8,N,1. RedBoot also supports flash
|
management for the onboard 8MB flash.
|
management for the onboard 8MB flash.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The board manufacturer provides a DOS application which is capable of
|
The board manufacturer provides a DOS application which is capable of
|
programming the flash over the PCI bus, and this is required for initial installations
|
programming the flash over the PCI bus, and this is required for initial installations
|
of RedBoot. Please see the board manual for information on using this utility.
|
of RedBoot. Please see the board manual for information on using this utility.
|
In general, the process involves programming the ROM mode RedBoot
|
In general, the process involves programming the ROM mode RedBoot
|
image to flash. RedBoot should be programmed to flash address
|
image to flash. RedBoot should be programmed to flash address
|
0x00000000 using the DOS utility.
|
0x00000000 using the DOS utility.
|
|
|
|
|
After booting the initial installation of RedBoot, this warning may
|
After booting the initial installation of RedBoot, this warning may
|
be printed: flash configuration checksum error or invalid key
|
be printed: flash configuration checksum error or invalid key
|
This is normal, and indicates that the flash must be configured
|
This is normal, and indicates that the flash must be configured
|
for use by RedBoot. Even if the above message is not printed, it may be a
|
for use by RedBoot. Even if the above message is not printed, it may be a
|
good idea to reinitialize the flash anyway. Do this with the
|
good idea to reinitialize the flash anyway. Do this with the
|
fis command: RedBoot> fis init
|
fis command: RedBoot> fis init
|
About to initialize [format] FLASH image system - continue (y/n)? y
|
About to initialize [format] FLASH image system - continue (y/n)? y
|
*** Initialize FLASH Image System
|
*** Initialize FLASH Image System
|
Warning: device contents not erased, some blocks may not be usable
|
Warning: device contents not erased, some blocks may not be usable
|
... Unlock from 0xf07e0000-0xf0800000: .
|
... Unlock from 0xf07e0000-0xf0800000: .
|
... Erase from 0xf07e0000-0xf0800000: .
|
... Erase from 0xf07e0000-0xf0800000: .
|
... Program from 0x01ddf000-0x01ddf400 at 0xf07e0000: .
|
... Program from 0x01ddf000-0x01ddf400 at 0xf07e0000: .
|
... Lock from 0xf07e0000-0xf0800000: .
|
... Lock from 0xf07e0000-0xf0800000: .
|
|
|
|
|
Switch Settings
|
Switch Settings
|
The 80321 board is highly configurable through a number of switches and jumpers.
|
The 80321 board is highly configurable through a number of switches and jumpers.
|
RedBoot makes some assumptions about board configuration and attention must be paid
|
RedBoot makes some assumptions about board configuration and attention must be paid
|
to these assumptions for reliable RedBoot operation:
|
to these assumptions for reliable RedBoot operation:
|
|
|
The onboard ethernet and the secondary slot may be placed in a
|
The onboard ethernet and the secondary slot may be placed in a
|
private space so that they are not seen by a PC BIOS. If the board is to be used
|
private space so that they are not seen by a PC BIOS. If the board is to be used
|
in a PC with BIOS, then the ethernet should be placed in this private space so that
|
in a PC with BIOS, then the ethernet should be placed in this private space so that
|
RedBoot and the BIOS do not conflict.
|
RedBoot and the BIOS do not conflict.
|
|
|
RedBoot assumes that the board is plugged into a PC with BIOS. This
|
RedBoot assumes that the board is plugged into a PC with BIOS. This
|
requires RedBoot to detect when the BIOS has configured the PCI-X secondary bus. If
|
requires RedBoot to detect when the BIOS has configured the PCI-X secondary bus. If
|
the board is placed in a backplane, RedBoot will never see the BIOS configure the
|
the board is placed in a backplane, RedBoot will never see the BIOS configure the
|
secondary bus. To prevent this wait, set switch S7E1-3 to ON when using the board
|
secondary bus. To prevent this wait, set switch S7E1-3 to ON when using the board
|
in a backplane.
|
in a backplane.
|
For the remaining switch settings, the following is a known good
|
For the remaining switch settings, the following is a known good
|
configuration:
|
configuration:
|
|
|
|
|
S1D1All OFF
|
S1D1All OFF
|
S7E17 is ON, all others OFF
|
S7E17 is ON, all others OFF
|
S8E12,3,5,6 are ON, all others OFF
|
S8E12,3,5,6 are ON, all others OFF
|
S8E22,3 are ON, all others OFF
|
S8E22,3 are ON, all others OFF
|
S9E13 is ON, all others OFF
|
S9E13 is ON, all others OFF
|
S4D11,3 are ON, all others OFF
|
S4D11,3 are ON, all others OFF
|
J9E12,3 jumpered
|
J9E12,3 jumpered
|
J9F12,3 jumpered
|
J9F12,3 jumpered
|
J3F1Nothing jumpered
|
J3F1Nothing jumpered
|
J3G12,3 jumpered
|
J3G12,3 jumpered
|
J1G22,3 jumpered
|
J1G22,3 jumpered
|
|
|
|
|
|
|
|
|
|
|
|
|
LED Codes
|
LED Codes
|
RedBoot uses the two digit LED display to indicate status during board
|
RedBoot uses the two digit LED display to indicate status during board
|
initialization. Possible codes are:
|
initialization. Possible codes are:
|
|
|
|
|
LED Actions
|
LED Actions
|
-------------------------------------------------------------
|
-------------------------------------------------------------
|
Power-On/Reset
|
Power-On/Reset
|
88
|
88
|
Set the CPSR
|
Set the CPSR
|
Enable coprocessor access
|
Enable coprocessor access
|
Drain write and fill buffer
|
Drain write and fill buffer
|
Setup PBIU chip selects
|
Setup PBIU chip selects
|
A1
|
A1
|
Enable the Icache
|
Enable the Icache
|
A2
|
A2
|
Move FLASH chip select from 0x0 to 0xF0000000
|
Move FLASH chip select from 0x0 to 0xF0000000
|
Jump to new FLASH location
|
Jump to new FLASH location
|
A3
|
A3
|
Setup and enable the MMU
|
Setup and enable the MMU
|
A4
|
A4
|
I2C interface initialization
|
I2C interface initialization
|
90
|
90
|
Wait for I2C initialization to complete
|
Wait for I2C initialization to complete
|
91
|
91
|
Send address (via I2C) to the DIMM
|
Send address (via I2C) to the DIMM
|
92
|
92
|
Wait for transmit complete
|
Wait for transmit complete
|
93
|
93
|
Read SDRAM PD data from DIMM
|
Read SDRAM PD data from DIMM
|
94
|
94
|
Read remainder of EEPROM data.
|
Read remainder of EEPROM data.
|
An error will result in one of the following
|
An error will result in one of the following
|
error codes on the LEDs:
|
error codes on the LEDs:
|
77 BAD EEPROM checksum
|
77 BAD EEPROM checksum
|
55 I2C protocol error
|
55 I2C protocol error
|
FF bank size error
|
FF bank size error
|
A5
|
A5
|
Setup DDR memory interface
|
Setup DDR memory interface
|
A6
|
A6
|
Enable branch target buffer
|
Enable branch target buffer
|
Drain the write & fill buffers
|
Drain the write & fill buffers
|
Flush Icache, Dcache and BTB
|
Flush Icache, Dcache and BTB
|
Flush instuction and data TLBs
|
Flush instuction and data TLBs
|
Drain the write & fill buffers
|
Drain the write & fill buffers
|
SL
|
SL
|
ECC Scrub Loop
|
ECC Scrub Loop
|
SE
|
SE
|
A7
|
A7
|
Clean, drain, flush the main Dcache
|
Clean, drain, flush the main Dcache
|
A8
|
A8
|
Clean, drain, flush the mini Dcache
|
Clean, drain, flush the mini Dcache
|
Flush Dcache
|
Flush Dcache
|
Drain the write & fill buffers
|
Drain the write & fill buffers
|
A9
|
A9
|
Enable ECC
|
Enable ECC
|
AA
|
AA
|
Save SDRAM size
|
Save SDRAM size
|
Move MMU tables into RAM
|
Move MMU tables into RAM
|
AB
|
AB
|
Clean, drain, flush the main Dcache
|
Clean, drain, flush the main Dcache
|
Clean, drain, flush the mini Dcache
|
Clean, drain, flush the mini Dcache
|
Drain the write & fill buffers
|
Drain the write & fill buffers
|
AC
|
AC
|
Set the TTB register to DRAM mmu_table
|
Set the TTB register to DRAM mmu_table
|
AD
|
AD
|
Set mode to IRQ mode
|
Set mode to IRQ mode
|
A7
|
A7
|
Move SWI & Undefined "vectors" to RAM (at 0x0)
|
Move SWI & Undefined "vectors" to RAM (at 0x0)
|
A6
|
A6
|
Switch to supervisor mode
|
Switch to supervisor mode
|
A5
|
A5
|
Move remaining "vectors" to RAM (at 0x0)
|
Move remaining "vectors" to RAM (at 0x0)
|
A4
|
A4
|
Copy DATA to RAM
|
Copy DATA to RAM
|
Initialize interrupt exception environment
|
Initialize interrupt exception environment
|
Initialize stack
|
Initialize stack
|
Clear BSS section
|
Clear BSS section
|
A3
|
A3
|
Call platform specific hardware initialization
|
Call platform specific hardware initialization
|
A2
|
A2
|
Run through static constructors
|
Run through static constructors
|
A1
|
A1
|
Start up the eCos kernel or RedBoot
|
Start up the eCos kernel or RedBoot
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
A special RedBoot command, diag, is used to
|
A special RedBoot command, diag, is used to
|
access a set of hardware diagnostics. To access the diagnostic menu,
|
access a set of hardware diagnostics. To access the diagnostic menu,
|
enter diag at the RedBoot prompt:
|
enter diag at the RedBoot prompt:
|
|
|
RedBoot> diag
|
RedBoot> diag
|
Entering Hardware Diagnostics - Disabling Data Cache!
|
Entering Hardware Diagnostics - Disabling Data Cache!
|
|
|
IQ80321 Hardware Tests
|
IQ80321 Hardware Tests
|
|
|
1 - Memory Tests
|
1 - Memory Tests
|
2 - Repeating Memory Tests
|
2 - Repeating Memory Tests
|
3 - Repeat-On-Fail Memory Tests
|
3 - Repeat-On-Fail Memory Tests
|
4 - Rotary Switch S1 Test
|
4 - Rotary Switch S1 Test
|
5 - 7 Segment LED Tests
|
5 - 7 Segment LED Tests
|
6 - i82544 Ethernet Configuration
|
6 - i82544 Ethernet Configuration
|
7 - Baterry Status Test
|
7 - Baterry Status Test
|
8 - Battery Backup SDRAM Memory Test
|
8 - Battery Backup SDRAM Memory Test
|
9 - Timer Test
|
9 - Timer Test
|
10 - PCI Bus test
|
10 - PCI Bus test
|
11 - CPU Cache Loop (No Return)
|
11 - CPU Cache Loop (No Return)
|
0 - quit
|
0 - quit
|
Enter the menu item number (0 to quit):
|
Enter the menu item number (0 to quit):
|
|
|
Tests for various hardware subsystems are provided, and some tests require
|
Tests for various hardware subsystems are provided, and some tests require
|
special hardware in order to execute normally. The Ethernet Configuration
|
special hardware in order to execute normally. The Ethernet Configuration
|
item may be used to set the board ethernet address.
|
item may be used to set the board ethernet address.
|
|
|
Memory Tests
|
Memory Tests
|
This test is used to test installed DDR SDRAM memory. Five different
|
This test is used to test installed DDR SDRAM memory. Five different
|
tests are run over the given address ranges. If errors are encountered, the
|
tests are run over the given address ranges. If errors are encountered, the
|
test is aborted and information about the failure is printed. When selected,
|
test is aborted and information about the failure is printed. When selected,
|
the user will be prompted to enter the base address of the test range and its
|
the user will be prompted to enter the base address of the test range and its
|
size. The numbers must be in hex with no leading “0x”
|
size. The numbers must be in hex with no leading “0x”
|
|
|
|
|
Enter the menu item number (0 to quit): 1
|
Enter the menu item number (0 to quit): 1
|
|
|
Base address of memory to test (in hex): 100000
|
Base address of memory to test (in hex): 100000
|
|
|
Size of memory to test (in hex): 200000
|
Size of memory to test (in hex): 200000
|
|
|
Testing memory from 0x00100000 to 0x002fffff.
|
Testing memory from 0x00100000 to 0x002fffff.
|
|
|
Walking 1's test:
|
Walking 1's test:
|
0000000100000002000000040000000800000010000000200000004000000080
|
0000000100000002000000040000000800000010000000200000004000000080
|
0000010000000200000004000000080000001000000020000000400000008000
|
0000010000000200000004000000080000001000000020000000400000008000
|
0001000000020000000400000008000000100000002000000040000000800000
|
0001000000020000000400000008000000100000002000000040000000800000
|
0100000002000000040000000800000010000000200000004000000080000000
|
0100000002000000040000000800000010000000200000004000000080000000
|
passed
|
passed
|
32-bit address test: passed
|
32-bit address test: passed
|
32-bit address bar test: passed
|
32-bit address bar test: passed
|
8-bit address test: passed
|
8-bit address test: passed
|
Byte address bar test: passed
|
Byte address bar test: passed
|
Memory test done.
|
Memory test done.
|
|
|
|
|
|
|
Repeating Memory Tests
|
Repeating Memory Tests
|
The repeating memory tests are exactly the same as the above memory tests,
|
The repeating memory tests are exactly the same as the above memory tests,
|
except that the tests are automatically rerun after completion. The only way out
|
except that the tests are automatically rerun after completion. The only way out
|
of this test is to reset the board.
|
of this test is to reset the board.
|
|
|
|
|
|
|
Repeat-On-Fail Memory Tests
|
Repeat-On-Fail Memory Tests
|
This is similar to the repeating memory tests except that when an error
|
This is similar to the repeating memory tests except that when an error
|
is found, the failing test continuously retries on the failing address.
|
is found, the failing test continuously retries on the failing address.
|
|
|
|
|
|
|
Rotary Switch S1 Test
|
Rotary Switch S1 Test
|
This tests the operation of the sixteen position rotary switch. When run,
|
This tests the operation of the sixteen position rotary switch. When run,
|
this test will display the current position of the rotary switch on the LED
|
this test will display the current position of the rotary switch on the LED
|
display. Slowly dial through each position and confirm reading on LED.
|
display. Slowly dial through each position and confirm reading on LED.
|
|
|
|
|
|
|
7 Segment LED Tests
|
7 Segment LED Tests
|
This tests the operation of the seven segment displays. When run, each
|
This tests the operation of the seven segment displays. When run, each
|
LED cycles through 0 through F and a decimal point.
|
LED cycles through 0 through F and a decimal point.
|
|
|
|
|
|
|
i82544 Ethernet Configuration
|
i82544 Ethernet Configuration
|
This test initializes the ethernet controller’s serial EEPROM if
|
This test initializes the ethernet controller’s serial EEPROM if
|
the current contents are invalid. In any case, this test will also allow the
|
the current contents are invalid. In any case, this test will also allow the
|
user to enter a six byte ethernet MAC address into the serial EEPROM.
|
user to enter a six byte ethernet MAC address into the serial EEPROM.
|
|
|
|
|
Enter the menu item number (0 to quit): 6
|
Enter the menu item number (0 to quit): 6
|
|
|
|
|
Current MAC address: 00:80:4d:46:00:02
|
Current MAC address: 00:80:4d:46:00:02
|
Enter desired MAC address: 00:80:4d:46:00:01
|
Enter desired MAC address: 00:80:4d:46:00:01
|
Writing to the Serial EEPROM... Done
|
Writing to the Serial EEPROM... Done
|
|
|
******** Reset The Board To Have Changes Take Effect ********
|
******** Reset The Board To Have Changes Take Effect ********
|
|
|
|
|
|
|
Battery Status Test
|
Battery Status Test
|
This tests the current status of the battery. First, the test checks to
|
This tests the current status of the battery. First, the test checks to
|
see if the battery is installed and reports that finding. If the battery is
|
see if the battery is installed and reports that finding. If the battery is
|
installed, the test further determines whether the battery status is one or
|
installed, the test further determines whether the battery status is one or
|
more of the following:
|
more of the following:
|
|
|
Battery is charging.
|
Battery is charging.
|
Battery is fully discharged.
|
Battery is fully discharged.
|
Battery voltage measures within normal operating range.
|
Battery voltage measures within normal operating range.
|
|
|
|
|
|
|
|
|
|
|
Battery Backup SDRAM Memory Test
|
Battery Backup SDRAM Memory Test
|
This tests the battery backup of SDRAM memory. This test is a three
|
This tests the battery backup of SDRAM memory. This test is a three
|
step process:
|
step process:
|
|
|
Select Battery backup test from main diag menu, then write
|
Select Battery backup test from main diag menu, then write
|
data to SDRAM.
|
data to SDRAM.
|
Turn off power for 60 seconds, then repower the board.
|
Turn off power for 60 seconds, then repower the board.
|
|
|
Select Battery backup test from main diag menu, then check
|
Select Battery backup test from main diag menu, then check
|
data that was written in step 1.
|
data that was written in step 1.
|
|
|
|
|
|
|
|
|
Timer Test
|
Timer Test
|
This tests the internal timer by printing a number of dots at one
|
This tests the internal timer by printing a number of dots at one
|
second intervals.
|
second intervals.
|
|
|
|
|
PCI Bus Test
|
PCI Bus Test
|
This tests the secondary PCI-X bus and socket. This test requires that
|
This tests the secondary PCI-X bus and socket. This test requires that
|
an IQ80310 board be plugged into the secondary slot of the IOP80321 board.
|
an IQ80310 board be plugged into the secondary slot of the IOP80321 board.
|
The test assumes at least 32MB of installed memory on the IQ80310. That memory
|
The test assumes at least 32MB of installed memory on the IQ80310. That memory
|
is mapped into the IOP80321 address space and the memory tests are run on that
|
is mapped into the IOP80321 address space and the memory tests are run on that
|
memory.
|
memory.
|
|
|
|
|
|
|
CPU Cache Loop
|
CPU Cache Loop
|
This test puts the CPU into a tight loop run entirely from the ICache.
|
This test puts the CPU into a tight loop run entirely from the ICache.
|
This should prevent all external bus accesses.
|
This should prevent all external bus accesses.
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=iq80321
|
export TARGET=iq80321
|
export ARCH_DIR=arm
|
export ARCH_DIR=arm
|
export PLATFORM_DIR=xscale/iq80321
|
export PLATFORM_DIR=xscale/iq80321
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
Interrupts
|
Interrupts
|
RedBoot uses an interrupt vector table which is located at address 0x8004.
|
RedBoot uses an interrupt vector table which is located at address 0x8004.
|
Entries in this table are pointers to functions with this protoype::
|
Entries in this table are pointers to functions with this protoype::
|
int irq_handler( unsigned vector, unsigned data )On an IQ80321
|
int irq_handler( unsigned vector, unsigned data )On an IQ80321
|
board, the vector argument is one of 32 interrupts defined in
|
board, the vector argument is one of 32 interrupts defined in
|
hal/arm/xscale/verde/current/include/hal_var_ints.h::
|
hal/arm/xscale/verde/current/include/hal_var_ints.h::
|
// *** 80200 CPU ***
|
// *** 80200 CPU ***
|
#define CYGNUM_HAL_INTERRUPT_DMA0_EOT 0
|
#define CYGNUM_HAL_INTERRUPT_DMA0_EOT 0
|
#define CYGNUM_HAL_INTERRUPT_DMA0_EOC 1
|
#define CYGNUM_HAL_INTERRUPT_DMA0_EOC 1
|
#define CYGNUM_HAL_INTERRUPT_DMA1_EOT 2
|
#define CYGNUM_HAL_INTERRUPT_DMA1_EOT 2
|
#define CYGNUM_HAL_INTERRUPT_DMA1_EOC 3
|
#define CYGNUM_HAL_INTERRUPT_DMA1_EOC 3
|
#define CYGNUM_HAL_INTERRUPT_RSVD_4 4
|
#define CYGNUM_HAL_INTERRUPT_RSVD_4 4
|
#define CYGNUM_HAL_INTERRUPT_RSVD_5 5
|
#define CYGNUM_HAL_INTERRUPT_RSVD_5 5
|
#define CYGNUM_HAL_INTERRUPT_AA_EOT 6
|
#define CYGNUM_HAL_INTERRUPT_AA_EOT 6
|
#define CYGNUM_HAL_INTERRUPT_AA_EOC 7
|
#define CYGNUM_HAL_INTERRUPT_AA_EOC 7
|
#define CYGNUM_HAL_INTERRUPT_CORE_PMON 8
|
#define CYGNUM_HAL_INTERRUPT_CORE_PMON 8
|
#define CYGNUM_HAL_INTERRUPT_TIMER0 9
|
#define CYGNUM_HAL_INTERRUPT_TIMER0 9
|
#define CYGNUM_HAL_INTERRUPT_TIMER1 10
|
#define CYGNUM_HAL_INTERRUPT_TIMER1 10
|
#define CYGNUM_HAL_INTERRUPT_I2C_0 11
|
#define CYGNUM_HAL_INTERRUPT_I2C_0 11
|
#define CYGNUM_HAL_INTERRUPT_I2C_1 12
|
#define CYGNUM_HAL_INTERRUPT_I2C_1 12
|
#define CYGNUM_HAL_INTERRUPT_MESSAGING 13
|
#define CYGNUM_HAL_INTERRUPT_MESSAGING 13
|
#define CYGNUM_HAL_INTERRUPT_ATU_BIST 14
|
#define CYGNUM_HAL_INTERRUPT_ATU_BIST 14
|
#define CYGNUM_HAL_INTERRUPT_PERFMON 15
|
#define CYGNUM_HAL_INTERRUPT_PERFMON 15
|
#define CYGNUM_HAL_INTERRUPT_CORE_PMU 16
|
#define CYGNUM_HAL_INTERRUPT_CORE_PMU 16
|
#define CYGNUM_HAL_INTERRUPT_BIU_ERR 17
|
#define CYGNUM_HAL_INTERRUPT_BIU_ERR 17
|
#define CYGNUM_HAL_INTERRUPT_ATU_ERR 18
|
#define CYGNUM_HAL_INTERRUPT_ATU_ERR 18
|
#define CYGNUM_HAL_INTERRUPT_MCU_ERR 19
|
#define CYGNUM_HAL_INTERRUPT_MCU_ERR 19
|
#define CYGNUM_HAL_INTERRUPT_DMA0_ERR 20
|
#define CYGNUM_HAL_INTERRUPT_DMA0_ERR 20
|
#define CYGNUM_HAL_INTERRUPT_DMA1_ERR 22
|
#define CYGNUM_HAL_INTERRUPT_DMA1_ERR 22
|
#define CYGNUM_HAL_INTERRUPT_AA_ERR 23
|
#define CYGNUM_HAL_INTERRUPT_AA_ERR 23
|
#define CYGNUM_HAL_INTERRUPT_MSG_ERR 24
|
#define CYGNUM_HAL_INTERRUPT_MSG_ERR 24
|
#define CYGNUM_HAL_INTERRUPT_SSP 25
|
#define CYGNUM_HAL_INTERRUPT_SSP 25
|
#define CYGNUM_HAL_INTERRUPT_RSVD_26 26
|
#define CYGNUM_HAL_INTERRUPT_RSVD_26 26
|
#define CYGNUM_HAL_INTERRUPT_XINT0 27
|
#define CYGNUM_HAL_INTERRUPT_XINT0 27
|
#define CYGNUM_HAL_INTERRUPT_XINT1 28
|
#define CYGNUM_HAL_INTERRUPT_XINT1 28
|
#define CYGNUM_HAL_INTERRUPT_XINT2 29
|
#define CYGNUM_HAL_INTERRUPT_XINT2 29
|
#define CYGNUM_HAL_INTERRUPT_XINT3 30
|
#define CYGNUM_HAL_INTERRUPT_XINT3 30
|
#define CYGNUM_HAL_INTERRUPT_HPI 31
|
#define CYGNUM_HAL_INTERRUPT_HPI 31
|
|
|
The data passed to the ISR is pulled from a data table (hal_interrupt_data)
|
The data passed to the ISR is pulled from a data table (hal_interrupt_data)
|
which immediately follows the interrupt vector table. With
|
which immediately follows the interrupt vector table. With
|
32 interrupts, the data table starts at address 0x8084.
|
32 interrupts, the data table starts at address 0x8084.
|
An application may create a normal C function with the above prototype
|
An application may create a normal C function with the above prototype
|
to be an ISR. Just poke its address into the table at the correct index and
|
to be an ISR. Just poke its address into the table at the correct index and
|
enable the interrupt at its source. The return value of the ISR is ignored
|
enable the interrupt at its source. The return value of the ISR is ignored
|
by RedBoot.
|
by RedBoot.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
The RAM based page table is located at RAM start + 0x4000. RedBoot may be configured
|
The RAM based page table is located at RAM start + 0x4000. RedBoot may be configured
|
for one of two memory maps. The difference between them is the location of RAM and the
|
for one of two memory maps. The difference between them is the location of RAM and the
|
PCI outbound windows. The alternative memory map may be used when
|
PCI outbound windows. The alternative memory map may be used when
|
building RedBoot or eCos by using the RAM_ALTMAP
|
building RedBoot or eCos by using the RAM_ALTMAP
|
and ROM_ALTMAP startup types in the configuration.
|
and ROM_ALTMAP startup types in the configuration.
|
NOTE
|
NOTE
|
The virtual memory maps in this section use a C, B, and X column to indicate
|
The virtual memory maps in this section use a C, B, and X column to indicate
|
the caching policy for the region..
|
the caching policy for the region..
|
|
|
|
|
X C B Description
|
X C B Description
|
- - - ---------------------------------------------
|
- - - ---------------------------------------------
|
0 0 0 Uncached/Unbuffered
|
0 0 0 Uncached/Unbuffered
|
0 0 1 Uncached/Buffered
|
0 0 1 Uncached/Buffered
|
0 1 0 Cached/Buffered Write Through, Read Allocate
|
0 1 0 Cached/Buffered Write Through, Read Allocate
|
0 1 1 Cached/Buffered Write Back, Read Allocate
|
0 1 1 Cached/Buffered Write Back, Read Allocate
|
1 0 0 Invalid -- not used
|
1 0 0 Invalid -- not used
|
1 0 1 Uncached/Buffered No write buffer coalescing
|
1 0 1 Uncached/Buffered No write buffer coalescing
|
1 1 0 Mini DCache - Policy set by Aux Ctl Register
|
1 1 0 Mini DCache - Policy set by Aux Ctl Register
|
1 1 1 Cached/Buffered Write Back, Read/Write Allocate
|
1 1 1 Cached/Buffered Write Back, Read/Write Allocate
|
|
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- ----------------------------------
|
----------------------- ----------------------------------
|
0x00000000 - 0x7fffffff ATU Outbound Direct Window
|
0x00000000 - 0x7fffffff ATU Outbound Direct Window
|
0x80000000 - 0x900fffff ATU Outbound Translate Windows
|
0x80000000 - 0x900fffff ATU Outbound Translate Windows
|
0xa0000000 - 0xbfffffff SDRAM
|
0xa0000000 - 0xbfffffff SDRAM
|
0xf0000000 - 0xf0800000 FLASH (PBIU CS0)
|
0xf0000000 - 0xf0800000 FLASH (PBIU CS0)
|
0xfe800000 - 0xfe800fff UART (PBIU CS1)
|
0xfe800000 - 0xfe800fff UART (PBIU CS1)
|
0xfe840000 - 0xfe840fff Left 7-segment LED (PBIU CS3)
|
0xfe840000 - 0xfe840fff Left 7-segment LED (PBIU CS3)
|
0xfe850000 - 0xfe850fff Right 7-segment LED (PBIU CS2)
|
0xfe850000 - 0xfe850fff Right 7-segment LED (PBIU CS2)
|
0xfe8d0000 - 0xfe8d0fff Rotary Switch (PBIU CS4)
|
0xfe8d0000 - 0xfe8d0fff Rotary Switch (PBIU CS4)
|
0xfe8f0000 - 0xfe8f0fff Baterry Status (PBIU CS5)
|
0xfe8f0000 - 0xfe8f0fff Baterry Status (PBIU CS5)
|
0xfff00000 - 0xffffffff Verde Memory mapped Registers
|
0xfff00000 - 0xffffffff Verde Memory mapped Registers
|
|
|
|
|
Default Virtual Map X C B Description
|
Default Virtual Map X C B Description
|
----------------------- - - - ----------------------------------
|
----------------------- - - - ----------------------------------
|
0x00000000 - 0x1fffffff 1 1 1 SDRAM
|
0x00000000 - 0x1fffffff 1 1 1 SDRAM
|
0x20000000 - 0x9fffffff 0 0 0 ATU Outbound Direct Window
|
0x20000000 - 0x9fffffff 0 0 0 ATU Outbound Direct Window
|
0xa0000000 - 0xb00fffff 0 0 0 ATU Outbound Translate Windows
|
0xa0000000 - 0xb00fffff 0 0 0 ATU Outbound Translate Windows
|
0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
|
0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
|
0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
|
0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
|
0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
|
0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
|
0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
|
0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
|
0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
|
0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
|
0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
|
0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
|
0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
|
0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
|
0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
|
0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
|
0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
|
0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
|
|
|
Alternate Virtual Map X C B Description
|
Alternate Virtual Map X C B Description
|
----------------------- - - - ----------------------------------
|
----------------------- - - - ----------------------------------
|
0x00000000 - 0x000fffff 1 1 1 Alias for 1st MB of SDRAM
|
0x00000000 - 0x000fffff 1 1 1 Alias for 1st MB of SDRAM
|
0x00100000 - 0x7fffffff 0 0 0 ATU Outbound Direct Window
|
0x00100000 - 0x7fffffff 0 0 0 ATU Outbound Direct Window
|
0x80000000 - 0x900fffff 0 0 0 ATU Outbound Translate Windows
|
0x80000000 - 0x900fffff 0 0 0 ATU Outbound Translate Windows
|
0xa0000000 - 0xbfffffff 1 1 1 SDRAM
|
0xa0000000 - 0xbfffffff 1 1 1 SDRAM
|
0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
|
0xc0000000 - 0xdfffffff 0 0 0 Uncached alias for SDRAM
|
0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
|
0xe0000000 - 0xe00fffff 1 1 1 Cache flush region (no phys mem)
|
0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
|
0xf0000000 - 0xf0800000 0 1 0 FLASH (PBIU CS0)
|
0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
|
0xfe800000 - 0xfe800fff 0 0 0 UART (PBIU CS1)
|
0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
|
0xfe840000 - 0xfe840fff 0 0 0 Left 7-segment LED (PBIU CS3)
|
0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
|
0xfe850000 - 0xfe850fff 0 0 0 Right 7-segment LED (PBIU CS2)
|
0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
|
0xfe8d0000 - 0xfe8d0fff 0 0 0 Rotary Switch (PBIU CS4)
|
0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
|
0xfe8f0000 - 0xfe8f0fff 0 0 0 Baterry Status (PBIU CS5)
|
0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
|
0xfff00000 - 0xffffffff 0 0 0 Verde Memory mapped Registers
|
|
|
|
|
|
|
|
|
Platform Resource Usage
|
Platform Resource Usage
|
The Verde programmable timer0 is used for timeout support
|
The Verde programmable timer0 is used for timeout support
|
for networking and XModem file transfers.
|
for networking and XModem file transfers.
|
|
|
|
|
|
|
|
|
|
|
CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board
|
CalmRISC/CalmRISC16 Samsung CalmRISC16 Core Evaluation Board
|
|
|
Overview
|
Overview
|
Samsung CalmRISC16 Core EVBinstalling
|
Samsung CalmRISC16 Core EVBinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Samsung CalmRISC16 Core EVB The
|
Samsung CalmRISC16 Core EVB The
|
Samsung CalmRISC16 evaluation platform consists of two boards connected by a
|
Samsung CalmRISC16 evaluation platform consists of two boards connected by a
|
ribbon cable. One board contains the CPU core and memory. The other board is
|
ribbon cable. One board contains the CPU core and memory. The other board is
|
called the MDSChip board and provides the host interface. The calmRISC16 is a
|
called the MDSChip board and provides the host interface. The calmRISC16 is a
|
harvard architecture with separate 22-bit program and data addresses. The
|
harvard architecture with separate 22-bit program and data addresses. The
|
instruction set provides no instruction for writing to program memory. The
|
instruction set provides no instruction for writing to program memory. The
|
MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
|
MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
|
so that code running on the core has access to a serial channel and a mechanism
|
so that code running on the core has access to a serial channel and a mechanism
|
to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
|
to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
|
firmware. The CalmBreaker firmware also provides a serial protocol which
|
firmware. The CalmBreaker firmware also provides a serial protocol which
|
allows a host to download a program and to start or stop the core board.
|
allows a host to download a program and to start or stop the core board.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running via the MDSChip board.
|
RedBoot running via the MDSChip board.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The CalmRISC16 core is controlled through the MDSChip board. There is
|
The CalmRISC16 core is controlled through the MDSChip board. There is
|
no non-volatile storage available for RedBoot, so RedBoot must be downloaded
|
no non-volatile storage available for RedBoot, so RedBoot must be downloaded
|
to the board on every power cycle. A small utility program is used to download
|
to the board on every power cycle. A small utility program is used to download
|
S-record files to the eval board. Sources and build instructions for this
|
S-record files to the eval board. Sources and build instructions for this
|
utility are located in the RedBoot sources in:
|
utility are located in the RedBoot sources in:
|
packages/hal/calmrisc16/ceb/current/support
|
packages/hal/calmrisc16/ceb/current/support
|
|
|
To download the RedBoot image, first press the reset button on the MDSChip
|
To download the RedBoot image, first press the reset button on the MDSChip
|
board. The green 'Run' LED on the core board should go off. Now, use the
|
board. The green 'Run' LED on the core board should go off. Now, use the
|
utility to download the RedBoot image with:
|
utility to download the RedBoot image with:
|
$ calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf
|
$ calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf
|
|
|
Note that the '-p /dev/term/b' specifies the serial port to use and will vary
|
Note that the '-p /dev/term/b' specifies the serial port to use and will vary
|
from system to system. The download will take about two minutes. After it
|
from system to system. The download will take about two minutes. After it
|
finishes, start RedBoot with:
|
finishes, start RedBoot with:
|
$ calmbreaker -p /dev/term/b --run
|
$ calmbreaker -p /dev/term/b --run
|
The 'Run' LED on the core board should be on. Connecting to the MDSboard with
|
The 'Run' LED on the core board should be on. Connecting to the MDSboard with
|
a terminal and typing enter should result in RedBoot reprinting the command
|
a terminal and typing enter should result in RedBoot reprinting the command
|
prompt.
|
prompt.
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Special Note on Serial Channel
|
Special Note on Serial Channel
|
The MDSChip board uses a relatively slow microcontroller to provide
|
The MDSChip board uses a relatively slow microcontroller to provide
|
the pseudo-register interface to the core board. This pseudo-register
|
the pseudo-register interface to the core board. This pseudo-register
|
interface provides access to the serial channel and write access to program
|
interface provides access to the serial channel and write access to program
|
memory. Those interfaces are slow and the serial channel is easily overrun
|
memory. Those interfaces are slow and the serial channel is easily overrun
|
by a fast host. For this reason, GDB must be told to limit the size of code
|
by a fast host. For this reason, GDB must be told to limit the size of code
|
download packets to avoid serial overrun. This is done with the following
|
download packets to avoid serial overrun. This is done with the following
|
GDB command:
|
GDB command:
|
(gdb) set download-write-size 25
|
(gdb) set download-write-size 25
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=calm16_ceb
|
export TARGET=calm16_ceb
|
export ARCH_DIR=calmrisc16
|
export ARCH_DIR=calmrisc16
|
export PLATFORM_DIR=ceb
|
export PLATFORM_DIR=ceb
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board
|
CalmRISC/CalmRISC32 Samsung CalmRISC32 Core Evaluation Board
|
|
|
Overview
|
Overview
|
Samsung CalmRISC32 Core EVBinstalling
|
Samsung CalmRISC32 Core EVBinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Samsung CalmRISC32 Core EVB The
|
Samsung CalmRISC32 Core EVB The
|
Samsung CalmRISC32 evaluation platform consists of two boards connected by a
|
Samsung CalmRISC32 evaluation platform consists of two boards connected by a
|
ribbon cable. One board contains the CPU core and memory. The other board is
|
ribbon cable. One board contains the CPU core and memory. The other board is
|
called the MDSChip board and provides the host interface. The calmRISC32 is a
|
called the MDSChip board and provides the host interface. The calmRISC32 is a
|
harvard architecture with separate 32-bit program and data addresses. The
|
harvard architecture with separate 32-bit program and data addresses. The
|
instruction set provides no instruction for writing to program memory. The
|
instruction set provides no instruction for writing to program memory. The
|
MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
|
MDSChip board firmware (called CalmBreaker) provides a pseudo register interface
|
so that code running on the core has access to a serial channel and a mechanism
|
so that code running on the core has access to a serial channel and a mechanism
|
to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
|
to write to program memory. The serial channel is fixed at 57600-8-N-1 by the
|
firmware. The CalmBreaker firmware also provides a serial protocol which
|
firmware. The CalmBreaker firmware also provides a serial protocol which
|
allows a host to download a program and to start or stop the core board.
|
allows a host to download a program and to start or stop the core board.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running via the MDSChip board.
|
RedBoot running via the MDSChip board.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The calmRISC32 core is controlled through the MDSChip board. There is
|
The calmRISC32 core is controlled through the MDSChip board. There is
|
no non-volatile storage available for RedBoot, so RedBoot must be downloaded
|
no non-volatile storage available for RedBoot, so RedBoot must be downloaded
|
to the board on every power cycle. A small utility program is used to download
|
to the board on every power cycle. A small utility program is used to download
|
S-record files to the eval board. Sources and build instructions for this
|
S-record files to the eval board. Sources and build instructions for this
|
utility are located in the RedBoot sources in:
|
utility are located in the RedBoot sources in:
|
packages/hal/calmrisc32/ceb/current/support
|
packages/hal/calmrisc32/ceb/current/support
|
|
|
To download the RedBoot image, first press the reset button on the MDSChip
|
To download the RedBoot image, first press the reset button on the MDSChip
|
board. The green 'Run' LED on the core board should go off. Now, use the
|
board. The green 'Run' LED on the core board should go off. Now, use the
|
utility to download the RedBoot image with:
|
utility to download the RedBoot image with:
|
$ calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf
|
$ calmbreaker -p /dev/term/b --reset --srec-code -f redboot.elf
|
|
|
Note that the '-p /dev/term/b' specifies the serial port to use and will vary
|
Note that the '-p /dev/term/b' specifies the serial port to use and will vary
|
from system to syetm. The download will take about two minutes. After it
|
from system to syetm. The download will take about two minutes. After it
|
finishes, start RedBoot with:
|
finishes, start RedBoot with:
|
$ calmbreaker -p /dev/term/b --run
|
$ calmbreaker -p /dev/term/b --run
|
The 'Run' LED on the core board should be on. Connecting to the MDSboard with
|
The 'Run' LED on the core board should be on. Connecting to the MDSboard with
|
a terminal and typing enter should result in RedBoot reprinting the command
|
a terminal and typing enter should result in RedBoot reprinting the command
|
prompt.
|
prompt.
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Special Note on Serial Channel
|
Special Note on Serial Channel
|
The MDSChip board uses a relatively slow microcontroller to provide
|
The MDSChip board uses a relatively slow microcontroller to provide
|
the pseudo-register interface to the core board. This pseudo-register
|
the pseudo-register interface to the core board. This pseudo-register
|
interface provides access to the serial channel and write access to program
|
interface provides access to the serial channel and write access to program
|
memory. Those interfaces are slow and the serial channel is easily overrun
|
memory. Those interfaces are slow and the serial channel is easily overrun
|
by a fast host. For this reason, GDB must be told to limit the size of code
|
by a fast host. For this reason, GDB must be told to limit the size of code
|
download packets to avoid serial overrun. This is done with the following
|
download packets to avoid serial overrun. This is done with the following
|
GDB command:
|
GDB command:
|
(gdb) set download-write-size 25
|
(gdb) set download-write-size 25
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=calm32_ceb
|
export TARGET=calm32_ceb
|
export ARCH_DIR=calmrisc32
|
export ARCH_DIR=calmrisc32
|
export PLATFORM_DIR=ceb
|
export PLATFORM_DIR=ceb
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
FRV/FRV400 Fujitsu FR-V 400 (MB-93091)
|
FRV/FRV400 Fujitsu FR-V 400 (MB-93091)
|
|
|
Overview
|
Overview
|
|
|
Fujitsu FR-V 400
|
Fujitsu FR-V 400
|
installing and testing
|
installing and testing
|
installing and testing
|
installing and testing
|
Fujitsu FR-V 400
|
Fujitsu FR-V 400
|
RedBoot supports both serial ports, which are available via
|
RedBoot supports both serial ports, which are available via
|
the stacked serial connectors on the mother board.
|
the stacked serial connectors on the mother board.
|
The topmost port is the default and is considered to be port 0 by RedBoot.
|
The topmost port is the default and is considered to be port 0 by RedBoot.
|
The bottommost port is serial port 1.
|
The bottommost port is serial port 1.
|
The default serial port settings are 38400,8,N,1.
|
The default serial port settings are 38400,8,N,1.
|
|
|
|
|
FLASH management is also supported, but only for the FLASH device in IC7.
|
FLASH management is also supported, but only for the FLASH device in IC7.
|
This arrangement allows for IC8 to retain either the original Fujitsu board
|
This arrangement allows for IC8 to retain either the original Fujitsu board
|
firmware, or some application specific contents.
|
firmware, or some application specific contents.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
|
|
|
|
RedBoot can be installed by directly programming the FLASH device in IC7
|
RedBoot can be installed by directly programming the FLASH device in IC7
|
or by using the Fujitsu provided software to download and install a
|
or by using the Fujitsu provided software to download and install a
|
version into the FLASH device. Complete instructions are provided
|
version into the FLASH device. Complete instructions are provided
|
separately.
|
separately.
|
|
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
|
|
None.
|
None.
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
|
|
The memory map of this platform is fixed by the hardware (cannot
|
The memory map of this platform is fixed by the hardware (cannot
|
be changed by software). The only attributes which can be modified are
|
be changed by software). The only attributes which can be modified are
|
control over cacheability, as noted below.
|
control over cacheability, as noted below.
|
|
|
Address Cache? Resource
|
Address Cache? Resource
|
00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
|
00000000-03EFFFFF Yes SDRAM (via plugin DIMM)
|
03F00000-03FFFFFF No SDRAM (used for PCI window)
|
03F00000-03FFFFFF No SDRAM (used for PCI window)
|
10000000-1FFFFFFF No MB86943 PCI bridge
|
10000000-1FFFFFFF No MB86943 PCI bridge
|
20000000-201FFFFF No SRAM
|
20000000-201FFFFF No SRAM
|
21000000-23FFFFFF No Motherboard resources
|
21000000-23FFFFFF No Motherboard resources
|
24000000-25FFFFFF No PCI I/O space
|
24000000-25FFFFFF No PCI I/O space
|
26000000-2FFFFFFF No PCI Memory space
|
26000000-2FFFFFFF No PCI Memory space
|
30000000-FDFFFFFF ?? Unused
|
30000000-FDFFFFFF ?? Unused
|
FE000000-FEFFFFFF No I/O devices
|
FE000000-FEFFFFFF No I/O devices
|
FF000000-FF1FFFFF No IC7 - RedBoot FLASH
|
FF000000-FF1FFFFF No IC7 - RedBoot FLASH
|
FF200000-FF3FFFFF No IC8 - unused FLASH
|
FF200000-FF3FFFFF No IC8 - unused FLASH
|
FF400000-FFFFFFFF No Misc other I/O
|
FF400000-FFFFFFFF No Misc other I/O
|
|
|
|
|
|
|
NOTE
|
NOTE
|
|
|
The only configuration currently suppored requires a 64MB SDRAM
|
The only configuration currently suppored requires a 64MB SDRAM
|
DIMM to be present on the CPU card. No other memory configuration
|
DIMM to be present on the CPU card. No other memory configuration
|
is supported at this time.
|
is supported at this time.
|
|
|
|
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=frv400
|
export TARGET=frv400
|
export ARCH_DIR=frv
|
export ARCH_DIR=frv
|
export PLATFORM_DIR=frv400
|
export PLATFORM_DIR=frv400
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IA32/x86 x86-Based PC
|
IA32/x86 x86-Based PC
|
|
|
Overview
|
Overview
|
x86 Based PCinstalling and
|
x86 Based PCinstalling and
|
testinginstalling and testing
|
testinginstalling and testing
|
x86 Based PCRedBoot supports
|
x86 Based PCRedBoot supports
|
two serial ports and an Intel i82559 based ethernet card (for example an Intel
|
two serial ports and an Intel i82559 based ethernet card (for example an Intel
|
EtherExpress Pro 10/100) for communication and downloads. The default serial
|
EtherExpress Pro 10/100) for communication and downloads. The default serial
|
port settings are 38400,8,N,1.
|
port settings are 38400,8,N,1.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
Floppy
|
Floppy
|
[Floppy]
|
[Floppy]
|
RedBoot running from a boot floppy disk installed
|
RedBoot running from a boot floppy disk installed
|
in the A: drive of the PC.
|
in the A: drive of the PC.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot takes the form of a self-booting image that must be written
|
RedBoot takes the form of a self-booting image that must be written
|
onto a formatted floppy disk. The process will erase any file system or data
|
onto a formatted floppy disk. The process will erase any file system or data
|
that already exists on that disk, so proceed with caution.
|
that already exists on that disk, so proceed with caution.
|
For Red Hat Linux users, this can be done by:
|
For Red Hat Linux users, this can be done by:
|
$ dd conv=sync if=install/bin/redboot.bin of=/dev/fd0H1440
|
$ dd conv=sync if=install/bin/redboot.bin of=/dev/fd0H1440
|
|
|
For NT Cygwin users, this can be done by first ensuring that the raw
|
For NT Cygwin users, this can be done by first ensuring that the raw
|
floppy device is mounted as /dev/fd0. To check if this
|
floppy device is mounted as /dev/fd0. To check if this
|
is the case, type the command mount at the Cygwin bash
|
is the case, type the command mount at the Cygwin bash
|
prompt. If the floppy drive is already mounted, it will be listed as something
|
prompt. If the floppy drive is already mounted, it will be listed as something
|
similar to the following line:
|
similar to the following line:
|
\\.\a: /dev/fd0 user binmode
|
\\.\a: /dev/fd0 user binmode
|
If this line is not listed, then mount the floppy drive using the command:
|
If this line is not listed, then mount the floppy drive using the command:
|
|
|
$ mount -f -b //./a: /dev/fd0
|
$ mount -f -b //./a: /dev/fd0
|
To actually install the boot image on the floppy, use the command:
|
To actually install the boot image on the floppy, use the command:
|
$ dd conv=sync if=install/bin/redboot.bin of=/dev/fd0
|
$ dd conv=sync if=install/bin/redboot.bin of=/dev/fd0
|
|
|
Insert this floppy in the A: drive of the PC to be used as a target
|
Insert this floppy in the A: drive of the PC to be used as a target
|
and ensure that the BIOS is configured to boot from A: by default. On reset,
|
and ensure that the BIOS is configured to boot from A: by default. On reset,
|
the PC will boot from the floppy and be ready to be debugged via either serial
|
the PC will boot from the floppy and be ready to be debugged via either serial
|
line, or via the ethernet interface if it is installed.
|
line, or via the ethernet interface if it is installed.
|
NOTE
|
NOTE
|
Unreliable floppy media may cause the write to silently fail. This
|
Unreliable floppy media may cause the write to silently fail. This
|
can be determined if the RedBoot image does not correctly
|
can be determined if the RedBoot image does not correctly
|
boot. In such cases, the floppy should be (unconditionally) reformatted
|
boot. In such cases, the floppy should be (unconditionally) reformatted
|
using the fdformat command on Linux, or
|
using the fdformat command on Linux, or
|
format a: /u on DOS/Windows.
|
format a: /u on DOS/Windows.
|
|
|
|
|
|
|
Flash management
|
Flash management
|
PC RedBoot does not support any FLASH commands.
|
PC RedBoot does not support any FLASH commands.
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
All selectors are initialized to map the entire 32-bit address space
|
All selectors are initialized to map the entire 32-bit address space
|
in the familiar protected mode flat model. Page translation is not used.
|
in the familiar protected mode flat model. Page translation is not used.
|
RAM up to 640K is mapped to 0x0 to 0xa0000. RAM above 640K is mapped
|
RAM up to 640K is mapped to 0x0 to 0xa0000. RAM above 640K is mapped
|
from address 0x100000 upwards. Space is reserved between 0xa0000 and
|
from address 0x100000 upwards. Space is reserved between 0xa0000 and
|
0x100000 for option ROMs and the BIOS.
|
0x100000 for option ROMs and the BIOS.
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=pc
|
export TARGET=pc
|
export ARCH_DIR=i386
|
export ARCH_DIR=i386
|
export PLATFORM_DIR=pc
|
export PLATFORM_DIR=pc
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board
|
MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board
|
|
|
Overview
|
Overview
|
MIPS Atlas Board with CoreLV 4KC and CoreLV 5KC
|
MIPS Atlas Board with CoreLV 4KC and CoreLV 5KC
|
installing and testing
|
installing and testing
|
installing and testingMIPS Atlas Board with
|
installing and testingMIPS Atlas Board with
|
CoreLV 4KC and CoreLV 5KCRedBoot supports the DgbSer
|
CoreLV 4KC and CoreLV 5KCRedBoot supports the DgbSer
|
serial port and the built in ethernet port for communication and downloads.
|
serial port and the built in ethernet port for communication and downloads.
|
The default serial port settings are 115200,8,N,1. RedBoot runs from and supports
|
The default serial port settings are 115200,8,N,1. RedBoot runs from and supports
|
flash management for the system flash region.
|
flash management for the system flash region.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot is installed using the code download facility built into the
|
RedBoot is installed using the code download facility built into the
|
Atlas board. See the Atlas User manual for details, and also the Atlas download
|
Atlas board. See the Atlas User manual for details, and also the Atlas download
|
format in .
|
format in .
|
|
|
Quick download instructions
|
Quick download instructions
|
Here are quick start instructions for downloading the prebuilt RedBoot
|
Here are quick start instructions for downloading the prebuilt RedBoot
|
image.
|
image.
|
|
|
Locate the prebuilt files in the bin directory:
|
Locate the prebuilt files in the bin directory:
|
deleteall.dl and redboot.dl.
|
deleteall.dl and redboot.dl.
|
|
|
|
|
Make sure switch S1-1 is OFF and switch S5-1 is ON. Reset
|
Make sure switch S1-1 is OFF and switch S5-1 is ON. Reset
|
the board and verify that the LED display reads Flash DL.
|
the board and verify that the LED display reads Flash DL.
|
|
|
|
|
Make sure your parallel port is connected to the 1284 port
|
Make sure your parallel port is connected to the 1284 port
|
Of the Atlas board.
|
Of the Atlas board.
|
|
|
Send the deleteall.dl file to the
|
Send the deleteall.dl file to the
|
parallel port to erase previous images:
|
parallel port to erase previous images:
|
$ cat deleteall.dl >/dev/lp0
|
$ cat deleteall.dl >/dev/lp0
|
When this is complete, the LED display should read
|
When this is complete, the LED display should read
|
Deleted.
|
Deleted.
|
|
|
Send the ROM mode RedBoot image to the board:
|
Send the ROM mode RedBoot image to the board:
|
$ cat redboot.dl >/dev/lp0
|
$ cat redboot.dl >/dev/lp0
|
When this is complete, the LED display should show the last
|
When this is complete, the LED display should show the last
|
address programmed. This will be something like: 1fc17000
|
address programmed. This will be something like: 1fc17000
|
.
|
.
|
|
|
Change switch S5-1 to OFF and reset the board. The LED display
|
Change switch S5-1 to OFF and reset the board. The LED display
|
should read RedBoot.
|
should read RedBoot.
|
|
|
Run the RedBoot fis init
|
Run the RedBoot fis init
|
and fconfig commands to initialize the flash.
|
and fconfig commands to initialize the flash.
|
See ,
|
See ,
|
and for details.
|
and for details.
|
|
|
|
|
|
|
|
|
Atlas download format
|
Atlas download format
|
In order to download RedBoot to the Atlas board, it must be converted
|
In order to download RedBoot to the Atlas board, it must be converted
|
to the Atlas download format. There are different ways of doing this depending
|
to the Atlas download format. There are different ways of doing this depending
|
on which version of the developer's kit is shipped with the board.
|
on which version of the developer's kit is shipped with the board.
|
The Atlas Developer's Kit CD contains an
|
The Atlas Developer's Kit CD contains an
|
srec2flash utility. The source code for this utility is part
|
srec2flash utility. The source code for this utility is part
|
of the yamon/yamon-src-01.01.tar.gz tarball
|
of the yamon/yamon-src-01.01.tar.gz tarball
|
on the Dev Kit CD. The path in the expanded tarball is
|
on the Dev Kit CD. The path in the expanded tarball is
|
class="directory">yamon/bin/tools. To use
|
class="directory">yamon/bin/tools. To use
|
srec2flash to convert the S-record file:
|
srec2flash to convert the S-record file:
|
$ srec2flash -EL -S29 redboot.srec >redboot.dl
|
$ srec2flash -EL -S29 redboot.srec >redboot.dl
|
The Atlas/Malta Developer's Kit CD
|
The Atlas/Malta Developer's Kit CD
|
contains an srecconv.pl utility which requires
|
contains an srecconv.pl utility which requires
|
Perl. This utilty is part of the yamon/yamon-src-02.00.tar.gz
|
Perl. This utilty is part of the yamon/yamon-src-02.00.tar.gz
|
tarball on the Dev Kit CD. The path in the expanded tarball
|
tarball on the Dev Kit CD. The path in the expanded tarball
|
is yamon/bin/tools. To use
|
is yamon/bin/tools. To use
|
srecconv to convert the S-record file:
|
srecconv to convert the S-record file:
|
$ cp redboot_ROM.srec redboot_ROM.rec
|
$ cp redboot_ROM.srec redboot_ROM.rec
|
$ srecconv.pl -ES L -A 29 redboot_ROM
|
$ srecconv.pl -ES L -A 29 redboot_ROM
|
The resulting file is named redboot_ROM.fl.
|
The resulting file is named redboot_ROM.fl.
|
|
|
|
|
Flash management
|
Flash management
|
|
|
Additional config options
|
Additional config options
|
The ethernet MAC address is stored in flash manually using the
|
The ethernet MAC address is stored in flash manually using the
|
fconfig command. You can use the YAMON setenv
|
fconfig command. You can use the YAMON setenv
|
ethaddr command to print out the board ethernet address.
|
ethaddr command to print out the board ethernet address.
|
Typically, it is: 00:0d:a0:00:xx:xx where
|
Typically, it is: 00:0d:a0:00:xx:xx where
|
xx.xx is the hex representation of the
|
xx.xx is the hex representation of the
|
board serial number.
|
board serial number.
|
|
|
|
|
|
|
Additional commands
|
Additional commands
|
The exec command which allows the
|
The exec command which allows the
|
loading and execution of Linux kernels, is supported for this architecture
|
loading and execution of Linux kernels, is supported for this architecture
|
(see ). The
|
(see ). The
|
exec parameters used for MIPS boards are:
|
exec parameters used for MIPS boards are:
|
|
|
-b <addr>
|
-b <addr>
|
Location to store command line and environment passed to kernel
|
Location to store command line and environment passed to kernel
|
|
|
-w <time>
|
-w <time>
|
Wait time in seconds before starting kernel
|
Wait time in seconds before starting kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
<addr>
|
<addr>
|
Kernel entry point, defaulting to the entry point of the last image
|
Kernel entry point, defaulting to the entry point of the last image
|
loaded
|
loaded
|
|
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
in the registers equivalent to a C call with prototype:
|
in the registers equivalent to a C call with prototype:
|
void Linux(int argc, char **argv, char **envp);
|
void Linux(int argc, char **argv, char **envp);
|
RedBoot will place the appropriate data at the offset specified by the
|
RedBoot will place the appropriate data at the offset specified by the
|
-b parameter, or by default at address 0x80080000, and will set the
|
-b parameter, or by default at address 0x80080000, and will set the
|
arguments accordingly when calling into the kernel.
|
arguments accordingly when calling into the kernel.
|
|
|
The default entry point, if no image with explicit entry point has been loaded and
|
The default entry point, if no image with explicit entry point has been loaded and
|
none is specified, is 0x80000750.
|
none is specified, is 0x80000750.
|
|
|
|
|
|
|
|
|
Interrupts
|
Interrupts
|
RedBoot uses an interrupt vector table which is located at address 0x80000400.
|
RedBoot uses an interrupt vector table which is located at address 0x80000400.
|
Entries in this table are pointers to functions with this protoype:
|
Entries in this table are pointers to functions with this protoype:
|
int irq_handler( unsigned vector, unsigned data )On an atlas
|
int irq_handler( unsigned vector, unsigned data )On an atlas
|
board, the vector argument is one of 25 interrupts defined in
|
board, the vector argument is one of 25 interrupts defined in
|
hal/mips/atlas/VERSION/include/plf_intr.h:
|
hal/mips/atlas/VERSION/include/plf_intr.h:
|
#define CYGNUM_HAL_INTERRUPT_SER 0
|
#define CYGNUM_HAL_INTERRUPT_SER 0
|
#define CYGNUM_HAL_INTERRUPT_TIM0 1
|
#define CYGNUM_HAL_INTERRUPT_TIM0 1
|
#define CYGNUM_HAL_INTERRUPT_2 2
|
#define CYGNUM_HAL_INTERRUPT_2 2
|
#define CYGNUM_HAL_INTERRUPT_3 3
|
#define CYGNUM_HAL_INTERRUPT_3 3
|
#define CYGNUM_HAL_INTERRUPT_RTC 4
|
#define CYGNUM_HAL_INTERRUPT_RTC 4
|
#define CYGNUM_HAL_INTERRUPT_COREHI 5
|
#define CYGNUM_HAL_INTERRUPT_COREHI 5
|
#define CYGNUM_HAL_INTERRUPT_CORELO 6
|
#define CYGNUM_HAL_INTERRUPT_CORELO 6
|
#define CYGNUM_HAL_INTERRUPT_7 7
|
#define CYGNUM_HAL_INTERRUPT_7 7
|
#define CYGNUM_HAL_INTERRUPT_PCIA 8
|
#define CYGNUM_HAL_INTERRUPT_PCIA 8
|
#define CYGNUM_HAL_INTERRUPT_PCIB 9
|
#define CYGNUM_HAL_INTERRUPT_PCIB 9
|
#define CYGNUM_HAL_INTERRUPT_PCIC 10
|
#define CYGNUM_HAL_INTERRUPT_PCIC 10
|
#define CYGNUM_HAL_INTERRUPT_PCID 11
|
#define CYGNUM_HAL_INTERRUPT_PCID 11
|
#define CYGNUM_HAL_INTERRUPT_ENUM 12
|
#define CYGNUM_HAL_INTERRUPT_ENUM 12
|
#define CYGNUM_HAL_INTERRUPT_DEG 13
|
#define CYGNUM_HAL_INTERRUPT_DEG 13
|
#define CYGNUM_HAL_INTERRUPT_ATXFAIL 14
|
#define CYGNUM_HAL_INTERRUPT_ATXFAIL 14
|
#define CYGNUM_HAL_INTERRUPT_INTA 15
|
#define CYGNUM_HAL_INTERRUPT_INTA 15
|
#define CYGNUM_HAL_INTERRUPT_INTB 16
|
#define CYGNUM_HAL_INTERRUPT_INTB 16
|
#define CYGNUM_HAL_INTERRUPT_INTC 17
|
#define CYGNUM_HAL_INTERRUPT_INTC 17
|
#define CYGNUM_HAL_INTERRUPT_INTD 18
|
#define CYGNUM_HAL_INTERRUPT_INTD 18
|
#define CYGNUM_HAL_INTERRUPT_SERR 19
|
#define CYGNUM_HAL_INTERRUPT_SERR 19
|
#define CYGNUM_HAL_INTERRUPT_HW1 20
|
#define CYGNUM_HAL_INTERRUPT_HW1 20
|
#define CYGNUM_HAL_INTERRUPT_HW2 21
|
#define CYGNUM_HAL_INTERRUPT_HW2 21
|
#define CYGNUM_HAL_INTERRUPT_HW3 22
|
#define CYGNUM_HAL_INTERRUPT_HW3 22
|
#define CYGNUM_HAL_INTERRUPT_HW4 23
|
#define CYGNUM_HAL_INTERRUPT_HW4 23
|
#define CYGNUM_HAL_INTERRUPT_HW5 24The data
|
#define CYGNUM_HAL_INTERRUPT_HW5 24The data
|
passed to the ISR is pulled from a data table (hal_interrupt_data
|
passed to the ISR is pulled from a data table (hal_interrupt_data
|
) which immediately follows the interrupt vector table. With
|
) which immediately follows the interrupt vector table. With
|
25 interrupts, the data table starts at address 0x80000464 on atlas.
|
25 interrupts, the data table starts at address 0x80000464 on atlas.
|
An application may create a normal C function with the above prototype
|
An application may create a normal C function with the above prototype
|
to be an ISR. Just poke its address into the table at the correct index and
|
to be an ISR. Just poke its address into the table at the correct index and
|
enable the interrupt at its source. The return value of the ISR is ignored
|
enable the interrupt at its source. The return value of the ISR is ignored
|
by RedBoot.
|
by RedBoot.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
Memory Maps RedBoot sets up the following memory map on the Atlas board.
|
Memory Maps RedBoot sets up the following memory map on the Atlas board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -------------
|
----------------------- -------------
|
0x00000000 - 0x07ffffff SDRAM
|
0x00000000 - 0x07ffffff SDRAM
|
0x08000000 - 0x17ffffff PCI Memory Space
|
0x08000000 - 0x17ffffff PCI Memory Space
|
0x18000000 - 0x1bdfffff PCI I/O Space
|
0x18000000 - 0x1bdfffff PCI I/O Space
|
0x1be00000 - 0x1bffffff System Controller
|
0x1be00000 - 0x1bffffff System Controller
|
0x1c000000 - 0x1dffffff System flash
|
0x1c000000 - 0x1dffffff System flash
|
0x1e000000 - 0x1e3fffff Monitor flash
|
0x1e000000 - 0x1e3fffff Monitor flash
|
0x1f000000 - 0x1fbfffff FPGA
|
0x1f000000 - 0x1fbfffff FPGA
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=atlas_mips32_4kc
|
export TARGET=atlas_mips32_4kc
|
export TARGET=atlas_mips64_5kc
|
export TARGET=atlas_mips64_5kc
|
export ARCH_DIR=mips
|
export ARCH_DIR=mips
|
export PLATFORM_DIR=atlas
|
export PLATFORM_DIR=atlas
|
|
|
|
|
Use one of the TARGET settings only.
|
Use one of the TARGET settings only.
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board
|
MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board
|
|
|
Overview
|
Overview
|
MIPS Malta Board with CoreLV 4KC and CoreLV 5KC
|
MIPS Malta Board with CoreLV 4KC and CoreLV 5KC
|
installing and testing
|
installing and testing
|
installing and testingMIPS Malta Board with
|
installing and testingMIPS Malta Board with
|
CoreLV 4KC and CoreLV 5KCRedBoot supports both front
|
CoreLV 4KC and CoreLV 5KCRedBoot supports both front
|
facing serial ports and the built in ethernet port for communication and downloads.
|
facing serial ports and the built in ethernet port for communication and downloads.
|
The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
|
The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
|
flash management for the system flash region.
|
flash management for the system flash region.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation
|
Initial Installation
|
RedBoot is installed using the code download facility built into the
|
RedBoot is installed using the code download facility built into the
|
Malta board. See the Malta User manual for details, and also the Malta download
|
Malta board. See the Malta User manual for details, and also the Malta download
|
format in .
|
format in .
|
|
|
Quick download instructions
|
Quick download instructions
|
Here are quick start instructions for downloading the prebuilt RedBoot
|
Here are quick start instructions for downloading the prebuilt RedBoot
|
image.
|
image.
|
|
|
Locate the prebuilt files in the bin directory:
|
Locate the prebuilt files in the bin directory:
|
deleteall.fl and redboot_ROM.fl.
|
deleteall.fl and redboot_ROM.fl.
|
|
|
Make sure switch S5-1 is ON. Reset the board and verify that
|
Make sure switch S5-1 is ON. Reset the board and verify that
|
the LED display reads Flash DL.
|
the LED display reads Flash DL.
|
|
|
Make sure your parallel port is connected to the 1284 port
|
Make sure your parallel port is connected to the 1284 port
|
Of the Atlas board.
|
Of the Atlas board.
|
|
|
Send the deleteall.fl file to the
|
Send the deleteall.fl file to the
|
parallel port to erase previous images:
|
parallel port to erase previous images:
|
$ cat deleteall.fl >/dev/lp0
|
$ cat deleteall.fl >/dev/lp0
|
When this is complete, the LED display should read
|
When this is complete, the LED display should read
|
Deleted.
|
Deleted.
|
|
|
Send the RedBoot image to the board:
|
Send the RedBoot image to the board:
|
$ cat redboot_ROM.fl >/dev/lp0
|
$ cat redboot_ROM.fl >/dev/lp0
|
When this is complete, the LED display should show the last address
|
When this is complete, the LED display should show the last address
|
programmed. This will be something like:
|
programmed. This will be something like:
|
1fc17000.
|
1fc17000.
|
|
|
Change switch S5-1 to OFF and reset the board. The LED display
|
Change switch S5-1 to OFF and reset the board. The LED display
|
should read RedBoot.
|
should read RedBoot.
|
|
|
Run the RedBoot fis init and
|
Run the RedBoot fis init and
|
fconfig commands to initialize the flash. See
|
fconfig commands to initialize the flash. See
|
and for details.
|
and for details.
|
|
|
|
|
|
|
|
|
Malta download format
|
Malta download format
|
In order to download RedBoot to the Malta board, it must be converted
|
In order to download RedBoot to the Malta board, it must be converted
|
to the Malta download format.
|
to the Malta download format.
|
The Atlas/Malta Developer's Kit CD contains an
|
The Atlas/Malta Developer's Kit CD contains an
|
srecconv.pl utility which requires Perl. This utility is part
|
srecconv.pl utility which requires Perl. This utility is part
|
of the yamon/yamon-src-02.00.tar.gz tarball
|
of the yamon/yamon-src-02.00.tar.gz tarball
|
on the Dev Kit CD. The path in the expanded tarball is
|
on the Dev Kit CD. The path in the expanded tarball is
|
class="directory">yamon/bin/tools. To use
|
class="directory">yamon/bin/tools. To use
|
srecconv to convert the S-record file:
|
srecconv to convert the S-record file:
|
$ cp redboot_ROM.srec redboot_ROM.rec
|
$ cp redboot_ROM.srec redboot_ROM.rec
|
$ srecconv.pl -ES L -A 29 redboot_ROM
|
$ srecconv.pl -ES L -A 29 redboot_ROM
|
The resulting file is named redboot_ROM.fl.
|
The resulting file is named redboot_ROM.fl.
|
|
|
|
|
|
|
Additional commands
|
Additional commands
|
The exec command which allows the
|
The exec command which allows the
|
loading and execution of Linux kernels, is supported for this architecture
|
loading and execution of Linux kernels, is supported for this architecture
|
(see ). The
|
(see ). The
|
exec parameters used for MIPS boards are:
|
exec parameters used for MIPS boards are:
|
|
|
-b <addr>
|
-b <addr>
|
Location to store command line and environment passed to kernel
|
Location to store command line and environment passed to kernel
|
|
|
-w <time>
|
-w <time>
|
Wait time in seconds before starting kernel
|
Wait time in seconds before starting kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
<addr>
|
<addr>
|
Kernel entry point, defaulting to the entry point of the last image
|
Kernel entry point, defaulting to the entry point of the last image
|
loaded
|
loaded
|
|
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
in the registers equivalent to a C call with prototype:
|
in the registers equivalent to a C call with prototype:
|
void Linux(int argc, char **argv, char **envp);
|
void Linux(int argc, char **argv, char **envp);
|
RedBoot will place the appropriate data at the offset specified by the
|
RedBoot will place the appropriate data at the offset specified by the
|
-b parameter, or by default at address 0x80080000, and will set the
|
-b parameter, or by default at address 0x80080000, and will set the
|
arguments accordingly when calling into the kernel.
|
arguments accordingly when calling into the kernel.
|
|
|
The default entry point, if no image with explicit entry point has been loaded and
|
The default entry point, if no image with explicit entry point has been loaded and
|
none is specified, is 0x80000750.
|
none is specified, is 0x80000750.
|
|
|
|
|
|
|
|
|
Interrupts
|
Interrupts
|
RedBoot uses an interrupt vector table which is located at address 0x80000200.
|
RedBoot uses an interrupt vector table which is located at address 0x80000200.
|
Entries in this table are pointers to functions with this protoype:
|
Entries in this table are pointers to functions with this protoype:
|
int irq_handler( unsigned vector, unsigned data )On the malta
|
int irq_handler( unsigned vector, unsigned data )On the malta
|
board, the vector argument is one of 22 interrupts defined in
|
board, the vector argument is one of 22 interrupts defined in
|
hal/mips/malta/VERSION/include/plf_intr.h:
|
hal/mips/malta/VERSION/include/plf_intr.h:
|
|
|
#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR 0
|
#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR 0
|
#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI 1
|
#define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI 1
|
#define CYGNUM_HAL_INTERRUPT_CBUS_UART 2
|
#define CYGNUM_HAL_INTERRUPT_CBUS_UART 2
|
#define CYGNUM_HAL_INTERRUPT_COREHI 3
|
#define CYGNUM_HAL_INTERRUPT_COREHI 3
|
#define CYGNUM_HAL_INTERRUPT_CORELO 4
|
#define CYGNUM_HAL_INTERRUPT_CORELO 4
|
#define CYGNUM_HAL_INTERRUPT_COMPARE 5
|
#define CYGNUM_HAL_INTERRUPT_COMPARE 5
|
#define CYGNUM_HAL_INTERRUPT_TIMER 6
|
#define CYGNUM_HAL_INTERRUPT_TIMER 6
|
#define CYGNUM_HAL_INTERRUPT_KEYBOARD 7
|
#define CYGNUM_HAL_INTERRUPT_KEYBOARD 7
|
#define CYGNUM_HAL_INTERRUPT_CASCADE 8
|
#define CYGNUM_HAL_INTERRUPT_CASCADE 8
|
#define CYGNUM_HAL_INTERRUPT_TTY1 9
|
#define CYGNUM_HAL_INTERRUPT_TTY1 9
|
#define CYGNUM_HAL_INTERRUPT_TTY0 10
|
#define CYGNUM_HAL_INTERRUPT_TTY0 10
|
#define CYGNUM_HAL_INTERRUPT_11 11
|
#define CYGNUM_HAL_INTERRUPT_11 11
|
#define CYGNUM_HAL_INTERRUPT_FLOPPY 12
|
#define CYGNUM_HAL_INTERRUPT_FLOPPY 12
|
#define CYGNUM_HAL_INTERRUPT_PARALLEL 13
|
#define CYGNUM_HAL_INTERRUPT_PARALLEL 13
|
#define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK 14
|
#define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK 14
|
#define CYGNUM_HAL_INTERRUPT_I2C 15
|
#define CYGNUM_HAL_INTERRUPT_I2C 15
|
#define CYGNUM_HAL_INTERRUPT_PCI_AB 16
|
#define CYGNUM_HAL_INTERRUPT_PCI_AB 16
|
#define CYGNUM_HAL_INTERRUPT_PCI_CD 17
|
#define CYGNUM_HAL_INTERRUPT_PCI_CD 17
|
#define CYGNUM_HAL_INTERRUPT_MOUSE 18
|
#define CYGNUM_HAL_INTERRUPT_MOUSE 18
|
#define CYGNUM_HAL_INTERRUPT_19 19
|
#define CYGNUM_HAL_INTERRUPT_19 19
|
#define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY 20
|
#define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY 20
|
#define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY 21The data
|
#define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY 21The data
|
passed to the ISR is pulled from a data table (hal_interrupt_data
|
passed to the ISR is pulled from a data table (hal_interrupt_data
|
) which immediately follows the interrupt vector table. With
|
) which immediately follows the interrupt vector table. With
|
22 interrupts, the data table starts at address 0x80000258.
|
22 interrupts, the data table starts at address 0x80000258.
|
An application may create a normal C function with the above prototype
|
An application may create a normal C function with the above prototype
|
to be an ISR. Just poke its address into the table at the correct index and
|
to be an ISR. Just poke its address into the table at the correct index and
|
enable the interrupt at its source. The return value of the ISR is ignored
|
enable the interrupt at its source. The return value of the ISR is ignored
|
by RedBoot.
|
by RedBoot.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
Memory Maps RedBoot sets up the following memory map on the Malta board.
|
Memory Maps RedBoot sets up the following memory map on the Malta board.
|
NOTE
|
NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range C B Description
|
Physical Address Range C B Description
|
----------------------- - - -----------
|
----------------------- - - -----------
|
0x80000000 - 0x81ffffff Y Y SDRAM
|
0x80000000 - 0x81ffffff Y Y SDRAM
|
0x9e000000 - 0x9e3fffff Y N System flash (cached)
|
0x9e000000 - 0x9e3fffff Y N System flash (cached)
|
0x9fc00000 - 0x9fffffff Y N System flash (mirrored)
|
0x9fc00000 - 0x9fffffff Y N System flash (mirrored)
|
0xa8000000 - 0xb7ffffff N N PCI Memory Space
|
0xa8000000 - 0xb7ffffff N N PCI Memory Space
|
0xb4000000 - 0xb40fffff N N Galileo System Controller
|
0xb4000000 - 0xb40fffff N N Galileo System Controller
|
0xb8000000 - 0xb80fffff N N Southbridge / ISA
|
0xb8000000 - 0xb80fffff N N Southbridge / ISA
|
0xb8100000 - 0xbbdfffff N N PCI I/O Space
|
0xb8100000 - 0xbbdfffff N N PCI I/O Space
|
0xbe000000 - 0xbe3fffff N N System flash (noncached)
|
0xbe000000 - 0xbe3fffff N N System flash (noncached)
|
0xbf000000 - 0xbfffffff N N Board logic FPGA
|
0xbf000000 - 0xbfffffff N N Board logic FPGA
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=malta_mips32_4kc
|
export TARGET=malta_mips32_4kc
|
export ARCH_DIR=mips
|
export ARCH_DIR=mips
|
export PLATFORM_DIR=malta
|
export PLATFORM_DIR=malta
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
MIPS/RM7000 PMC-Sierra Ocelot
|
MIPS/RM7000 PMC-Sierra Ocelot
|
|
|
Overview
|
Overview
|
PMC-Sierra MIPS RM7000 Ocelotinstalling
|
PMC-Sierra MIPS RM7000 Ocelotinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
PMC-Sierra MIPS RM7000 OcelotRedBoot
|
PMC-Sierra MIPS RM7000 OcelotRedBoot
|
uses the front facing serial port. The default serial port settings are 38400,8,N,1.
|
uses the front facing serial port. The default serial port settings are 38400,8,N,1.
|
RedBoot also supports ethernet. Management of onboard flash is also supported.
|
RedBoot also supports ethernet. Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Additional commands
|
Additional commands
|
The exec command which allows the
|
The exec command which allows the
|
loading and execution of Linux kernels, is supported for this architecture
|
loading and execution of Linux kernels, is supported for this architecture
|
(see ). The
|
(see ). The
|
exec parameters used for MIPS boards are:
|
exec parameters used for MIPS boards are:
|
|
|
-b <addr>
|
-b <addr>
|
Location to store command line and environment passed to kernel
|
Location to store command line and environment passed to kernel
|
|
|
-w <time>
|
-w <time>
|
Wait time in seconds before starting kernel
|
Wait time in seconds before starting kernel
|
|
|
-c "params"
|
-c "params"
|
Parameters passed to kernel
|
Parameters passed to kernel
|
<addr>
|
<addr>
|
Kernel entry point, defaulting to the entry point of the last image
|
Kernel entry point, defaulting to the entry point of the last image
|
loaded
|
loaded
|
|
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
Linux kernels on MIPS platforms expect the entry point to be called with arguments
|
in the registers equivalent to a C call with prototype:
|
in the registers equivalent to a C call with prototype:
|
void Linux(int argc, char **argv, char **envp);
|
void Linux(int argc, char **argv, char **envp);
|
RedBoot will place the appropriate data at the offset specified by the
|
RedBoot will place the appropriate data at the offset specified by the
|
-b parameter, or by default at address 0x80080000, and will set the
|
-b parameter, or by default at address 0x80080000, and will set the
|
arguments accordingly when calling into the kernel.
|
arguments accordingly when calling into the kernel.
|
|
|
The default entry point, if no image with explicit entry point has been loaded and
|
The default entry point, if no image with explicit entry point has been loaded and
|
none is specified, is 0x80000750.
|
none is specified, is 0x80000750.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the Ocelot board.
|
RedBoot sets up the following memory map on the Ocelot board.
|
Note that these addresses are accessed through kseg0/1 and thus translate
|
Note that these addresses are accessed through kseg0/1 and thus translate
|
to the actual address range 0x80000000-0xbfffffff, depending on the need for
|
to the actual address range 0x80000000-0xbfffffff, depending on the need for
|
caching/non-caching access to the bus.NOTE
|
caching/non-caching access to the bus.NOTE
|
The virtual memory maps in this section use a C and B column to indicate
|
The virtual memory maps in this section use a C and B column to indicate
|
whether or not the region is cached (C) or buffered (B).
|
whether or not the region is cached (C) or buffered (B).
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x00000000 - 0x0fffffff SDRAM
|
0x00000000 - 0x0fffffff SDRAM
|
0x10000000 - 0x10ffffff PCI I/O space
|
0x10000000 - 0x10ffffff PCI I/O space
|
0x12000000 - 0x13ffffff PCI Memory space
|
0x12000000 - 0x13ffffff PCI Memory space
|
0x14000000 - 0x1400ffff Galileo system controller
|
0x14000000 - 0x1400ffff Galileo system controller
|
0x1c000000 - 0x1c0000ff PLD (board logic)
|
0x1c000000 - 0x1c0000ff PLD (board logic)
|
0x1fc00000 - 0x1fc7ffff flash
|
0x1fc00000 - 0x1fc7ffff flash
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=ocelot
|
export TARGET=ocelot
|
export ARCH_DIR=mips
|
export ARCH_DIR=mips
|
export PLATFORM_DIR=rm7000/ocelot
|
export PLATFORM_DIR=rm7000/ocelot
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
MIPS/VR4375 NEC DDB-VRC4375
|
MIPS/VR4375 NEC DDB-VRC4375
|
|
|
Overview
|
Overview
|
|
|
NEC DDB-VRC4375
|
NEC DDB-VRC4375
|
installing and testing
|
installing and testing
|
installing and testingNEC DDB-VRC4375
|
installing and testingNEC DDB-VRC4375
|
RedBoot supports only serial port 1, which is connected to the upper
|
RedBoot supports only serial port 1, which is connected to the upper
|
of the stacked serial connectors on the board. The default serial
|
of the stacked serial connectors on the board. The default serial
|
port settings are 38400,8,N,1. FLASH management is also supported.
|
port settings are 38400,8,N,1. FLASH management is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
|
|
A device programmer should be used to program a socketed FLASH part
|
A device programmer should be used to program a socketed FLASH part
|
(AMD 29F040). The board as delivered is configured for a 512K
|
(AMD 29F040). The board as delivered is configured for a 512K
|
EPROM. To install a FLASH ROM, Jumpers J30, J31 and J36 need to be
|
EPROM. To install a FLASH ROM, Jumpers J30, J31 and J36 need to be
|
changed as described in the board's User Manual.
|
changed as described in the board's User Manual.
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
|
|
None.
|
None.
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
|
|
RedBoot sets up the memory map primarily as described in the board's
|
RedBoot sets up the memory map primarily as described in the board's
|
User Manual. There are some minor differences, noted in the following
|
User Manual. There are some minor differences, noted in the following
|
table:
|
table:
|
|
|
Physical Virtual Resource
|
Physical Virtual Resource
|
Addresses Addresses
|
Addresses Addresses
|
00000000-01FFFFFF 80000000-81FFFFFF Base SDRAM (cached)
|
00000000-01FFFFFF 80000000-81FFFFFF Base SDRAM (cached)
|
00000000-01FFFFFF A0000000-A1FFFFFF Base SDRAM (uncached)
|
00000000-01FFFFFF A0000000-A1FFFFFF Base SDRAM (uncached)
|
0C000000-0C0BFFFF AC000000-AC0B0000 PCI IO space
|
0C000000-0C0BFFFF AC000000-AC0B0000 PCI IO space
|
0F000000-0F0001FF AF000000-AF0001FF VRC4375 Registers
|
0F000000-0F0001FF AF000000-AF0001FF VRC4375 Registers
|
1C000000-1C0FFFFF BC000000-BC0FFFFF VRC4372 Registers
|
1C000000-1C0FFFFF BC000000-BC0FFFFF VRC4372 Registers
|
1C100000-1DFFFFFF BC100000-BDFFFFFF PCI Memory space
|
1C100000-1DFFFFFF BC100000-BDFFFFFF PCI Memory space
|
1FC00000-1FC7FFFF BFC00000-BFC7FFFF FLASH ROM
|
1FC00000-1FC7FFFF BFC00000-BFC7FFFF FLASH ROM
|
80000000-8000000D C0000000-C000000D RTC
|
80000000-8000000D C0000000-C000000D RTC
|
8000000E-80007FFF C000000E-C0007FFF NVRAM
|
8000000E-80007FFF C000000E-C0007FFF NVRAM
|
81000000-81FFFFFF C1000000-C1FFFFFF Z85C30 DUART
|
81000000-81FFFFFF C1000000-C1FFFFFF Z85C30 DUART
|
82000000-82FFFFFF C2000000-C2FFFFFF Z8536 Timer
|
82000000-82FFFFFF C2000000-C2FFFFFF Z8536 Timer
|
83000000-83FFFFFF C3000000-C3FFFFFF 8255 Parallel port
|
83000000-83FFFFFF C3000000-C3FFFFFF 8255 Parallel port
|
87000000-87FFFFFF C7000000-C7FFFFFF Seven segment display
|
87000000-87FFFFFF C7000000-C7FFFFFF Seven segment display
|
|
|
|
|
NOTE
|
NOTE
|
|
|
By default the VRC4375 SIMM control registers are not programmed
|
By default the VRC4375 SIMM control registers are not programmed
|
since the values used must depend on the SIMMs installed. If SIMMs
|
since the values used must depend on the SIMMs installed. If SIMMs
|
are to be used, correct values must be placed in these registers
|
are to be used, correct values must be placed in these registers
|
before accessing the SIMM address range.
|
before accessing the SIMM address range.
|
|
|
|
|
|
|
NOTE
|
NOTE
|
|
|
The allocation of address ranges to devices in the PCI IO and
|
The allocation of address ranges to devices in the PCI IO and
|
memory spaces is handled by the eCos PCI support library. They do
|
memory spaces is handled by the eCos PCI support library. They do
|
not correspond to those described in the board User Manual.
|
not correspond to those described in the board User Manual.
|
|
|
|
|
|
|
NOTE
|
NOTE
|
|
|
The MMU has been set up to relocate the VRC4372 supported devices
|
The MMU has been set up to relocate the VRC4372 supported devices
|
mapped at physical addresses 0x8xxxxxxx to virtual addresses
|
mapped at physical addresses 0x8xxxxxxx to virtual addresses
|
0xCxxxxxxx.
|
0xCxxxxxxx.
|
|
|
|
|
|
|
|
|
|
|
|
|
Ethernet Driver
|
Ethernet Driver
|
|
|
|
|
The ethernet driver is in two parts:
|
The ethernet driver is in two parts:
|
|
|
|
|
|
|
A generic ether driver for the Intel i21143 device is located in
|
A generic ether driver for the Intel i21143 device is located in
|
devs/eth/intel/i21143. Its package name is CYGPKG_DEVS_ETH_INTEL_I21143.
|
devs/eth/intel/i21143. Its package name is CYGPKG_DEVS_ETH_INTEL_I21143.
|
|
|
|
|
|
|
The platform-specific ether driver is
|
The platform-specific ether driver is
|
class="directory">devs/eth/mips/vrc4375. Its package is
|
class="directory">devs/eth/mips/vrc4375. Its package is
|
CYGPKG_DEVS_ETH_MIPS_VRC4375. This
|
CYGPKG_DEVS_ETH_MIPS_VRC4375. This
|
tells the generic driver the address in IO memory of the chip, for
|
tells the generic driver the address in IO memory of the chip, for
|
example, and other configuration details. The ESA (MAC address) is by
|
example, and other configuration details. The ESA (MAC address) is by
|
default collected from on-board serial EEPROM, unless configured
|
default collected from on-board serial EEPROM, unless configured
|
statically within this package.
|
statically within this package.
|
|
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=vrc4373
|
export TARGET=vrc4373
|
export ARCH_DIR=mips
|
export ARCH_DIR=mips
|
export PLATFORM_DIR=vrc4373
|
export PLATFORM_DIR=vrc4373
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerPC/MPC860T Analogue & Micro PowerPC 860T
|
PowerPC/MPC860T Analogue & Micro PowerPC 860T
|
|
|
Overview
|
Overview
|
Analogue & Micro PowerPC 860Tinstalling
|
Analogue & Micro PowerPC 860Tinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Analogue & Micro PowerPC 860TRedBoot uses
|
Analogue & Micro PowerPC 860TRedBoot uses
|
the SMC1 serial port. The default serial port settings are 38400,8,N,1.
|
the SMC1 serial port. The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using the RJ-45 connector. Management of
|
Ethernet is also supported using the RJ-45 connector. Management of
|
onboard flash is also supported.
|
onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROMRAM
|
ROMRAM
|
[ROMRAM]
|
[ROMRAM]
|
RedBoot running from RAM, but contained in the
|
RedBoot running from RAM, but contained in the
|
board's flash boot sector.
|
board's flash boot sector.
|
redboot_ROMRAM.ecm
|
redboot_ROMRAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
RedBoot must be installed at the A & M factory.
|
RedBoot must be installed at the A & M factory.
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
Memory Maps RedBoot sets up the following memory map on the MBX board.
|
Memory Maps RedBoot sets up the following memory map on the MBX board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x00000000 - 0x007fffff DRAM
|
0x00000000 - 0x007fffff DRAM
|
0xfe000000 - 0xfe0fffff flash (AMD29LV8008B)
|
0xfe000000 - 0xfe0fffff flash (AMD29LV8008B)
|
0xff000000 - 0xff0fffff MPC registers
|
0xff000000 - 0xff0fffff MPC registers
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=viper
|
export TARGET=viper
|
export ARCH_DIR=powerpc
|
export ARCH_DIR=powerpc
|
export PLATFORM_DIR=viper
|
export PLATFORM_DIR=viper
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
PowerPC/MPC8XX Motorola MBX
|
PowerPC/MPC8XX Motorola MBX
|
|
|
Overview
|
Overview
|
Motorola PowerPC MBXinstalling
|
Motorola PowerPC MBXinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Motorola PowerPC MBXRedBoot uses
|
Motorola PowerPC MBXRedBoot uses
|
the SMC1/COM1 serial port. The default serial port settings are 38400,8,N,1.
|
the SMC1/COM1 serial port. The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using the 10-base T connector.
|
Ethernet is also supported using the 10-base T connector.
|
Management of onboard flash is also supported.
|
Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
Device programmer is used to program the XU1 socketed flash part (AM29F040B)
|
Device programmer is used to program the XU1 socketed flash part (AM29F040B)
|
with the ROM mode image of RedBoot. Use the on-board EPPC-Bug monitor to update
|
with the ROM mode image of RedBoot. Use the on-board EPPC-Bug monitor to update
|
RedBoot.
|
RedBoot.
|
This assumes that you have EPPC-Bug in the on-board flash. This can
|
This assumes that you have EPPC-Bug in the on-board flash. This can
|
be determined by setting up the board according to the following instructions
|
be determined by setting up the board according to the following instructions
|
and powering up the board.
|
and powering up the board.
|
The EPPC-Bug prompt should appear on the SMC1 connector at 9600 baud,
|
The EPPC-Bug prompt should appear on the SMC1 connector at 9600 baud,
|
8N1.
|
8N1.
|
|
|
Set jumper 3 to 2-3 [allow XU1 flash to be programmed]
|
Set jumper 3 to 2-3 [allow XU1 flash to be programmed]
|
|
|
Set jumper 4 to 2-3 [boot EPPC-Bug]
|
Set jumper 4 to 2-3 [boot EPPC-Bug]
|
|
|
|
|
If it is available, program the flash by following these steps:
|
If it is available, program the flash by following these steps:
|
|
|
Prepare EPPC-Bug for download: EPPC-Bug>lo 0
|
Prepare EPPC-Bug for download: EPPC-Bug>lo 0
|
At this point the monitor is ready for input. It will not
|
At this point the monitor is ready for input. It will not
|
return the prompt until the file has been downloaded.
|
return the prompt until the file has been downloaded.
|
|
|
Use the terminal emulator's ASCII download feature (or a simple
|
Use the terminal emulator's ASCII download feature (or a simple
|
clipboard copy/paste operation) to download the
|
clipboard copy/paste operation) to download the
|
redboot.ppcbug file.
|
redboot.ppcbug file.
|
Note that on Linux, Minicom's ASCII
|
Note that on Linux, Minicom's ASCII
|
download feature seems to be broken. A workaround is to load the file
|
download feature seems to be broken. A workaround is to load the file
|
into emacs (or another editor) and copy the
|
into emacs (or another editor) and copy the
|
full contents to the clipboard. Then press the mouse paste-button (usually
|
full contents to the clipboard. Then press the mouse paste-button (usually
|
the middle one) over the Minicom window.
|
the middle one) over the Minicom window.
|
|
|
Program the flash with the downloaded data:
|
Program the flash with the downloaded data:
|
EPPC-Bug>pflash 40000 60000 fc000000
|
EPPC-Bug>pflash 40000 60000 fc000000
|
|
|
Switch off the power, and change jumper 4 to 1-2. Turn on
|
Switch off the power, and change jumper 4 to 1-2. Turn on
|
the power again. The board should now boot using the newly programmed RedBoot.
|
the power again. The board should now boot using the newly programmed RedBoot.
|
|
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
None.
|
None.
|
|
|
|
|
Memory Maps
|
Memory Maps
|
Memory Maps RedBoot sets up the following memory map on the MBX board.
|
Memory Maps RedBoot sets up the following memory map on the MBX board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x00000000 - 0x003fffff DRAM
|
0x00000000 - 0x003fffff DRAM
|
0xfa100000 - 0xfa100003 LEDs
|
0xfa100000 - 0xfa100003 LEDs
|
0xfe000000 - 0xfe07ffff flash (AMD29F040B)
|
0xfe000000 - 0xfe07ffff flash (AMD29F040B)
|
0xff000000 - 0xff0fffff MPC registers
|
0xff000000 - 0xff0fffff MPC registers
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=mbx
|
export TARGET=mbx
|
export ARCH_DIR=powerpc
|
export ARCH_DIR=powerpc
|
export PLATFORM_DIR=mbx
|
export PLATFORM_DIR=mbx
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SuperH/SH3(SH7708) Hitachi EDK7708
|
SuperH/SH3(SH7708) Hitachi EDK7708
|
|
|
Overview
|
Overview
|
Hitachi SH EDK7708installing
|
Hitachi SH EDK7708installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Hitachi SH EDK7708RedBoot uses
|
Hitachi SH EDK7708RedBoot uses
|
the serial port. The default serial port settings are 38400,8,N,1.
|
the serial port. The default serial port settings are 38400,8,N,1.
|
Management of onboard flash is also supported.
|
Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
Program the ROM RedBoot image into flash using an eprom programmer.
|
Program the ROM RedBoot image into flash using an eprom programmer.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the EDK7708 board.
|
RedBoot sets up the following memory map on the EDK7708 board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x8001ffff Flash (AT29LV1024)
|
0x80000000 - 0x8001ffff Flash (AT29LV1024)
|
0x88000000 - 0x881fffff DRAM
|
0x88000000 - 0x881fffff DRAM
|
0xa4000000 - 0xa40000ff LED ON
|
0xa4000000 - 0xa40000ff LED ON
|
0xb8000000 - 0xb80000ff LED ON
|
0xb8000000 - 0xb80000ff LED ON
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=edk7708
|
export TARGET=edk7708
|
export ARCH_DIR=sh
|
export ARCH_DIR=sh
|
export PLATFORM_DIR=edk7708
|
export PLATFORM_DIR=edk7708
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
|
|
SuperH/SH3(SH7709) Hitachi Solution Engine 7709
|
SuperH/SH3(SH7709) Hitachi Solution Engine 7709
|
|
|
Overview
|
Overview
|
Hitachi SH SE7709installing
|
Hitachi SH SE7709installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Hitachi SH SE7709This
|
Hitachi SH SE7709This
|
description covers the MS7709SE01 variant. See
|
description covers the MS7709SE01 variant. See
|
for instructions for the MS7729SE01 and MS7709SSE0101 variants.
|
for instructions for the MS7729SE01 and MS7709SSE0101 variants.
|
|
|
RedBoot uses
|
RedBoot uses
|
the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
|
the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using the 10-base T connector.
|
Ethernet is also supported using the 10-base T connector.
|
Management of onboard flash is also supported.
|
Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
which allows for initial programming of RedBoot:
|
which allows for initial programming of RedBoot:
|
|
|
|
|
Set switch SW4-1 to ON [boot from EPROM]
|
Set switch SW4-1 to ON [boot from EPROM]
|
|
|
Connect a serial cable to CN1 (SCI) and power up the board.
|
Connect a serial cable to CN1 (SCI) and power up the board.
|
|
|
After the boot monitor banner, invoke the flash
|
After the boot monitor banner, invoke the flash
|
download/program command:Ready >fl
|
download/program command:Ready >fl
|
|
|
The monitor should now ask for input:
|
The monitor should now ask for input:
|
Flash ROM data copy to RAM
|
Flash ROM data copy to RAM
|
Please Send A S-format RecordAt this point copy the
|
Please Send A S-format RecordAt this point copy the
|
RedBoot ROM SREC file to the serial port:
|
RedBoot ROM SREC file to the serial port:
|
$ cat redboot_SE7709RP_ROM.eprom.srec > /dev/ttyS0
|
$ cat redboot_SE7709RP_ROM.eprom.srec > /dev/ttyS0
|
Eventually you
|
Eventually you
|
should see something likeStart Addrs = A1000000
|
should see something likeStart Addrs = A1000000
|
End Addrs = A1xxxxxx
|
End Addrs = A1xxxxxx
|
Transfer complete from the monitor.
|
Transfer complete from the monitor.
|
|
|
Set switch SW4-1 to OFF [boot from flash] and reboot the board. You
|
Set switch SW4-1 to OFF [boot from flash] and reboot the board. You
|
should now see the RedBoot banner.
|
should now see the RedBoot banner.
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels
|
and execution of Linux kernels
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the SE77x9 are:
|
exec parameters used for the SE77x9 are:
|
|
|
|
|
-b <addr>
|
-b <addr>
|
Parameter block address. This is normally the first
|
Parameter block address. This is normally the first
|
page of the kernel image and defaults to 0x8c101000
|
page of the kernel image and defaults to 0x8c101000
|
|
|
-i <addr>
|
-i <addr>
|
Start address of initrd
|
Start address of initrd
|
image
|
image
|
|
|
-j <size>
|
-j <size>
|
Size of initrd image
|
Size of initrd image
|
|
|
-c "args"
|
-c "args"
|
Kernel arguments string
|
Kernel arguments string
|
|
|
|
|
-m <flags>
|
-m <flags>
|
Mount rdonly flags. If set to a non-zero value the
|
Mount rdonly flags. If set to a non-zero value the
|
root partition will be mounted read-only.
|
root partition will be mounted read-only.
|
|
|
|
|
-f <flags>
|
-f <flags>
|
RAM disk flags. Should normally be 0x4000
|
RAM disk flags. Should normally be 0x4000
|
|
|
-r <device number>
|
-r <device number>
|
Root device specification. /dev/ram is 0x0101
|
Root device specification. /dev/ram is 0x0101
|
|
|
-l <type>
|
-l <type>
|
Loader type
|
Loader type
|
|
|
|
|
|
|
Finally the kernel entry address can be specified as an optional
|
Finally the kernel entry address can be specified as an optional
|
argument. The default is 0x8c102000
|
argument. The default is 0x8c102000
|
|
|
|
|
For the the SE77x9, Linux by default expects to be loaded at
|
For the the SE77x9, Linux by default expects to be loaded at
|
0x8c001000 which conflicts with the data space used by RedBoot.
|
0x8c001000 which conflicts with the data space used by RedBoot.
|
To work around this, either change the CONFIG_MEMORY_START kernel
|
To work around this, either change the CONFIG_MEMORY_START kernel
|
option to a higher address, or use the compressed kernel image and load
|
option to a higher address, or use the compressed kernel image and load
|
it at a higher address. For example, setting CONFIG_MEMORY_START to
|
it at a higher address. For example, setting CONFIG_MEMORY_START to
|
0x8c100000, the kernel expects to be loaded at address 0x8c101000 with
|
0x8c100000, the kernel expects to be loaded at address 0x8c101000 with
|
the entry point at 0x8c102000.
|
the entry point at 0x8c102000.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the SE77x9 board.
|
RedBoot sets up the following memory map on the SE77x9 board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x8c000000 - 0x8dffffff DRAM
|
0x8c000000 - 0x8dffffff DRAM
|
0xb0000000 - 0xb03fffff Ethernet (DP83902A)
|
0xb0000000 - 0xb03fffff Ethernet (DP83902A)
|
0xb0800000 - 0xb08fffff 16C552A
|
0xb0800000 - 0xb08fffff 16C552A
|
0xb1000000 - 0xb100ffff Switches
|
0xb1000000 - 0xb100ffff Switches
|
0xb1800000 - 0xb18fffff LEDs
|
0xb1800000 - 0xb18fffff LEDs
|
0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
|
0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
|
|
|
|
|
|
|
Ethernet Driver
|
Ethernet Driver
|
The ethernet driver uses a hardwired ESA which can, at present,
|
The ethernet driver uses a hardwired ESA which can, at present,
|
only be changed in CDL.
|
only be changed in CDL.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=se77x9
|
export TARGET=se77x9
|
export ARCH_DIR=sh
|
export ARCH_DIR=sh
|
export PLATFORM_DIR=se77x9
|
export PLATFORM_DIR=se77x9
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
SuperH/SH3(SH7729) Hitachi HS7729PCI
|
SuperH/SH3(SH7729) Hitachi HS7729PCI
|
|
|
Overview
|
Overview
|
Hitachi SH HS7729PCIinstalling
|
Hitachi SH HS7729PCIinstalling
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Hitachi SH HS7729PCIRedBoot uses
|
Hitachi SH HS7729PCIRedBoot uses
|
the COM1 and COM2 serial ports (and the debug port on the
|
the COM1 and COM2 serial ports (and the debug port on the
|
motherboard).
|
motherboard).
|
The default serial port settings are 38400,8,N,1.
|
The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using a D-Link DFE-530TX PCI plugin
|
Ethernet is also supported using a D-Link DFE-530TX PCI plugin
|
card. Management of onboard flash is also supported.
|
card. Management of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
A ROM mode RedBoot image must be programmed
|
A ROM mode RedBoot image must be programmed
|
into the two EPROMs. Two files with a split version of the ROM mode
|
into the two EPROMs. Two files with a split version of the ROM mode
|
image is
|
image is
|
provided: it is also possible to recreate these from the
|
provided: it is also possible to recreate these from the
|
redboot.bin
|
redboot.bin
|
file, but requires the split_word.c program in
|
file, but requires the split_word.c program in
|
|
|
class="directory">hal/sh/hs7729pci/VERSION/misc
|
class="directory">hal/sh/hs7729pci/VERSION/misc
|
to be built and executed with the redboot.bin
|
to be built and executed with the redboot.bin
|
filename as sole argument.
|
filename as sole argument.
|
|
|
After doing this it is advised that another ROM mode image of
|
After doing this it is advised that another ROM mode image of
|
RedBoot is programmed into the on-board flash, and that copy be used
|
RedBoot is programmed into the on-board flash, and that copy be used
|
for booting the board. This allows for software programmed updates of
|
for booting the board. This allows for software programmed updates of
|
RedBoot instead of having to reprogram the EPROMs.
|
RedBoot instead of having to reprogram the EPROMs.
|
|
|
|
|
Program the EPROMs with RedBoot. The .lo image should
|
Program the EPROMs with RedBoot. The .lo image should
|
go in socket M1 and the .hi image in socket M2.
|
go in socket M1 and the .hi image in socket M2.
|
|
|
|
|
Set switch SW1-6 to ON [boot from EPROM]
|
Set switch SW1-6 to ON [boot from EPROM]
|
|
|
Follow the instructions under Flash management for
|
Follow the instructions under Flash management for
|
updating the flash copy of RedBoot, but force the flash destination
|
updating the flash copy of RedBoot, but force the flash destination
|
address with
|
address with
|
-f 0x80400000 due to setting of
|
-f 0x80400000 due to setting of
|
the SW1-6 switch.
|
the SW1-6 switch.
|
|
|
Set switch SW1-6 to OFF [boot from flash] and reboot the board. You
|
Set switch SW1-6 to OFF [boot from flash] and reboot the board. You
|
should now see the RedBoot banner. At this time you may want to issue
|
should now see the RedBoot banner. At this time you may want to issue
|
the command fis init to initialize
|
the command fis init to initialize
|
the flash table with the correct addresses.
|
the flash table with the correct addresses.
|
|
|
|
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels
|
and execution of Linux kernels
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the HS7729PCI are:
|
exec parameters used for the HS7729PCI are:
|
|
|
|
|
-b <addr>
|
-b <addr>
|
Parameter block address. This is normally the first
|
Parameter block address. This is normally the first
|
page of the kernel image and defaults to 0x8c101000
|
page of the kernel image and defaults to 0x8c101000
|
|
|
-i <addr>
|
-i <addr>
|
Start address of initrd
|
Start address of initrd
|
image
|
image
|
|
|
-j <size>
|
-j <size>
|
Size of initrd image
|
Size of initrd image
|
|
|
-c "args"
|
-c "args"
|
Kernel arguments string
|
Kernel arguments string
|
|
|
|
|
-m <flags>
|
-m <flags>
|
Mount rdonly flags. If set to a non-zero value the
|
Mount rdonly flags. If set to a non-zero value the
|
root partition will be mounted read-only.
|
root partition will be mounted read-only.
|
|
|
|
|
-f <flags>
|
-f <flags>
|
RAM disk flags. Should normally be 0x4000
|
RAM disk flags. Should normally be 0x4000
|
|
|
-r <device number>
|
-r <device number>
|
Root device specification. /dev/ram is 0x0101
|
Root device specification. /dev/ram is 0x0101
|
|
|
-l <type>
|
-l <type>
|
Loader type
|
Loader type
|
|
|
|
|
|
|
Finally the kernel entry address can be specified as an optional
|
Finally the kernel entry address can be specified as an optional
|
argument. The default is 0x8c102000
|
argument. The default is 0x8c102000
|
|
|
|
|
On the HS7729PCI, Linux expects to be loaded at address 0x8c101000 with
|
On the HS7729PCI, Linux expects to be loaded at address 0x8c101000 with
|
the entry point at 0x8c102000. This is configurable in the kernel
|
the entry point at 0x8c102000. This is configurable in the kernel
|
using the CONFIG_MEMORY_START option.
|
using the CONFIG_MEMORY_START option.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the HS7729PCI board.
|
RedBoot sets up the following memory map on the HS7729PCI board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x80400000 - 0x807fffff EPROM (M27C800)
|
0x80400000 - 0x807fffff EPROM (M27C800)
|
0x82000000 - 0x82ffffff SRAM
|
0x82000000 - 0x82ffffff SRAM
|
0x89000000 - 0x89ffffff SRAM
|
0x89000000 - 0x89ffffff SRAM
|
0x8c000000 - 0x8fffffff SDRAM
|
0x8c000000 - 0x8fffffff SDRAM
|
0xa8000000 - 0xa800ffff SuperIO (FDC37C935A)
|
0xa8000000 - 0xa800ffff SuperIO (FDC37C935A)
|
0xa8400000 - 0xa87fffff USB function (ML60851C)
|
0xa8400000 - 0xa87fffff USB function (ML60851C)
|
0xa8800000 - 0xa8bfffff USB host (SL11HT)
|
0xa8800000 - 0xa8bfffff USB host (SL11HT)
|
0xa8c00000 - 0xa8c3ffff Switches
|
0xa8c00000 - 0xa8c3ffff Switches
|
0xa8c40000 - 0xa8c7ffff LEDs
|
0xa8c40000 - 0xa8c7ffff LEDs
|
0xa8c80000 - 0xa8cfffff Interrupt controller
|
0xa8c80000 - 0xa8cfffff Interrupt controller
|
0xb0000000 - 0xb3ffffff PCI (SD0001)
|
0xb0000000 - 0xb3ffffff PCI (SD0001)
|
0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
|
0xb8000000 - 0xbbffffff PCMCIA (MaruBun)
|
|
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=hs7729pci
|
export TARGET=hs7729pci
|
export ARCH_DIR=sh
|
export ARCH_DIR=sh
|
export PLATFORM_DIR=hs7729pci
|
export PLATFORM_DIR=hs7729pci
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
SuperH/SH3(SH77X9) Hitachi Solution Engine 77X9
|
SuperH/SH3(SH77X9) Hitachi Solution Engine 77X9
|
|
|
Overview
|
Overview
|
Hitachi SH SE77X9installing
|
Hitachi SH SE77X9installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Hitachi SH SE77X9This
|
Hitachi SH SE77X9This
|
description covers the MS7729SE01 and MS7709SSE0101 variants. See
|
description covers the MS7729SE01 and MS7709SSE0101 variants. See
|
for instructions for the MS7709SE01 variant.
|
for instructions for the MS7709SE01 variant.
|
|
|
RedBoot uses
|
RedBoot uses
|
the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
|
the COM1 and COM2 serial ports. The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using the 10-base T connector. Management
|
Ethernet is also supported using the 10-base T connector. Management
|
of onboard flash is also supported.
|
of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
which allows for initial programming of RedBoot:
|
which allows for initial programming of RedBoot:
|
|
|
|
|
Set switches SW4-3 and SW4-4 to ON [boot from EPROM]
|
Set switches SW4-3 and SW4-4 to ON [boot from EPROM]
|
|
|
Connect a serial cable to COM2 and power up the board.
|
Connect a serial cable to COM2 and power up the board.
|
|
|
After the boot monitor banner, invoke the flash
|
After the boot monitor banner, invoke the flash
|
download/program command:Ready >fl
|
download/program command:Ready >fl
|
|
|
The monitor should now ask for input:
|
The monitor should now ask for input:
|
Flash ROM data copy to RAM
|
Flash ROM data copy to RAM
|
Please Send A S-format RecordAt this point copy the
|
Please Send A S-format RecordAt this point copy the
|
RedBoot ROM SREC file to the serial port:
|
RedBoot ROM SREC file to the serial port:
|
$ cat redboot_ROM.eprom.srec > /dev/ttyS0
|
$ cat redboot_ROM.eprom.srec > /dev/ttyS0
|
Eventually you
|
Eventually you
|
should see something likeStart Addrs = A1000000
|
should see something likeStart Addrs = A1000000
|
End Addrs = A1xxxxxx
|
End Addrs = A1xxxxxx
|
Transfer complete from the monitor.
|
Transfer complete from the monitor.
|
|
|
Set switch SW4-3 to OFF [boot from flash] and reboot the board. You
|
Set switch SW4-3 to OFF [boot from flash] and reboot the board. You
|
should now see the RedBoot banner.
|
should now see the RedBoot banner.
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels
|
and execution of Linux kernels
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the SE77x9 are:
|
exec parameters used for the SE77x9 are:
|
|
|
|
|
-b <addr>
|
-b <addr>
|
Parameter block address. This is normally the first
|
Parameter block address. This is normally the first
|
page of the kernel image and defaults to 0x8c101000
|
page of the kernel image and defaults to 0x8c101000
|
|
|
-i <addr>
|
-i <addr>
|
Start address of initrd
|
Start address of initrd
|
image
|
image
|
|
|
-j <size>
|
-j <size>
|
Size of initrd image
|
Size of initrd image
|
|
|
-c "args"
|
-c "args"
|
Kernel arguments string
|
Kernel arguments string
|
|
|
|
|
-m <flags>
|
-m <flags>
|
Mount rdonly flags. If set to a non-zero value the
|
Mount rdonly flags. If set to a non-zero value the
|
root partition will be mounted read-only.
|
root partition will be mounted read-only.
|
|
|
|
|
-f <flags>
|
-f <flags>
|
RAM disk flags. Should normally be 0x4000
|
RAM disk flags. Should normally be 0x4000
|
|
|
-r <device number>
|
-r <device number>
|
Root device specification. /dev/ram is 0x0101
|
Root device specification. /dev/ram is 0x0101
|
|
|
-l <type>
|
-l <type>
|
Loader type
|
Loader type
|
|
|
|
|
|
|
Finally the kernel entry address can be specified as an optional
|
Finally the kernel entry address can be specified as an optional
|
argument. The default is 0x8c102000
|
argument. The default is 0x8c102000
|
|
|
|
|
On the SE77x9, Linux expects to be loaded at address 0x8c101000 with
|
On the SE77x9, Linux expects to be loaded at address 0x8c101000 with
|
the entry point at 0x8c102000. This is configurable in the kernel
|
the entry point at 0x8c102000. This is configurable in the kernel
|
using the CONFIG_MEMORY_START option.
|
using the CONFIG_MEMORY_START option.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the SE77x9 board.
|
RedBoot sets up the following memory map on the SE77x9 board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x8c000000 - 0x8dffffff SDRAM
|
0x8c000000 - 0x8dffffff SDRAM
|
0xb0000000 - 0xb03fffff Ethernet (DP83902A)
|
0xb0000000 - 0xb03fffff Ethernet (DP83902A)
|
0xb0400000 - 0xb07fffff SuperIO (FDC37C935A)
|
0xb0400000 - 0xb07fffff SuperIO (FDC37C935A)
|
0xb0800000 - 0xb0bfffff Switches
|
0xb0800000 - 0xb0bfffff Switches
|
0xb0c00000 - 0xbfffffff LEDs
|
0xb0c00000 - 0xbfffffff LEDs
|
0xb1800000 - 0xb1bfffff PCMCIA (MaruBun)
|
0xb1800000 - 0xb1bfffff PCMCIA (MaruBun)
|
|
|
|
|
|
|
Ethernet Driver
|
Ethernet Driver
|
The ethernet driver uses a hardwired ESA which can, at present,
|
The ethernet driver uses a hardwired ESA which can, at present,
|
only be changed in CDL.
|
only be changed in CDL.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=se77x9
|
export TARGET=se77x9
|
export ARCH_DIR=sh
|
export ARCH_DIR=sh
|
export PLATFORM_DIR=se77x9
|
export PLATFORM_DIR=se77x9
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
SuperH/SH4(SH7751) Hitachi Solution Engine 7751
|
SuperH/SH4(SH7751) Hitachi Solution Engine 7751
|
|
|
Overview
|
Overview
|
Hitachi SH SE7751installing
|
Hitachi SH SE7751installing
|
and testinginstalling and testing
|
and testinginstalling and testing
|
Hitachi SH SE7751RedBoot uses
|
Hitachi SH SE7751RedBoot uses
|
the COM1 serial port. The default serial port settings are 38400,8,N,1.
|
the COM1 serial port. The default serial port settings are 38400,8,N,1.
|
Ethernet is also supported using the 10-base T connector. Management
|
Ethernet is also supported using the 10-base T connector. Management
|
of onboard flash is also supported.
|
of onboard flash is also supported.
|
|
|
The following RedBoot configurations are supported:
|
The following RedBoot configurations are supported:
|
|
|
|
|
|
|
|
|
|
|
Configuration
|
Configuration
|
Mode
|
Mode
|
Description
|
Description
|
File
|
File
|
|
|
|
|
|
|
|
|
|
|
ROM
|
ROM
|
[ROM]
|
[ROM]
|
RedBoot running from the board's flash boot
|
RedBoot running from the board's flash boot
|
sector.
|
sector.
|
redboot_ROM.ecm
|
redboot_ROM.ecm
|
|
|
|
|
|
|
RAM
|
RAM
|
[RAM]
|
[RAM]
|
RedBoot running from RAM with RedBoot in the
|
RedBoot running from RAM with RedBoot in the
|
flash boot sector.
|
flash boot sector.
|
redboot_RAM.ecm
|
redboot_RAM.ecm
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Initial Installation Method
|
Initial Installation Method
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
The Solution Engine ships with the Hitachi boot monitor in EPROM
|
which allows for initial programming of RedBoot:
|
which allows for initial programming of RedBoot:
|
|
|
|
|
Set switches SW5-3 and SW5-4 to ON [boot from EPROM]
|
Set switches SW5-3 and SW5-4 to ON [boot from EPROM]
|
|
|
Connect a serial cable to COM1 and power up the board.
|
Connect a serial cable to COM1 and power up the board.
|
|
|
After the boot monitor banner, invoke the flash
|
After the boot monitor banner, invoke the flash
|
download/program command:Ready >fl
|
download/program command:Ready >fl
|
|
|
The monitor should now ask for input:
|
The monitor should now ask for input:
|
Flash ROM data copy to RAM
|
Flash ROM data copy to RAM
|
Please Send A S-format RecordAt this point copy the
|
Please Send A S-format RecordAt this point copy the
|
RedBoot ROM SREC file to the serial port:
|
RedBoot ROM SREC file to the serial port:
|
$ cat redboot_ROM.eprom.srec > /dev/ttyS0
|
$ cat redboot_ROM.eprom.srec > /dev/ttyS0
|
Eventually you
|
Eventually you
|
should see something likeStart Addrs = A1000000
|
should see something likeStart Addrs = A1000000
|
End Addrs = A1xxxxxx
|
End Addrs = A1xxxxxx
|
Transfer complete from the monitor.
|
Transfer complete from the monitor.
|
|
|
Set switch SW5-3 to OFF [boot from flash] and reboot the board. You
|
Set switch SW5-3 to OFF [boot from flash] and reboot the board. You
|
should now see the RedBoot banner.
|
should now see the RedBoot banner.
|
|
|
|
|
|
|
|
|
Special RedBoot Commands
|
Special RedBoot Commands
|
The exec command which allows the loading
|
The exec command which allows the loading
|
and execution of Linux kernels
|
and execution of Linux kernels
|
is supported for this board (see ). The
|
is supported for this board (see ). The
|
exec parameters used for the SE7751 are:
|
exec parameters used for the SE7751 are:
|
|
|
|
|
-b <addr>
|
-b <addr>
|
Parameter block address. This is normally the first
|
Parameter block address. This is normally the first
|
page of the kernel image and defaults to 0x8c101000
|
page of the kernel image and defaults to 0x8c101000
|
|
|
-i <addr>
|
-i <addr>
|
Start address of initrd
|
Start address of initrd
|
image
|
image
|
|
|
-j <size>
|
-j <size>
|
Size of initrd image
|
Size of initrd image
|
|
|
-c "args"
|
-c "args"
|
Kernel arguments string
|
Kernel arguments string
|
|
|
|
|
-m <flags>
|
-m <flags>
|
Mount rdonly flags. If set to a non-zero value the
|
Mount rdonly flags. If set to a non-zero value the
|
root partition will be mounted read-only.
|
root partition will be mounted read-only.
|
|
|
|
|
-f <flags>
|
-f <flags>
|
RAM disk flags. Should normally be 0x4000
|
RAM disk flags. Should normally be 0x4000
|
|
|
-r <device number>
|
-r <device number>
|
Root device specification. /dev/ram is 0x0101
|
Root device specification. /dev/ram is 0x0101
|
|
|
-l <type>
|
-l <type>
|
Loader type
|
Loader type
|
|
|
|
|
|
|
Finally the kernel entry address can be specified as an optional
|
Finally the kernel entry address can be specified as an optional
|
argument. The default is 0x8c102000
|
argument. The default is 0x8c102000
|
|
|
|
|
On the SE7751, Linux expects to be loaded at address 0x8c101000 with
|
On the SE7751, Linux expects to be loaded at address 0x8c101000 with
|
the entry point at 0x8c102000. This is configurable in the kernel
|
the entry point at 0x8c102000. This is configurable in the kernel
|
using the CONFIG_MEMORY_START option.
|
using the CONFIG_MEMORY_START option.
|
|
|
|
|
|
|
|
|
Memory Maps
|
Memory Maps
|
RedBoot sets up the following memory map on the SE7751 board.
|
RedBoot sets up the following memory map on the SE7751 board.
|
Physical Address Range Description
|
Physical Address Range Description
|
----------------------- -----------
|
----------------------- -----------
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x80000000 - 0x803fffff Flash (MBM29LV160)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x81000000 - 0x813fffff EPROM (M27C800)
|
0x8c000000 - 0x8fffffff SDRAM
|
0x8c000000 - 0x8fffffff SDRAM
|
0xb8000000 - 0xb8ffffff PCMCIA (MaruBun)
|
0xb8000000 - 0xb8ffffff PCMCIA (MaruBun)
|
0xb9000000 - 0xb9ffffff Switches
|
0xb9000000 - 0xb9ffffff Switches
|
0xba000000 - 0xbaffffff LEDs
|
0xba000000 - 0xbaffffff LEDs
|
0xbd000000 - 0xbdffffff PCI MEM space
|
0xbd000000 - 0xbdffffff PCI MEM space
|
0xbe200000 - 0xbe23ffff PCI Ctrl space
|
0xbe200000 - 0xbe23ffff PCI Ctrl space
|
0xbe240000 - 0xbe27ffff PCI IO space
|
0xbe240000 - 0xbe27ffff PCI IO space
|
|
|
|
|
|
|
Ethernet Driver
|
Ethernet Driver
|
The ethernet driver uses a hardwired ESA which can, at present,
|
The ethernet driver uses a hardwired ESA which can, at present,
|
only be changed in CDL.
|
only be changed in CDL.
|
|
|
|
|
Rebuilding RedBoot
|
Rebuilding RedBoot
|
|
|
These shell variables provide the platform-specific information
|
These shell variables provide the platform-specific information
|
needed for building RedBoot according to the procedure described in
|
needed for building RedBoot according to the procedure described in
|
:
|
:
|
|
|
export TARGET=se7751
|
export TARGET=se7751
|
export ARCH_DIR=sh
|
export ARCH_DIR=sh
|
export PLATFORM_DIR=se7751
|
export PLATFORM_DIR=se7751
|
|
|
|
|
|
|
The names of configuration files are listed above with the
|
The names of configuration files are listed above with the
|
description of the associated modes.
|
description of the associated modes.
|
|
|
|
|
|
|
|
|
|
|
