/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
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/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
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Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
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Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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|
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This file is part of GDB.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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|
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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|
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* PA 64-bit specific definitions. Override those which are in
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/* PA 64-bit specific definitions. Override those which are in
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tm-hppa.h */
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tm-hppa.h */
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|
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/* jimb: this must go. I'm just using it to disable code I haven't
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/* jimb: this must go. I'm just using it to disable code I haven't
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gotten working yet. */
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gotten working yet. */
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#define GDB_TARGET_IS_HPPA_20W
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#define GDB_TARGET_IS_HPPA_20W
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|
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#include "pa/tm-hppah.h"
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#include "pa/tm-hppah.h"
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|
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#define HPUX_1100 1
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#define HPUX_1100 1
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|
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/* The low two bits of the IA are the privilege level of the instruction. */
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/* The low two bits of the IA are the privilege level of the instruction. */
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#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
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#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
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/* Say how long (ordinary) registers are. This is used in
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/* Say how long (ordinary) registers are. This is used in
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push_word and a few other places, but REGISTER_RAW_SIZE is
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push_word and a few other places, but REGISTER_RAW_SIZE is
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the real way to know how big a register is. */
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the real way to know how big a register is. */
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|
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#undef REGISTER_SIZE
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#undef REGISTER_SIZE
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#define REGISTER_SIZE 8
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#define REGISTER_SIZE 8
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|
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/* Number of bytes of storage in the actual machine representation
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/* Number of bytes of storage in the actual machine representation
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for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
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for register N. On the PA-RISC 2.0, all regs are 8 bytes, including
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the FP registers (they're accessed as two 4 byte halves). */
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the FP registers (they're accessed as two 4 byte halves). */
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|
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#undef REGISTER_RAW_SIZE
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#undef REGISTER_RAW_SIZE
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#define REGISTER_RAW_SIZE(N) 8
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#define REGISTER_RAW_SIZE(N) 8
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|
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/* Largest value REGISTER_RAW_SIZE can have. */
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/* Largest value REGISTER_RAW_SIZE can have. */
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#undef MAX_REGISTER_RAW_SIZE
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#undef MAX_REGISTER_RAW_SIZE
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#define MAX_REGISTER_RAW_SIZE 8
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#define MAX_REGISTER_RAW_SIZE 8
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|
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/* Total amount of space needed to store our copies of the machine's
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'. */
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register state, the array `registers'. */
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#undef REGISTER_BYTES
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#undef REGISTER_BYTES
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#define REGISTER_BYTES (NUM_REGS * 8)
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#define REGISTER_BYTES (NUM_REGS * 8)
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|
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/* Index within `registers' of the first byte of the space for
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/* Index within `registers' of the first byte of the space for
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register N. */
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register N. */
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#undef REGISTER_BYTE
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#undef REGISTER_BYTE
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#define REGISTER_BYTE(N) ((N) * 8)
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#define REGISTER_BYTE(N) ((N) * 8)
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|
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#undef REGISTER_VIRTUAL_TYPE
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#undef REGISTER_VIRTUAL_TYPE
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#define REGISTER_VIRTUAL_TYPE(N) \
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#define REGISTER_VIRTUAL_TYPE(N) \
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((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
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((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
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/* Number of machine registers */
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/* Number of machine registers */
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#undef NUM_REGS
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#undef NUM_REGS
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#define NUM_REGS 96
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#define NUM_REGS 96
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|
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/* Initializer for an array of names of registers.
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/* Initializer for an array of names of registers.
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There should be NUM_REGS strings in this initializer.
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There should be NUM_REGS strings in this initializer.
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They are in rows of eight entries */
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They are in rows of eight entries */
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#undef REGISTER_NAMES
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#undef REGISTER_NAMES
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#define REGISTER_NAMES \
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#define REGISTER_NAMES \
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{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
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{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
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"r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
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"r24", "r25", "r26", "dp", "ret0", "ret1", "sp", "r31", \
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"sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
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"sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", "eiem", "iir", "isr", \
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"ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
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"ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", "sr3", \
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"sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
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"sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", \
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"cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
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"cr13", "cr24", "cr25", "cr26", "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
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"fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
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"fpsr", "fpe1", "fpe2", "fpe3", "fr4", "fr5", "fr6", "fr7", \
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"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
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"fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
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"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
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"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
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"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
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"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"}
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|
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#undef FP0_REGNUM
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#undef FP0_REGNUM
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#undef FP4_REGNUM
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#undef FP4_REGNUM
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#define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
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#define FP0_REGNUM 64 /* floating point reg. 0 (fspr)*/
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#define FP4_REGNUM 68
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#define FP4_REGNUM 68
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|
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/* Redefine some target bit sizes from the default. */
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/* Redefine some target bit sizes from the default. */
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|
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/* Number of bits in a long or unsigned long for the target machine. */
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/* Number of bits in a long or unsigned long for the target machine. */
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|
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#define TARGET_LONG_BIT 64
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#define TARGET_LONG_BIT 64
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|
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/* Number of bits in a long long or unsigned long long for the
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/* Number of bits in a long long or unsigned long long for the
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target machine. */
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target machine. */
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|
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#define TARGET_LONG_LONG_BIT 64
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#define TARGET_LONG_LONG_BIT 64
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|
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/* Number of bits in a pointer for the target machine */
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/* Number of bits in a pointer for the target machine */
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|
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#define TARGET_PTR_BIT 64
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#define TARGET_PTR_BIT 64
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|
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/* Argument Pointer Register */
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/* Argument Pointer Register */
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#define AP_REGNUM 29
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#define AP_REGNUM 29
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|
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#define DP_REGNUM 27
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#define DP_REGNUM 27
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|
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#define FP5_REGNUM 70
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#define FP5_REGNUM 70
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|
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#define SR5_REGNUM 48
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#define SR5_REGNUM 48
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|
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#undef FRAME_ARGS_ADDRESS
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#undef FRAME_ARGS_ADDRESS
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#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
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#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
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|
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/* We access locals from SP. This may not work for frames which call
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/* We access locals from SP. This may not work for frames which call
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alloca; for those, we may need to consult unwind tables.
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alloca; for those, we may need to consult unwind tables.
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jimb: FIXME. */
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jimb: FIXME. */
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#undef FRAME_LOCALS_ADDRESS
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#undef FRAME_LOCALS_ADDRESS
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#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
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#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
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|
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#define INIT_FRAME_AP init_frame_ap
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#define INIT_FRAME_AP init_frame_ap
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|
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#define EXTRA_FRAME_INFO \
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#define EXTRA_FRAME_INFO \
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CORE_ADDR ap;
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CORE_ADDR ap;
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|
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/* For a number of horrible reasons we may have to adjust the location
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/* For a number of horrible reasons we may have to adjust the location
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of variables on the stack. Ugh. jimb: why? */
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of variables on the stack. Ugh. jimb: why? */
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#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
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#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
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|
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extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
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extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
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|
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/* jimb: omitted dynamic linking stuff here */
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/* jimb: omitted dynamic linking stuff here */
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|
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/* This sequence of words is the instructions
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/* This sequence of words is the instructions
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|
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; Call stack frame has already been built by gdb. Since we could be calling
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; Call stack frame has already been built by gdb. Since we could be calling
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; a varargs function, and we do not have the benefit of a stub to put things in
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; a varargs function, and we do not have the benefit of a stub to put things in
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; the right place, we load the first 8 word of arguments into both the general
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; the right place, we load the first 8 word of arguments into both the general
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; and fp registers.
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; and fp registers.
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call_dummy
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call_dummy
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nop
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nop
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copy %r4,%r29
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copy %r4,%r29
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copy %r5,%r22
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copy %r5,%r22
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copy %r6,%r27
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copy %r6,%r27
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fldd -64(0,%r29),%fr4
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fldd -64(0,%r29),%fr4
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fldd -56(0,%r29),%fr5
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fldd -56(0,%r29),%fr5
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fldd -48(0,%r29),%fr6
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fldd -48(0,%r29),%fr6
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fldd -40(0,%r29),%fr7
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fldd -40(0,%r29),%fr7
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fldd -32(0,%r29),%fr8
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fldd -32(0,%r29),%fr8
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fldd -24(0,%r29),%fr9
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fldd -24(0,%r29),%fr9
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fldd -16(0,%r29),%fr10
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fldd -16(0,%r29),%fr10
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fldd -8(0,%r29),%fr11
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fldd -8(0,%r29),%fr11
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copy %r22,%r1
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copy %r22,%r1
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ldd -64(%r29), %r26
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ldd -64(%r29), %r26
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ldd -56(%r29), %r25
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ldd -56(%r29), %r25
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ldd -48(%r29), %r24
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ldd -48(%r29), %r24
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ldd -40(%r29), %r23
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ldd -40(%r29), %r23
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ldd -32(%r29), %r22
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ldd -32(%r29), %r22
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ldd -24(%r29), %r21
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ldd -24(%r29), %r21
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ldd -16(%r29), %r20
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ldd -16(%r29), %r20
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bve,l (%r1),%r2
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bve,l (%r1),%r2
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ldd -8(%r29), %r19
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ldd -8(%r29), %r19
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break 4, 8
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break 4, 8
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mtsp %r21, %sr0
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mtsp %r21, %sr0
|
ble 0(%sr0, %r22)
|
ble 0(%sr0, %r22)
|
nop
|
nop
|
*/
|
*/
|
|
|
/* Call dummys are sized and written out in word sized hunks. So we have
|
/* Call dummys are sized and written out in word sized hunks. So we have
|
to pack the instructions into words. Ugh. */
|
to pack the instructions into words. Ugh. */
|
#undef CALL_DUMMY
|
#undef CALL_DUMMY
|
#define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
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#define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
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0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
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0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
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0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
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0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
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0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
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0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
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0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
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0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
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0xe820f0000fb110d3LL, 0x0001000400151820LL,\
|
0xe820f0000fb110d3LL, 0x0001000400151820LL,\
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0xe6c0000008000240LL}
|
0xe6c0000008000240LL}
|
|
|
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
|
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
|
#define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
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#define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
|
|
|
/* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
|
/* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
|
machine, not the size of an instruction. Since a word on this target
|
machine, not the size of an instruction. Since a word on this target
|
holds two instructions we have to divide the instruction size by two to
|
holds two instructions we have to divide the instruction size by two to
|
get the word size of the dummy. */
|
get the word size of the dummy. */
|
#undef CALL_DUMMY_LENGTH
|
#undef CALL_DUMMY_LENGTH
|
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
|
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
|
|
|
/* The PA64 ABI mandates a 16 byte stack alignment. */
|
/* The PA64 ABI mandates a 16 byte stack alignment. */
|
#undef STACK_ALIGN
|
#undef STACK_ALIGN
|
#define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
|
#define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
|
|
|
/* The PA64 ABI reserves 64 bytes of stack space for outgoing register
|
/* The PA64 ABI reserves 64 bytes of stack space for outgoing register
|
parameters. */
|
parameters. */
|
#undef REG_PARM_STACK_SPACE
|
#undef REG_PARM_STACK_SPACE
|
#define REG_PARM_STACK_SPACE 64
|
#define REG_PARM_STACK_SPACE 64
|
|
|
/* Use the 64-bit calling conventions designed for the PA2.0 in wide mode. */
|
/* Use the 64-bit calling conventions designed for the PA2.0 in wide mode. */
|
#define PA20W_CALLING_CONVENTIONS
|
#define PA20W_CALLING_CONVENTIONS
|
|
|
#undef FUNC_LDIL_OFFSET
|
#undef FUNC_LDIL_OFFSET
|
#undef FUNC_LDO_OFFSET
|
#undef FUNC_LDO_OFFSET
|
#undef SR4EXPORT_LDIL_OFFSET
|
#undef SR4EXPORT_LDIL_OFFSET
|
#undef SR4EXPORT_LDO_OFFSET
|
#undef SR4EXPORT_LDO_OFFSET
|
#undef CALL_DUMMY_LOCATION
|
#undef CALL_DUMMY_LOCATION
|
|
|
#undef REG_STRUCT_HAS_ADDR
|
#undef REG_STRUCT_HAS_ADDR
|
|
|
#undef EXTRACT_RETURN_VALUE
|
#undef EXTRACT_RETURN_VALUE
|
/* RM: floats are returned in FR4R, doubles in FR4
|
/* RM: floats are returned in FR4R, doubles in FR4
|
* integral values are in r28, padded on the left
|
* integral values are in r28, padded on the left
|
* aggregates less that 65 bits are in r28, right padded
|
* aggregates less that 65 bits are in r28, right padded
|
* aggregates upto 128 bits are in r28 and r29, right padded
|
* aggregates upto 128 bits are in r28 and r29, right padded
|
*/
|
*/
|
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
|
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
|
{ \
|
{ \
|
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
|
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
|
memcpy ((VALBUF), \
|
memcpy ((VALBUF), \
|
((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
|
((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
|
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
|
memcpy ((VALBUF), \
|
memcpy ((VALBUF), \
|
(char *)(REGBUF) + REGISTER_BYTE (28) + \
|
(char *)(REGBUF) + REGISTER_BYTE (28) + \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (TYPE_LENGTH (TYPE) <= 8) \
|
else if (TYPE_LENGTH (TYPE) <= 8) \
|
memcpy ((VALBUF), \
|
memcpy ((VALBUF), \
|
(char *)(REGBUF) + REGISTER_BYTE (28), \
|
(char *)(REGBUF) + REGISTER_BYTE (28), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (TYPE_LENGTH (TYPE) <= 16) \
|
else if (TYPE_LENGTH (TYPE) <= 16) \
|
{ \
|
{ \
|
memcpy ((VALBUF), \
|
memcpy ((VALBUF), \
|
(char *)(REGBUF) + REGISTER_BYTE (28), \
|
(char *)(REGBUF) + REGISTER_BYTE (28), \
|
8); \
|
8); \
|
memcpy (((char *) VALBUF + 8), \
|
memcpy (((char *) VALBUF + 8), \
|
(char *)(REGBUF) + REGISTER_BYTE (29), \
|
(char *)(REGBUF) + REGISTER_BYTE (29), \
|
TYPE_LENGTH (TYPE) - 8); \
|
TYPE_LENGTH (TYPE) - 8); \
|
} \
|
} \
|
}
|
}
|
|
|
/* RM: struct upto 128 bits are returned in registers */
|
/* RM: struct upto 128 bits are returned in registers */
|
#undef USE_STRUCT_CONVENTION
|
#undef USE_STRUCT_CONVENTION
|
#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
|
#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
|
(TYPE_LENGTH (value_type) > 16)
|
(TYPE_LENGTH (value_type) > 16)
|
|
|
/* RM: for return command */
|
/* RM: for return command */
|
#undef STORE_RETURN_VALUE
|
#undef STORE_RETURN_VALUE
|
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
|
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
|
{ \
|
{ \
|
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
|
if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
|
write_register_bytes \
|
write_register_bytes \
|
(REGISTER_BYTE (FP4_REGNUM) + \
|
(REGISTER_BYTE (FP4_REGNUM) + \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(VALBUF), \
|
(VALBUF), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
|
else if (is_integral_type(TYPE) || SOFT_FLOAT) \
|
write_register_bytes \
|
write_register_bytes \
|
(REGISTER_BYTE (28) + \
|
(REGISTER_BYTE (28) + \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
|
(VALBUF), \
|
(VALBUF), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (TYPE_LENGTH (TYPE) <= 8) \
|
else if (TYPE_LENGTH (TYPE) <= 8) \
|
write_register_bytes \
|
write_register_bytes \
|
( REGISTER_BYTE (28), \
|
( REGISTER_BYTE (28), \
|
(VALBUF), \
|
(VALBUF), \
|
TYPE_LENGTH (TYPE)); \
|
TYPE_LENGTH (TYPE)); \
|
else if (TYPE_LENGTH (TYPE) <= 16) \
|
else if (TYPE_LENGTH (TYPE) <= 16) \
|
{ \
|
{ \
|
write_register_bytes \
|
write_register_bytes \
|
(REGISTER_BYTE (28), \
|
(REGISTER_BYTE (28), \
|
(VALBUF), \
|
(VALBUF), \
|
8); \
|
8); \
|
write_register_bytes \
|
write_register_bytes \
|
(REGISTER_BYTE (29), \
|
(REGISTER_BYTE (29), \
|
((char *) VALBUF + 8), \
|
((char *) VALBUF + 8), \
|
TYPE_LENGTH (TYPE) - 8); \
|
TYPE_LENGTH (TYPE) - 8); \
|
} \
|
} \
|
}
|
}
|
|
|
/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
|
/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
|
* see comments there. For PA64, the save_state structure is at an
|
* see comments there. For PA64, the save_state structure is at an
|
* offset of 24 32-bit words from the sigcontext structure. The 64 bit
|
* offset of 24 32-bit words from the sigcontext structure. The 64 bit
|
* general registers are at an offset of 640 bytes from the beginning of the
|
* general registers are at an offset of 640 bytes from the beginning of the
|
* save_state structure, and the floating pointer register are at an offset
|
* save_state structure, and the floating pointer register are at an offset
|
* of 256 bytes from the beginning of the save_state structure.
|
* of 256 bytes from the beginning of the save_state structure.
|
*/
|
*/
|
#undef FRAME_SAVED_PC_IN_SIGTRAMP
|
#undef FRAME_SAVED_PC_IN_SIGTRAMP
|
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
|
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
|
{ \
|
{ \
|
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
|
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
|
}
|
}
|
|
|
#undef FRAME_BASE_BEFORE_SIGTRAMP
|
#undef FRAME_BASE_BEFORE_SIGTRAMP
|
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
|
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
|
{ \
|
{ \
|
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
|
*(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
|
}
|
}
|
|
|
#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
|
#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
|
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
|
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
|
{ \
|
{ \
|
int i; \
|
int i; \
|
CORE_ADDR TMP1, TMP2; \
|
CORE_ADDR TMP1, TMP2; \
|
TMP1 = (FRAME)->frame + (24 * 4) + 640; \
|
TMP1 = (FRAME)->frame + (24 * 4) + 640; \
|
TMP2 = (FRAME)->frame + (24 * 4) + 256; \
|
TMP2 = (FRAME)->frame + (24 * 4) + 256; \
|
for (i = 0; i < NUM_REGS; i++) \
|
for (i = 0; i < NUM_REGS; i++) \
|
{ \
|
{ \
|
if (i == SP_REGNUM) \
|
if (i == SP_REGNUM) \
|
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
|
(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
|
else if (i >= FP0_REGNUM) \
|
else if (i >= FP0_REGNUM) \
|
(FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
|
(FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
|
else \
|
else \
|
(FSR)->regs[i] = TMP1 + i * 8; \
|
(FSR)->regs[i] = TMP1 + i * 8; \
|
} \
|
} \
|
}
|
}
|
|
|
/* jimb: omitted purify call support */
|
/* jimb: omitted purify call support */
|
|
|
