/* Target-dependent code for the SPARC for GDB, the GNU debugger.
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/* Target-dependent code for the SPARC for GDB, the GNU debugger.
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Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
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Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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This file is part of GDB.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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Boston, MA 02111-1307, USA. */
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/* ??? Support for calling functions from gdb in sparc64 is unfinished. */
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/* ??? Support for calling functions from gdb in sparc64 is unfinished. */
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#include "defs.h"
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#include "defs.h"
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#include "frame.h"
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#include "frame.h"
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#include "inferior.h"
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#include "inferior.h"
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#include "obstack.h"
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#include "obstack.h"
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#include "target.h"
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#include "target.h"
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#include "value.h"
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#include "value.h"
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#include "bfd.h"
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#include "bfd.h"
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#include "gdb_string.h"
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#include "gdb_string.h"
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#ifdef USE_PROC_FS
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#ifdef USE_PROC_FS
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#include <sys/procfs.h>
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#include <sys/procfs.h>
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#endif
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#endif
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#include "gdbcore.h"
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#include "gdbcore.h"
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#if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
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#if defined(TARGET_SPARCLET) || defined(TARGET_SPARCLITE)
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#define SPARC_HAS_FPU 0
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#define SPARC_HAS_FPU 0
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#else
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#else
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#define SPARC_HAS_FPU 1
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#define SPARC_HAS_FPU 1
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#endif
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#endif
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#ifdef GDB_TARGET_IS_SPARC64
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#ifdef GDB_TARGET_IS_SPARC64
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#define FP_REGISTER_BYTES (64 * 4)
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#define FP_REGISTER_BYTES (64 * 4)
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#else
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#else
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#define FP_REGISTER_BYTES (32 * 4)
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#define FP_REGISTER_BYTES (32 * 4)
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#endif
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#endif
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/* If not defined, assume 32 bit sparc. */
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/* If not defined, assume 32 bit sparc. */
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#ifndef FP_MAX_REGNUM
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#ifndef FP_MAX_REGNUM
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#define FP_MAX_REGNUM (FP0_REGNUM + 32)
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#define FP_MAX_REGNUM (FP0_REGNUM + 32)
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#endif
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#endif
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#define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
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#define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM))
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/* From infrun.c */
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/* From infrun.c */
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extern int stop_after_trap;
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extern int stop_after_trap;
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/* We don't store all registers immediately when requested, since they
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/* We don't store all registers immediately when requested, since they
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get sent over in large chunks anyway. Instead, we accumulate most
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get sent over in large chunks anyway. Instead, we accumulate most
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of the changes and send them over once. "deferred_stores" keeps
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of the changes and send them over once. "deferred_stores" keeps
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track of which sets of registers we have locally-changed copies of,
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track of which sets of registers we have locally-changed copies of,
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so we only need send the groups that have changed. */
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so we only need send the groups that have changed. */
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int deferred_stores = 0; /* Cumulates stores we want to do eventually. */
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int deferred_stores = 0; /* Cumulates stores we want to do eventually. */
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/* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
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/* Some machines, such as Fujitsu SPARClite 86x, have a bi-endian mode
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where instructions are big-endian and data are little-endian.
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where instructions are big-endian and data are little-endian.
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This flag is set when we detect that the target is of this type. */
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This flag is set when we detect that the target is of this type. */
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int bi_endian = 0;
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int bi_endian = 0;
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/* Fetch a single instruction. Even on bi-endian machines
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/* Fetch a single instruction. Even on bi-endian machines
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such as sparc86x, instructions are always big-endian. */
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such as sparc86x, instructions are always big-endian. */
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static unsigned long
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static unsigned long
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fetch_instruction (pc)
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fetch_instruction (pc)
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CORE_ADDR pc;
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CORE_ADDR pc;
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{
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{
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unsigned long retval;
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unsigned long retval;
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int i;
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int i;
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unsigned char buf[4];
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unsigned char buf[4];
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read_memory (pc, buf, sizeof (buf));
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read_memory (pc, buf, sizeof (buf));
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/* Start at the most significant end of the integer, and work towards
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/* Start at the most significant end of the integer, and work towards
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the least significant. */
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the least significant. */
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retval = 0;
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retval = 0;
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for (i = 0; i < sizeof (buf); ++i)
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for (i = 0; i < sizeof (buf); ++i)
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retval = (retval << 8) | buf[i];
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retval = (retval << 8) | buf[i];
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return retval;
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return retval;
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}
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}
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/* Branches with prediction are treated like their non-predicting cousins. */
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/* Branches with prediction are treated like their non-predicting cousins. */
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/* FIXME: What about floating point branches? */
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/* FIXME: What about floating point branches? */
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/* Macros to extract fields from sparc instructions. */
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/* Macros to extract fields from sparc instructions. */
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#define X_OP(i) (((i) >> 30) & 0x3)
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#define X_OP(i) (((i) >> 30) & 0x3)
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#define X_RD(i) (((i) >> 25) & 0x1f)
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#define X_RD(i) (((i) >> 25) & 0x1f)
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#define X_A(i) (((i) >> 29) & 1)
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#define X_A(i) (((i) >> 29) & 1)
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#define X_COND(i) (((i) >> 25) & 0xf)
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#define X_COND(i) (((i) >> 25) & 0xf)
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#define X_OP2(i) (((i) >> 22) & 0x7)
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#define X_OP2(i) (((i) >> 22) & 0x7)
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#define X_IMM22(i) ((i) & 0x3fffff)
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#define X_IMM22(i) ((i) & 0x3fffff)
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#define X_OP3(i) (((i) >> 19) & 0x3f)
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#define X_OP3(i) (((i) >> 19) & 0x3f)
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#define X_RS1(i) (((i) >> 14) & 0x1f)
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#define X_RS1(i) (((i) >> 14) & 0x1f)
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#define X_I(i) (((i) >> 13) & 1)
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#define X_I(i) (((i) >> 13) & 1)
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#define X_IMM13(i) ((i) & 0x1fff)
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#define X_IMM13(i) ((i) & 0x1fff)
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/* Sign extension macros. */
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/* Sign extension macros. */
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#define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
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#define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000)
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#define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
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#define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
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#define X_CC(i) (((i) >> 20) & 3)
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#define X_CC(i) (((i) >> 20) & 3)
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#define X_P(i) (((i) >> 19) & 1)
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#define X_P(i) (((i) >> 19) & 1)
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#define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
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#define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
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#define X_RCOND(i) (((i) >> 25) & 7)
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#define X_RCOND(i) (((i) >> 25) & 7)
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#define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
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#define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000)
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#define X_FCN(i) (((i) >> 25) & 31)
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#define X_FCN(i) (((i) >> 25) & 31)
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typedef enum
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typedef enum
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{
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{
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Error, not_branch, bicc, bicca, ba, baa, ticc, ta,
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Error, not_branch, bicc, bicca, ba, baa, ticc, ta,
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#ifdef GDB_TARGET_IS_SPARC64
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#ifdef GDB_TARGET_IS_SPARC64
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done_retry
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done_retry
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#endif
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#endif
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}
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}
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branch_type;
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branch_type;
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/* Simulate single-step ptrace call for sun4. Code written by Gary
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/* Simulate single-step ptrace call for sun4. Code written by Gary
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Beihl (beihl@mcc.com). */
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Beihl (beihl@mcc.com). */
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/* npc4 and next_pc describe the situation at the time that the
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/* npc4 and next_pc describe the situation at the time that the
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step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
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step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
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static CORE_ADDR next_pc, npc4, target;
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static CORE_ADDR next_pc, npc4, target;
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static int brknpc4, brktrg;
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static int brknpc4, brktrg;
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typedef char binsn_quantum[BREAKPOINT_MAX];
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typedef char binsn_quantum[BREAKPOINT_MAX];
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static binsn_quantum break_mem[3];
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static binsn_quantum break_mem[3];
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static branch_type isbranch PARAMS ((long, CORE_ADDR, CORE_ADDR *));
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static branch_type isbranch PARAMS ((long, CORE_ADDR, CORE_ADDR *));
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/* single_step() is called just before we want to resume the inferior,
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/* single_step() is called just before we want to resume the inferior,
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if we want to single-step it but there is no hardware or kernel single-step
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if we want to single-step it but there is no hardware or kernel single-step
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support (as on all SPARCs). We find all the possible targets of the
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support (as on all SPARCs). We find all the possible targets of the
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coming instruction and breakpoint them.
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coming instruction and breakpoint them.
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single_step is also called just after the inferior stops. If we had
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single_step is also called just after the inferior stops. If we had
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set up a simulated single-step, we undo our damage. */
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set up a simulated single-step, we undo our damage. */
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void
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void
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sparc_software_single_step (ignore, insert_breakpoints_p)
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sparc_software_single_step (ignore, insert_breakpoints_p)
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enum target_signal ignore; /* pid, but we don't need it */
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enum target_signal ignore; /* pid, but we don't need it */
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int insert_breakpoints_p;
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int insert_breakpoints_p;
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{
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{
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branch_type br;
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branch_type br;
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CORE_ADDR pc;
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CORE_ADDR pc;
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long pc_instruction;
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long pc_instruction;
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if (insert_breakpoints_p)
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if (insert_breakpoints_p)
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{
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{
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/* Always set breakpoint for NPC. */
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/* Always set breakpoint for NPC. */
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next_pc = read_register (NPC_REGNUM);
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next_pc = read_register (NPC_REGNUM);
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npc4 = next_pc + 4; /* branch not taken */
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npc4 = next_pc + 4; /* branch not taken */
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target_insert_breakpoint (next_pc, break_mem[0]);
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target_insert_breakpoint (next_pc, break_mem[0]);
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/* printf_unfiltered ("set break at %x\n",next_pc); */
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/* printf_unfiltered ("set break at %x\n",next_pc); */
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pc = read_register (PC_REGNUM);
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pc = read_register (PC_REGNUM);
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pc_instruction = fetch_instruction (pc);
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pc_instruction = fetch_instruction (pc);
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br = isbranch (pc_instruction, pc, &target);
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br = isbranch (pc_instruction, pc, &target);
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brknpc4 = brktrg = 0;
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brknpc4 = brktrg = 0;
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if (br == bicca)
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if (br == bicca)
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{
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{
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/* Conditional annulled branch will either end up at
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/* Conditional annulled branch will either end up at
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npc (if taken) or at npc+4 (if not taken).
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npc (if taken) or at npc+4 (if not taken).
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Trap npc+4. */
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Trap npc+4. */
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brknpc4 = 1;
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brknpc4 = 1;
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target_insert_breakpoint (npc4, break_mem[1]);
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target_insert_breakpoint (npc4, break_mem[1]);
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}
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}
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else if (br == baa && target != next_pc)
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else if (br == baa && target != next_pc)
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{
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{
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/* Unconditional annulled branch will always end up at
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/* Unconditional annulled branch will always end up at
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the target. */
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the target. */
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brktrg = 1;
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brktrg = 1;
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target_insert_breakpoint (target, break_mem[2]);
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target_insert_breakpoint (target, break_mem[2]);
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}
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}
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#ifdef GDB_TARGET_IS_SPARC64
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#ifdef GDB_TARGET_IS_SPARC64
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else if (br == done_retry)
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else if (br == done_retry)
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{
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{
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brktrg = 1;
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brktrg = 1;
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target_insert_breakpoint (target, break_mem[2]);
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target_insert_breakpoint (target, break_mem[2]);
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}
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}
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#endif
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#endif
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}
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}
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else
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else
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{
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{
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/* Remove breakpoints */
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/* Remove breakpoints */
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target_remove_breakpoint (next_pc, break_mem[0]);
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target_remove_breakpoint (next_pc, break_mem[0]);
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|
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if (brknpc4)
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if (brknpc4)
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target_remove_breakpoint (npc4, break_mem[1]);
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target_remove_breakpoint (npc4, break_mem[1]);
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|
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if (brktrg)
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if (brktrg)
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target_remove_breakpoint (target, break_mem[2]);
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target_remove_breakpoint (target, break_mem[2]);
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}
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}
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}
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}
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/* Call this for each newly created frame. For SPARC, we need to calculate
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/* Call this for each newly created frame. For SPARC, we need to calculate
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the bottom of the frame, and do some extra work if the prologue
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the bottom of the frame, and do some extra work if the prologue
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has been generated via the -mflat option to GCC. In particular,
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has been generated via the -mflat option to GCC. In particular,
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we need to know where the previous fp and the pc have been stashed,
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we need to know where the previous fp and the pc have been stashed,
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since their exact position within the frame may vary. */
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since their exact position within the frame may vary. */
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|
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void
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void
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sparc_init_extra_frame_info (fromleaf, fi)
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sparc_init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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int fromleaf;
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struct frame_info *fi;
|
struct frame_info *fi;
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{
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{
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char *name;
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char *name;
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CORE_ADDR prologue_start, prologue_end;
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CORE_ADDR prologue_start, prologue_end;
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int insn;
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int insn;
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|
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fi->bottom =
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fi->bottom =
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(fi->next ?
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(fi->next ?
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(fi->frame == fi->next->frame ? fi->next->bottom : fi->next->frame) :
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(fi->frame == fi->next->frame ? fi->next->bottom : fi->next->frame) :
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read_sp ());
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read_sp ());
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|
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/* If fi->next is NULL, then we already set ->frame by passing read_fp()
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/* If fi->next is NULL, then we already set ->frame by passing read_fp()
|
to create_new_frame. */
|
to create_new_frame. */
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if (fi->next)
|
if (fi->next)
|
{
|
{
|
char buf[MAX_REGISTER_RAW_SIZE];
|
char buf[MAX_REGISTER_RAW_SIZE];
|
|
|
/* Compute ->frame as if not flat. If it is flat, we'll change
|
/* Compute ->frame as if not flat. If it is flat, we'll change
|
it later. */
|
it later. */
|
if (fi->next->next != NULL
|
if (fi->next->next != NULL
|
&& (fi->next->next->signal_handler_caller
|
&& (fi->next->next->signal_handler_caller
|
|| frame_in_dummy (fi->next->next))
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|| frame_in_dummy (fi->next->next))
|
&& frameless_look_for_prologue (fi->next))
|
&& frameless_look_for_prologue (fi->next))
|
{
|
{
|
/* A frameless function interrupted by a signal did not change
|
/* A frameless function interrupted by a signal did not change
|
the frame pointer, fix up frame pointer accordingly. */
|
the frame pointer, fix up frame pointer accordingly. */
|
fi->frame = FRAME_FP (fi->next);
|
fi->frame = FRAME_FP (fi->next);
|
fi->bottom = fi->next->bottom;
|
fi->bottom = fi->next->bottom;
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Should we adjust for stack bias here? */
|
/* Should we adjust for stack bias here? */
|
get_saved_register (buf, 0, 0, fi, FP_REGNUM, 0);
|
get_saved_register (buf, 0, 0, fi, FP_REGNUM, 0);
|
fi->frame = extract_address (buf, REGISTER_RAW_SIZE (FP_REGNUM));
|
fi->frame = extract_address (buf, REGISTER_RAW_SIZE (FP_REGNUM));
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
if (fi->frame & 1)
|
if (fi->frame & 1)
|
fi->frame += 2047;
|
fi->frame += 2047;
|
#endif
|
#endif
|
|
|
}
|
}
|
}
|
}
|
|
|
/* Decide whether this is a function with a ``flat register window''
|
/* Decide whether this is a function with a ``flat register window''
|
frame. For such functions, the frame pointer is actually in %i7. */
|
frame. For such functions, the frame pointer is actually in %i7. */
|
fi->flat = 0;
|
fi->flat = 0;
|
fi->in_prologue = 0;
|
fi->in_prologue = 0;
|
if (find_pc_partial_function (fi->pc, &name, &prologue_start, &prologue_end))
|
if (find_pc_partial_function (fi->pc, &name, &prologue_start, &prologue_end))
|
{
|
{
|
/* See if the function starts with an add (which will be of a
|
/* See if the function starts with an add (which will be of a
|
negative number if a flat frame) to the sp. FIXME: Does not
|
negative number if a flat frame) to the sp. FIXME: Does not
|
handle large frames which will need more than one instruction
|
handle large frames which will need more than one instruction
|
to adjust the sp. */
|
to adjust the sp. */
|
insn = fetch_instruction (prologue_start, 4);
|
insn = fetch_instruction (prologue_start, 4);
|
if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0
|
if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0
|
&& X_I (insn) && X_SIMM13 (insn) < 0)
|
&& X_I (insn) && X_SIMM13 (insn) < 0)
|
{
|
{
|
int offset = X_SIMM13 (insn);
|
int offset = X_SIMM13 (insn);
|
|
|
/* Then look for a save of %i7 into the frame. */
|
/* Then look for a save of %i7 into the frame. */
|
insn = fetch_instruction (prologue_start + 4);
|
insn = fetch_instruction (prologue_start + 4);
|
if (X_OP (insn) == 3
|
if (X_OP (insn) == 3
|
&& X_RD (insn) == 31
|
&& X_RD (insn) == 31
|
&& X_OP3 (insn) == 4
|
&& X_OP3 (insn) == 4
|
&& X_RS1 (insn) == 14)
|
&& X_RS1 (insn) == 14)
|
{
|
{
|
char buf[MAX_REGISTER_RAW_SIZE];
|
char buf[MAX_REGISTER_RAW_SIZE];
|
|
|
/* We definitely have a flat frame now. */
|
/* We definitely have a flat frame now. */
|
fi->flat = 1;
|
fi->flat = 1;
|
|
|
fi->sp_offset = offset;
|
fi->sp_offset = offset;
|
|
|
/* Overwrite the frame's address with the value in %i7. */
|
/* Overwrite the frame's address with the value in %i7. */
|
get_saved_register (buf, 0, 0, fi, I7_REGNUM, 0);
|
get_saved_register (buf, 0, 0, fi, I7_REGNUM, 0);
|
fi->frame = extract_address (buf, REGISTER_RAW_SIZE (I7_REGNUM));
|
fi->frame = extract_address (buf, REGISTER_RAW_SIZE (I7_REGNUM));
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
if (fi->frame & 1)
|
if (fi->frame & 1)
|
fi->frame += 2047;
|
fi->frame += 2047;
|
#endif
|
#endif
|
/* Record where the fp got saved. */
|
/* Record where the fp got saved. */
|
fi->fp_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
fi->fp_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
|
|
/* Also try to collect where the pc got saved to. */
|
/* Also try to collect where the pc got saved to. */
|
fi->pc_addr = 0;
|
fi->pc_addr = 0;
|
insn = fetch_instruction (prologue_start + 12);
|
insn = fetch_instruction (prologue_start + 12);
|
if (X_OP (insn) == 3
|
if (X_OP (insn) == 3
|
&& X_RD (insn) == 15
|
&& X_RD (insn) == 15
|
&& X_OP3 (insn) == 4
|
&& X_OP3 (insn) == 4
|
&& X_RS1 (insn) == 14)
|
&& X_RS1 (insn) == 14)
|
fi->pc_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
fi->pc_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Check if the PC is in the function prologue before a SAVE
|
/* Check if the PC is in the function prologue before a SAVE
|
instruction has been executed yet. If so, set the frame
|
instruction has been executed yet. If so, set the frame
|
to the current value of the stack pointer and set
|
to the current value of the stack pointer and set
|
the in_prologue flag. */
|
the in_prologue flag. */
|
CORE_ADDR addr;
|
CORE_ADDR addr;
|
struct symtab_and_line sal;
|
struct symtab_and_line sal;
|
|
|
sal = find_pc_line (prologue_start, 0);
|
sal = find_pc_line (prologue_start, 0);
|
if (sal.line == 0) /* no line info, use PC */
|
if (sal.line == 0) /* no line info, use PC */
|
prologue_end = fi->pc;
|
prologue_end = fi->pc;
|
else if (sal.end < prologue_end)
|
else if (sal.end < prologue_end)
|
prologue_end = sal.end;
|
prologue_end = sal.end;
|
if (fi->pc < prologue_end)
|
if (fi->pc < prologue_end)
|
{
|
{
|
for (addr = prologue_start; addr < fi->pc; addr += 4)
|
for (addr = prologue_start; addr < fi->pc; addr += 4)
|
{
|
{
|
insn = read_memory_integer (addr, 4);
|
insn = read_memory_integer (addr, 4);
|
if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
|
if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3c)
|
break; /* SAVE seen, stop searching */
|
break; /* SAVE seen, stop searching */
|
}
|
}
|
if (addr >= fi->pc)
|
if (addr >= fi->pc)
|
{
|
{
|
fi->in_prologue = 1;
|
fi->in_prologue = 1;
|
fi->frame = read_register (SP_REGNUM);
|
fi->frame = read_register (SP_REGNUM);
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
if (fi->next && fi->frame == 0)
|
if (fi->next && fi->frame == 0)
|
{
|
{
|
/* Kludge to cause init_prev_frame_info to destroy the new frame. */
|
/* Kludge to cause init_prev_frame_info to destroy the new frame. */
|
fi->frame = fi->next->frame;
|
fi->frame = fi->next->frame;
|
fi->pc = fi->next->pc;
|
fi->pc = fi->next->pc;
|
}
|
}
|
}
|
}
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_frame_chain (frame)
|
sparc_frame_chain (frame)
|
struct frame_info *frame;
|
struct frame_info *frame;
|
{
|
{
|
/* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
|
/* Value that will cause FRAME_CHAIN_VALID to not worry about the chain
|
value. If it realy is zero, we detect it later in
|
value. If it realy is zero, we detect it later in
|
sparc_init_prev_frame. */
|
sparc_init_prev_frame. */
|
return (CORE_ADDR) 1;
|
return (CORE_ADDR) 1;
|
}
|
}
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_extract_struct_value_address (regbuf)
|
sparc_extract_struct_value_address (regbuf)
|
char regbuf[REGISTER_BYTES];
|
char regbuf[REGISTER_BYTES];
|
{
|
{
|
return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM),
|
return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM),
|
REGISTER_RAW_SIZE (O0_REGNUM));
|
REGISTER_RAW_SIZE (O0_REGNUM));
|
}
|
}
|
|
|
/* Find the pc saved in frame FRAME. */
|
/* Find the pc saved in frame FRAME. */
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_frame_saved_pc (frame)
|
sparc_frame_saved_pc (frame)
|
struct frame_info *frame;
|
struct frame_info *frame;
|
{
|
{
|
char buf[MAX_REGISTER_RAW_SIZE];
|
char buf[MAX_REGISTER_RAW_SIZE];
|
CORE_ADDR addr;
|
CORE_ADDR addr;
|
|
|
if (frame->signal_handler_caller)
|
if (frame->signal_handler_caller)
|
{
|
{
|
/* This is the signal trampoline frame.
|
/* This is the signal trampoline frame.
|
Get the saved PC from the sigcontext structure. */
|
Get the saved PC from the sigcontext structure. */
|
|
|
#ifndef SIGCONTEXT_PC_OFFSET
|
#ifndef SIGCONTEXT_PC_OFFSET
|
#define SIGCONTEXT_PC_OFFSET 12
|
#define SIGCONTEXT_PC_OFFSET 12
|
#endif
|
#endif
|
|
|
CORE_ADDR sigcontext_addr;
|
CORE_ADDR sigcontext_addr;
|
char scbuf[TARGET_PTR_BIT / HOST_CHAR_BIT];
|
char scbuf[TARGET_PTR_BIT / HOST_CHAR_BIT];
|
int saved_pc_offset = SIGCONTEXT_PC_OFFSET;
|
int saved_pc_offset = SIGCONTEXT_PC_OFFSET;
|
char *name = NULL;
|
char *name = NULL;
|
|
|
/* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
|
/* Solaris2 ucbsigvechandler passes a pointer to a sigcontext
|
as the third parameter. The offset to the saved pc is 12. */
|
as the third parameter. The offset to the saved pc is 12. */
|
find_pc_partial_function (frame->pc, &name,
|
find_pc_partial_function (frame->pc, &name,
|
(CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
|
(CORE_ADDR *) NULL, (CORE_ADDR *) NULL);
|
if (name && STREQ (name, "ucbsigvechandler"))
|
if (name && STREQ (name, "ucbsigvechandler"))
|
saved_pc_offset = 12;
|
saved_pc_offset = 12;
|
|
|
/* The sigcontext address is contained in register O2. */
|
/* The sigcontext address is contained in register O2. */
|
get_saved_register (buf, (int *) NULL, (CORE_ADDR *) NULL,
|
get_saved_register (buf, (int *) NULL, (CORE_ADDR *) NULL,
|
frame, O0_REGNUM + 2, (enum lval_type *) NULL);
|
frame, O0_REGNUM + 2, (enum lval_type *) NULL);
|
sigcontext_addr = extract_address (buf, REGISTER_RAW_SIZE (O0_REGNUM + 2));
|
sigcontext_addr = extract_address (buf, REGISTER_RAW_SIZE (O0_REGNUM + 2));
|
|
|
/* Don't cause a memory_error when accessing sigcontext in case the
|
/* Don't cause a memory_error when accessing sigcontext in case the
|
stack layout has changed or the stack is corrupt. */
|
stack layout has changed or the stack is corrupt. */
|
target_read_memory (sigcontext_addr + saved_pc_offset,
|
target_read_memory (sigcontext_addr + saved_pc_offset,
|
scbuf, sizeof (scbuf));
|
scbuf, sizeof (scbuf));
|
return extract_address (scbuf, sizeof (scbuf));
|
return extract_address (scbuf, sizeof (scbuf));
|
}
|
}
|
else if (frame->in_prologue ||
|
else if (frame->in_prologue ||
|
(frame->next != NULL
|
(frame->next != NULL
|
&& (frame->next->signal_handler_caller
|
&& (frame->next->signal_handler_caller
|
|| frame_in_dummy (frame->next))
|
|| frame_in_dummy (frame->next))
|
&& frameless_look_for_prologue (frame)))
|
&& frameless_look_for_prologue (frame)))
|
{
|
{
|
/* A frameless function interrupted by a signal did not save
|
/* A frameless function interrupted by a signal did not save
|
the PC, it is still in %o7. */
|
the PC, it is still in %o7. */
|
get_saved_register (buf, (int *) NULL, (CORE_ADDR *) NULL,
|
get_saved_register (buf, (int *) NULL, (CORE_ADDR *) NULL,
|
frame, O7_REGNUM, (enum lval_type *) NULL);
|
frame, O7_REGNUM, (enum lval_type *) NULL);
|
return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE));
|
return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE));
|
}
|
}
|
if (frame->flat)
|
if (frame->flat)
|
addr = frame->pc_addr;
|
addr = frame->pc_addr;
|
else
|
else
|
addr = frame->bottom + FRAME_SAVED_I0 +
|
addr = frame->bottom + FRAME_SAVED_I0 +
|
SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM);
|
SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM);
|
|
|
if (addr == 0)
|
if (addr == 0)
|
/* A flat frame leaf function might not save the PC anywhere,
|
/* A flat frame leaf function might not save the PC anywhere,
|
just leave it in %o7. */
|
just leave it in %o7. */
|
return PC_ADJUST (read_register (O7_REGNUM));
|
return PC_ADJUST (read_register (O7_REGNUM));
|
|
|
read_memory (addr, buf, SPARC_INTREG_SIZE);
|
read_memory (addr, buf, SPARC_INTREG_SIZE);
|
return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE));
|
return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE));
|
}
|
}
|
|
|
/* Since an individual frame in the frame cache is defined by two
|
/* Since an individual frame in the frame cache is defined by two
|
arguments (a frame pointer and a stack pointer), we need two
|
arguments (a frame pointer and a stack pointer), we need two
|
arguments to get info for an arbitrary stack frame. This routine
|
arguments to get info for an arbitrary stack frame. This routine
|
takes two arguments and makes the cached frames look as if these
|
takes two arguments and makes the cached frames look as if these
|
two arguments defined a frame on the cache. This allows the rest
|
two arguments defined a frame on the cache. This allows the rest
|
of info frame to extract the important arguments without
|
of info frame to extract the important arguments without
|
difficulty. */
|
difficulty. */
|
|
|
struct frame_info *
|
struct frame_info *
|
setup_arbitrary_frame (argc, argv)
|
setup_arbitrary_frame (argc, argv)
|
int argc;
|
int argc;
|
CORE_ADDR *argv;
|
CORE_ADDR *argv;
|
{
|
{
|
struct frame_info *frame;
|
struct frame_info *frame;
|
|
|
if (argc != 2)
|
if (argc != 2)
|
error ("Sparc frame specifications require two arguments: fp and sp");
|
error ("Sparc frame specifications require two arguments: fp and sp");
|
|
|
frame = create_new_frame (argv[0], 0);
|
frame = create_new_frame (argv[0], 0);
|
|
|
if (!frame)
|
if (!frame)
|
internal_error ("create_new_frame returned invalid frame");
|
internal_error ("create_new_frame returned invalid frame");
|
|
|
frame->bottom = argv[1];
|
frame->bottom = argv[1];
|
frame->pc = FRAME_SAVED_PC (frame);
|
frame->pc = FRAME_SAVED_PC (frame);
|
return frame;
|
return frame;
|
}
|
}
|
|
|
/* Given a pc value, skip it forward past the function prologue by
|
/* Given a pc value, skip it forward past the function prologue by
|
disassembling instructions that appear to be a prologue.
|
disassembling instructions that appear to be a prologue.
|
|
|
If FRAMELESS_P is set, we are only testing to see if the function
|
If FRAMELESS_P is set, we are only testing to see if the function
|
is frameless. This allows a quicker answer.
|
is frameless. This allows a quicker answer.
|
|
|
This routine should be more specific in its actions; making sure
|
This routine should be more specific in its actions; making sure
|
that it uses the same register in the initial prologue section. */
|
that it uses the same register in the initial prologue section. */
|
|
|
static CORE_ADDR examine_prologue PARAMS ((CORE_ADDR, int, struct frame_info *,
|
static CORE_ADDR examine_prologue PARAMS ((CORE_ADDR, int, struct frame_info *,
|
struct frame_saved_regs *));
|
struct frame_saved_regs *));
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
examine_prologue (start_pc, frameless_p, fi, saved_regs)
|
examine_prologue (start_pc, frameless_p, fi, saved_regs)
|
CORE_ADDR start_pc;
|
CORE_ADDR start_pc;
|
int frameless_p;
|
int frameless_p;
|
struct frame_info *fi;
|
struct frame_info *fi;
|
struct frame_saved_regs *saved_regs;
|
struct frame_saved_regs *saved_regs;
|
{
|
{
|
int insn;
|
int insn;
|
int dest = -1;
|
int dest = -1;
|
CORE_ADDR pc = start_pc;
|
CORE_ADDR pc = start_pc;
|
int is_flat = 0;
|
int is_flat = 0;
|
|
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
|
|
/* Recognize the `sethi' insn and record its destination. */
|
/* Recognize the `sethi' insn and record its destination. */
|
if (X_OP (insn) == 0 && X_OP2 (insn) == 4)
|
if (X_OP (insn) == 0 && X_OP2 (insn) == 4)
|
{
|
{
|
dest = X_RD (insn);
|
dest = X_RD (insn);
|
pc += 4;
|
pc += 4;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
}
|
}
|
|
|
/* Recognize an add immediate value to register to either %g1 or
|
/* Recognize an add immediate value to register to either %g1 or
|
the destination register recorded above. Actually, this might
|
the destination register recorded above. Actually, this might
|
well recognize several different arithmetic operations.
|
well recognize several different arithmetic operations.
|
It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
|
It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
|
followed by "save %sp, %g1, %sp" is a valid prologue (Not that
|
followed by "save %sp, %g1, %sp" is a valid prologue (Not that
|
I imagine any compiler really does that, however). */
|
I imagine any compiler really does that, however). */
|
if (X_OP (insn) == 2
|
if (X_OP (insn) == 2
|
&& X_I (insn)
|
&& X_I (insn)
|
&& (X_RD (insn) == 1 || X_RD (insn) == dest))
|
&& (X_RD (insn) == 1 || X_RD (insn) == dest))
|
{
|
{
|
pc += 4;
|
pc += 4;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
}
|
}
|
|
|
/* Recognize any SAVE insn. */
|
/* Recognize any SAVE insn. */
|
if (X_OP (insn) == 2 && X_OP3 (insn) == 60)
|
if (X_OP (insn) == 2 && X_OP3 (insn) == 60)
|
{
|
{
|
pc += 4;
|
pc += 4;
|
if (frameless_p) /* If the save is all we care about, */
|
if (frameless_p) /* If the save is all we care about, */
|
return pc; /* return before doing more work */
|
return pc; /* return before doing more work */
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
}
|
}
|
/* Recognize add to %sp. */
|
/* Recognize add to %sp. */
|
else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0)
|
else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0)
|
{
|
{
|
pc += 4;
|
pc += 4;
|
if (frameless_p) /* If the add is all we care about, */
|
if (frameless_p) /* If the add is all we care about, */
|
return pc; /* return before doing more work */
|
return pc; /* return before doing more work */
|
is_flat = 1;
|
is_flat = 1;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
/* Recognize store of frame pointer (i7). */
|
/* Recognize store of frame pointer (i7). */
|
if (X_OP (insn) == 3
|
if (X_OP (insn) == 3
|
&& X_RD (insn) == 31
|
&& X_RD (insn) == 31
|
&& X_OP3 (insn) == 4
|
&& X_OP3 (insn) == 4
|
&& X_RS1 (insn) == 14)
|
&& X_RS1 (insn) == 14)
|
{
|
{
|
pc += 4;
|
pc += 4;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
|
|
/* Recognize sub %sp, <anything>, %i7. */
|
/* Recognize sub %sp, <anything>, %i7. */
|
if (X_OP (insn) == 2
|
if (X_OP (insn) == 2
|
&& X_OP3 (insn) == 4
|
&& X_OP3 (insn) == 4
|
&& X_RS1 (insn) == 14
|
&& X_RS1 (insn) == 14
|
&& X_RD (insn) == 31)
|
&& X_RD (insn) == 31)
|
{
|
{
|
pc += 4;
|
pc += 4;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
}
|
}
|
else
|
else
|
return pc;
|
return pc;
|
}
|
}
|
else
|
else
|
return pc;
|
return pc;
|
}
|
}
|
else
|
else
|
/* Without a save or add instruction, it's not a prologue. */
|
/* Without a save or add instruction, it's not a prologue. */
|
return start_pc;
|
return start_pc;
|
|
|
while (1)
|
while (1)
|
{
|
{
|
/* Recognize stores into the frame from the input registers.
|
/* Recognize stores into the frame from the input registers.
|
This recognizes all non alternate stores of input register,
|
This recognizes all non alternate stores of input register,
|
into a location offset from the frame pointer. */
|
into a location offset from the frame pointer. */
|
if ((X_OP (insn) == 3
|
if ((X_OP (insn) == 3
|
&& (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */
|
&& (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */
|
&& (X_RD (insn) & 0x18) == 0x18 /* Input register. */
|
&& (X_RD (insn) & 0x18) == 0x18 /* Input register. */
|
&& X_I (insn) /* Immediate mode. */
|
&& X_I (insn) /* Immediate mode. */
|
&& X_RS1 (insn) == 30 /* Off of frame pointer. */
|
&& X_RS1 (insn) == 30 /* Off of frame pointer. */
|
/* Into reserved stack space. */
|
/* Into reserved stack space. */
|
&& X_SIMM13 (insn) >= 0x44
|
&& X_SIMM13 (insn) >= 0x44
|
&& X_SIMM13 (insn) < 0x5b))
|
&& X_SIMM13 (insn) < 0x5b))
|
;
|
;
|
else if (is_flat
|
else if (is_flat
|
&& X_OP (insn) == 3
|
&& X_OP (insn) == 3
|
&& X_OP3 (insn) == 4
|
&& X_OP3 (insn) == 4
|
&& X_RS1 (insn) == 14
|
&& X_RS1 (insn) == 14
|
)
|
)
|
{
|
{
|
if (saved_regs && X_I (insn))
|
if (saved_regs && X_I (insn))
|
saved_regs->regs[X_RD (insn)] =
|
saved_regs->regs[X_RD (insn)] =
|
fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
fi->frame + fi->sp_offset + X_SIMM13 (insn);
|
}
|
}
|
else
|
else
|
break;
|
break;
|
pc += 4;
|
pc += 4;
|
insn = fetch_instruction (pc);
|
insn = fetch_instruction (pc);
|
}
|
}
|
|
|
return pc;
|
return pc;
|
}
|
}
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_skip_prologue (start_pc, frameless_p)
|
sparc_skip_prologue (start_pc, frameless_p)
|
CORE_ADDR start_pc;
|
CORE_ADDR start_pc;
|
int frameless_p;
|
int frameless_p;
|
{
|
{
|
return examine_prologue (start_pc, frameless_p, NULL, NULL);
|
return examine_prologue (start_pc, frameless_p, NULL, NULL);
|
}
|
}
|
|
|
/* Check instruction at ADDR to see if it is a branch.
|
/* Check instruction at ADDR to see if it is a branch.
|
All non-annulled instructions will go to NPC or will trap.
|
All non-annulled instructions will go to NPC or will trap.
|
Set *TARGET if we find a candidate branch; set to zero if not.
|
Set *TARGET if we find a candidate branch; set to zero if not.
|
|
|
This isn't static as it's used by remote-sa.sparc.c. */
|
This isn't static as it's used by remote-sa.sparc.c. */
|
|
|
static branch_type
|
static branch_type
|
isbranch (instruction, addr, target)
|
isbranch (instruction, addr, target)
|
long instruction;
|
long instruction;
|
CORE_ADDR addr, *target;
|
CORE_ADDR addr, *target;
|
{
|
{
|
branch_type val = not_branch;
|
branch_type val = not_branch;
|
long int offset = 0; /* Must be signed for sign-extend. */
|
long int offset = 0; /* Must be signed for sign-extend. */
|
|
|
*target = 0;
|
*target = 0;
|
|
|
if (X_OP (instruction) == 0
|
if (X_OP (instruction) == 0
|
&& (X_OP2 (instruction) == 2
|
&& (X_OP2 (instruction) == 2
|
|| X_OP2 (instruction) == 6
|
|| X_OP2 (instruction) == 6
|
|| X_OP2 (instruction) == 1
|
|| X_OP2 (instruction) == 1
|
|| X_OP2 (instruction) == 3
|
|| X_OP2 (instruction) == 3
|
|| X_OP2 (instruction) == 5
|
|| X_OP2 (instruction) == 5
|
#ifndef GDB_TARGET_IS_SPARC64
|
#ifndef GDB_TARGET_IS_SPARC64
|
|| X_OP2 (instruction) == 7
|
|| X_OP2 (instruction) == 7
|
#endif
|
#endif
|
))
|
))
|
{
|
{
|
if (X_COND (instruction) == 8)
|
if (X_COND (instruction) == 8)
|
val = X_A (instruction) ? baa : ba;
|
val = X_A (instruction) ? baa : ba;
|
else
|
else
|
val = X_A (instruction) ? bicca : bicc;
|
val = X_A (instruction) ? bicca : bicc;
|
switch (X_OP2 (instruction))
|
switch (X_OP2 (instruction))
|
{
|
{
|
case 2:
|
case 2:
|
case 6:
|
case 6:
|
#ifndef GDB_TARGET_IS_SPARC64
|
#ifndef GDB_TARGET_IS_SPARC64
|
case 7:
|
case 7:
|
#endif
|
#endif
|
offset = 4 * X_DISP22 (instruction);
|
offset = 4 * X_DISP22 (instruction);
|
break;
|
break;
|
case 1:
|
case 1:
|
case 5:
|
case 5:
|
offset = 4 * X_DISP19 (instruction);
|
offset = 4 * X_DISP19 (instruction);
|
break;
|
break;
|
case 3:
|
case 3:
|
offset = 4 * X_DISP16 (instruction);
|
offset = 4 * X_DISP16 (instruction);
|
break;
|
break;
|
}
|
}
|
*target = addr + offset;
|
*target = addr + offset;
|
}
|
}
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
else if (X_OP (instruction) == 2
|
else if (X_OP (instruction) == 2
|
&& X_OP3 (instruction) == 62)
|
&& X_OP3 (instruction) == 62)
|
{
|
{
|
if (X_FCN (instruction) == 0)
|
if (X_FCN (instruction) == 0)
|
{
|
{
|
/* done */
|
/* done */
|
*target = read_register (TNPC_REGNUM);
|
*target = read_register (TNPC_REGNUM);
|
val = done_retry;
|
val = done_retry;
|
}
|
}
|
else if (X_FCN (instruction) == 1)
|
else if (X_FCN (instruction) == 1)
|
{
|
{
|
/* retry */
|
/* retry */
|
*target = read_register (TPC_REGNUM);
|
*target = read_register (TPC_REGNUM);
|
val = done_retry;
|
val = done_retry;
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
|
|
return val;
|
return val;
|
}
|
}
|
|
|
/* Find register number REGNUM relative to FRAME and put its
|
/* Find register number REGNUM relative to FRAME and put its
|
(raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
|
(raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
|
was optimized out (and thus can't be fetched). If the variable
|
was optimized out (and thus can't be fetched). If the variable
|
was fetched from memory, set *ADDRP to where it was fetched from,
|
was fetched from memory, set *ADDRP to where it was fetched from,
|
otherwise it was fetched from a register.
|
otherwise it was fetched from a register.
|
|
|
The argument RAW_BUFFER must point to aligned memory. */
|
The argument RAW_BUFFER must point to aligned memory. */
|
|
|
void
|
void
|
sparc_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
|
sparc_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
|
char *raw_buffer;
|
char *raw_buffer;
|
int *optimized;
|
int *optimized;
|
CORE_ADDR *addrp;
|
CORE_ADDR *addrp;
|
struct frame_info *frame;
|
struct frame_info *frame;
|
int regnum;
|
int regnum;
|
enum lval_type *lval;
|
enum lval_type *lval;
|
{
|
{
|
struct frame_info *frame1;
|
struct frame_info *frame1;
|
CORE_ADDR addr;
|
CORE_ADDR addr;
|
|
|
if (!target_has_registers)
|
if (!target_has_registers)
|
error ("No registers.");
|
error ("No registers.");
|
|
|
if (optimized)
|
if (optimized)
|
*optimized = 0;
|
*optimized = 0;
|
|
|
addr = 0;
|
addr = 0;
|
|
|
/* FIXME This code extracted from infcmd.c; should put elsewhere! */
|
/* FIXME This code extracted from infcmd.c; should put elsewhere! */
|
if (frame == NULL)
|
if (frame == NULL)
|
{
|
{
|
/* error ("No selected frame."); */
|
/* error ("No selected frame."); */
|
if (!target_has_registers)
|
if (!target_has_registers)
|
error ("The program has no registers now.");
|
error ("The program has no registers now.");
|
if (selected_frame == NULL)
|
if (selected_frame == NULL)
|
error ("No selected frame.");
|
error ("No selected frame.");
|
/* Try to use selected frame */
|
/* Try to use selected frame */
|
frame = get_prev_frame (selected_frame);
|
frame = get_prev_frame (selected_frame);
|
if (frame == 0)
|
if (frame == 0)
|
error ("Cmd not meaningful in the outermost frame.");
|
error ("Cmd not meaningful in the outermost frame.");
|
}
|
}
|
|
|
|
|
frame1 = frame->next;
|
frame1 = frame->next;
|
|
|
/* Get saved PC from the frame info if not in innermost frame. */
|
/* Get saved PC from the frame info if not in innermost frame. */
|
if (regnum == PC_REGNUM && frame1 != NULL)
|
if (regnum == PC_REGNUM && frame1 != NULL)
|
{
|
{
|
if (lval != NULL)
|
if (lval != NULL)
|
*lval = not_lval;
|
*lval = not_lval;
|
if (raw_buffer != NULL)
|
if (raw_buffer != NULL)
|
{
|
{
|
/* Put it back in target format. */
|
/* Put it back in target format. */
|
store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
|
store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
|
}
|
}
|
if (addrp != NULL)
|
if (addrp != NULL)
|
*addrp = 0;
|
*addrp = 0;
|
return;
|
return;
|
}
|
}
|
|
|
while (frame1 != NULL)
|
while (frame1 != NULL)
|
{
|
{
|
if (frame1->pc >= (frame1->bottom ? frame1->bottom :
|
if (frame1->pc >= (frame1->bottom ? frame1->bottom :
|
read_sp ())
|
read_sp ())
|
&& frame1->pc <= FRAME_FP (frame1))
|
&& frame1->pc <= FRAME_FP (frame1))
|
{
|
{
|
/* Dummy frame. All but the window regs are in there somewhere.
|
/* Dummy frame. All but the window regs are in there somewhere.
|
The window registers are saved on the stack, just like in a
|
The window registers are saved on the stack, just like in a
|
normal frame. */
|
normal frame. */
|
if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7)
|
if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7)
|
addr = frame1->frame + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
|
addr = frame1->frame + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
|
- (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE);
|
- (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE);
|
else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
|
else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
|
addr = (frame1->prev->bottom
|
addr = (frame1->prev->bottom
|
+ (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
+ (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_I0);
|
+ FRAME_SAVED_I0);
|
else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
|
else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
|
addr = (frame1->prev->bottom
|
addr = (frame1->prev->bottom
|
+ (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
+ (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_L0);
|
+ FRAME_SAVED_L0);
|
else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
|
else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
|
addr = frame1->frame + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
|
addr = frame1->frame + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
|
- (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE);
|
- (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE);
|
#ifdef FP0_REGNUM
|
#ifdef FP0_REGNUM
|
else if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32)
|
else if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32)
|
addr = frame1->frame + (regnum - FP0_REGNUM) * 4
|
addr = frame1->frame + (regnum - FP0_REGNUM) * 4
|
- (FP_REGISTER_BYTES);
|
- (FP_REGISTER_BYTES);
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
else if (regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM)
|
else if (regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM)
|
addr = frame1->frame + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8
|
addr = frame1->frame + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8
|
- (FP_REGISTER_BYTES);
|
- (FP_REGISTER_BYTES);
|
#endif
|
#endif
|
#endif /* FP0_REGNUM */
|
#endif /* FP0_REGNUM */
|
else if (regnum >= Y_REGNUM && regnum < NUM_REGS)
|
else if (regnum >= Y_REGNUM && regnum < NUM_REGS)
|
addr = frame1->frame + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
|
addr = frame1->frame + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
|
- (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE);
|
- (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE);
|
}
|
}
|
else if (frame1->flat)
|
else if (frame1->flat)
|
{
|
{
|
|
|
if (regnum == RP_REGNUM)
|
if (regnum == RP_REGNUM)
|
addr = frame1->pc_addr;
|
addr = frame1->pc_addr;
|
else if (regnum == I7_REGNUM)
|
else if (regnum == I7_REGNUM)
|
addr = frame1->fp_addr;
|
addr = frame1->fp_addr;
|
else
|
else
|
{
|
{
|
CORE_ADDR func_start;
|
CORE_ADDR func_start;
|
struct frame_saved_regs regs;
|
struct frame_saved_regs regs;
|
memset (®s, 0, sizeof (regs));
|
memset (®s, 0, sizeof (regs));
|
|
|
find_pc_partial_function (frame1->pc, NULL, &func_start, NULL);
|
find_pc_partial_function (frame1->pc, NULL, &func_start, NULL);
|
examine_prologue (func_start, 0, frame1, ®s);
|
examine_prologue (func_start, 0, frame1, ®s);
|
addr = regs.regs[regnum];
|
addr = regs.regs[regnum];
|
}
|
}
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Normal frame. Local and In registers are saved on stack. */
|
/* Normal frame. Local and In registers are saved on stack. */
|
if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
|
if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8)
|
addr = (frame1->prev->bottom
|
addr = (frame1->prev->bottom
|
+ (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
+ (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_I0);
|
+ FRAME_SAVED_I0);
|
else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
|
else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8)
|
addr = (frame1->prev->bottom
|
addr = (frame1->prev->bottom
|
+ (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
+ (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_L0);
|
+ FRAME_SAVED_L0);
|
else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
|
else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8)
|
{
|
{
|
/* Outs become ins. */
|
/* Outs become ins. */
|
get_saved_register (raw_buffer, optimized, addrp, frame1,
|
get_saved_register (raw_buffer, optimized, addrp, frame1,
|
(regnum - O0_REGNUM + I0_REGNUM), lval);
|
(regnum - O0_REGNUM + I0_REGNUM), lval);
|
return;
|
return;
|
}
|
}
|
}
|
}
|
if (addr != 0)
|
if (addr != 0)
|
break;
|
break;
|
frame1 = frame1->next;
|
frame1 = frame1->next;
|
}
|
}
|
if (addr != 0)
|
if (addr != 0)
|
{
|
{
|
if (lval != NULL)
|
if (lval != NULL)
|
*lval = lval_memory;
|
*lval = lval_memory;
|
if (regnum == SP_REGNUM)
|
if (regnum == SP_REGNUM)
|
{
|
{
|
if (raw_buffer != NULL)
|
if (raw_buffer != NULL)
|
{
|
{
|
/* Put it back in target format. */
|
/* Put it back in target format. */
|
store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr);
|
store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr);
|
}
|
}
|
if (addrp != NULL)
|
if (addrp != NULL)
|
*addrp = 0;
|
*addrp = 0;
|
return;
|
return;
|
}
|
}
|
if (raw_buffer != NULL)
|
if (raw_buffer != NULL)
|
read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
|
read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
|
}
|
}
|
else
|
else
|
{
|
{
|
if (lval != NULL)
|
if (lval != NULL)
|
*lval = lval_register;
|
*lval = lval_register;
|
addr = REGISTER_BYTE (regnum);
|
addr = REGISTER_BYTE (regnum);
|
if (raw_buffer != NULL)
|
if (raw_buffer != NULL)
|
read_register_gen (regnum, raw_buffer);
|
read_register_gen (regnum, raw_buffer);
|
}
|
}
|
if (addrp != NULL)
|
if (addrp != NULL)
|
*addrp = addr;
|
*addrp = addr;
|
}
|
}
|
|
|
/* Push an empty stack frame, and record in it the current PC, regs, etc.
|
/* Push an empty stack frame, and record in it the current PC, regs, etc.
|
|
|
We save the non-windowed registers and the ins. The locals and outs
|
We save the non-windowed registers and the ins. The locals and outs
|
are new; they don't need to be saved. The i's and l's of
|
are new; they don't need to be saved. The i's and l's of
|
the last frame were already saved on the stack. */
|
the last frame were already saved on the stack. */
|
|
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
|
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
#define DUMMY_REG_SAVE_OFFSET (128 + 16)
|
#define DUMMY_REG_SAVE_OFFSET (128 + 16)
|
#else
|
#else
|
#define DUMMY_REG_SAVE_OFFSET 0x60
|
#define DUMMY_REG_SAVE_OFFSET 0x60
|
#endif
|
#endif
|
|
|
/* See tm-sparc.h for how this is calculated. */
|
/* See tm-sparc.h for how this is calculated. */
|
#ifdef FP0_REGNUM
|
#ifdef FP0_REGNUM
|
#define DUMMY_STACK_REG_BUF_SIZE \
|
#define DUMMY_STACK_REG_BUF_SIZE \
|
(((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
|
(((8+8+8) * SPARC_INTREG_SIZE) + FP_REGISTER_BYTES)
|
#else
|
#else
|
#define DUMMY_STACK_REG_BUF_SIZE \
|
#define DUMMY_STACK_REG_BUF_SIZE \
|
(((8+8+8) * SPARC_INTREG_SIZE) )
|
(((8+8+8) * SPARC_INTREG_SIZE) )
|
#endif /* FP0_REGNUM */
|
#endif /* FP0_REGNUM */
|
#define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
|
#define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET)
|
|
|
void
|
void
|
sparc_push_dummy_frame ()
|
sparc_push_dummy_frame ()
|
{
|
{
|
CORE_ADDR sp, old_sp;
|
CORE_ADDR sp, old_sp;
|
char register_temp[DUMMY_STACK_SIZE];
|
char register_temp[DUMMY_STACK_SIZE];
|
|
|
old_sp = sp = read_sp ();
|
old_sp = sp = read_sp ();
|
|
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
/* PC, NPC, CCR, FSR, FPRS, Y, ASI */
|
/* PC, NPC, CCR, FSR, FPRS, Y, ASI */
|
read_register_bytes (REGISTER_BYTE (PC_REGNUM), ®ister_temp[0],
|
read_register_bytes (REGISTER_BYTE (PC_REGNUM), ®ister_temp[0],
|
REGISTER_RAW_SIZE (PC_REGNUM) * 7);
|
REGISTER_RAW_SIZE (PC_REGNUM) * 7);
|
read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM), ®ister_temp[8],
|
read_register_bytes (REGISTER_BYTE (PSTATE_REGNUM), ®ister_temp[8],
|
REGISTER_RAW_SIZE (PSTATE_REGNUM));
|
REGISTER_RAW_SIZE (PSTATE_REGNUM));
|
/* FIXME: not sure what needs to be saved here. */
|
/* FIXME: not sure what needs to be saved here. */
|
#else
|
#else
|
/* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
|
/* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
|
read_register_bytes (REGISTER_BYTE (Y_REGNUM), ®ister_temp[0],
|
read_register_bytes (REGISTER_BYTE (Y_REGNUM), ®ister_temp[0],
|
REGISTER_RAW_SIZE (Y_REGNUM) * 8);
|
REGISTER_RAW_SIZE (Y_REGNUM) * 8);
|
#endif
|
#endif
|
|
|
read_register_bytes (REGISTER_BYTE (O0_REGNUM),
|
read_register_bytes (REGISTER_BYTE (O0_REGNUM),
|
®ister_temp[8 * SPARC_INTREG_SIZE],
|
®ister_temp[8 * SPARC_INTREG_SIZE],
|
SPARC_INTREG_SIZE * 8);
|
SPARC_INTREG_SIZE * 8);
|
|
|
read_register_bytes (REGISTER_BYTE (G0_REGNUM),
|
read_register_bytes (REGISTER_BYTE (G0_REGNUM),
|
®ister_temp[16 * SPARC_INTREG_SIZE],
|
®ister_temp[16 * SPARC_INTREG_SIZE],
|
SPARC_INTREG_SIZE * 8);
|
SPARC_INTREG_SIZE * 8);
|
|
|
#ifdef FP0_REGNUM
|
#ifdef FP0_REGNUM
|
read_register_bytes (REGISTER_BYTE (FP0_REGNUM),
|
read_register_bytes (REGISTER_BYTE (FP0_REGNUM),
|
®ister_temp[24 * SPARC_INTREG_SIZE],
|
®ister_temp[24 * SPARC_INTREG_SIZE],
|
FP_REGISTER_BYTES);
|
FP_REGISTER_BYTES);
|
#endif /* FP0_REGNUM */
|
#endif /* FP0_REGNUM */
|
|
|
sp -= DUMMY_STACK_SIZE;
|
sp -= DUMMY_STACK_SIZE;
|
|
|
write_sp (sp);
|
write_sp (sp);
|
|
|
write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0],
|
write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0],
|
DUMMY_STACK_REG_BUF_SIZE);
|
DUMMY_STACK_REG_BUF_SIZE);
|
|
|
if (strcmp (target_shortname, "sim") != 0)
|
if (strcmp (target_shortname, "sim") != 0)
|
{
|
{
|
write_fp (old_sp);
|
write_fp (old_sp);
|
|
|
/* Set return address register for the call dummy to the current PC. */
|
/* Set return address register for the call dummy to the current PC. */
|
write_register (I7_REGNUM, read_pc () - 8);
|
write_register (I7_REGNUM, read_pc () - 8);
|
}
|
}
|
else
|
else
|
{
|
{
|
/* The call dummy will write this value to FP before executing
|
/* The call dummy will write this value to FP before executing
|
the 'save'. This ensures that register window flushes work
|
the 'save'. This ensures that register window flushes work
|
correctly in the simulator. */
|
correctly in the simulator. */
|
write_register (G0_REGNUM + 1, read_register (FP_REGNUM));
|
write_register (G0_REGNUM + 1, read_register (FP_REGNUM));
|
|
|
/* The call dummy will write this value to FP after executing
|
/* The call dummy will write this value to FP after executing
|
the 'save'. */
|
the 'save'. */
|
write_register (G0_REGNUM + 2, old_sp);
|
write_register (G0_REGNUM + 2, old_sp);
|
|
|
/* The call dummy will write this value to the return address (%i7) after
|
/* The call dummy will write this value to the return address (%i7) after
|
executing the 'save'. */
|
executing the 'save'. */
|
write_register (G0_REGNUM + 3, read_pc () - 8);
|
write_register (G0_REGNUM + 3, read_pc () - 8);
|
|
|
/* Set the FP that the call dummy will be using after the 'save'.
|
/* Set the FP that the call dummy will be using after the 'save'.
|
This makes backtraces from an inferior function call work properly. */
|
This makes backtraces from an inferior function call work properly. */
|
write_register (FP_REGNUM, old_sp);
|
write_register (FP_REGNUM, old_sp);
|
}
|
}
|
}
|
}
|
|
|
/* sparc_frame_find_saved_regs (). This function is here only because
|
/* sparc_frame_find_saved_regs (). This function is here only because
|
pop_frame uses it. Note there is an interesting corner case which
|
pop_frame uses it. Note there is an interesting corner case which
|
I think few ports of GDB get right--if you are popping a frame
|
I think few ports of GDB get right--if you are popping a frame
|
which does not save some register that *is* saved by a more inner
|
which does not save some register that *is* saved by a more inner
|
frame (such a frame will never be a dummy frame because dummy
|
frame (such a frame will never be a dummy frame because dummy
|
frames save all registers). Rewriting pop_frame to use
|
frames save all registers). Rewriting pop_frame to use
|
get_saved_register would solve this problem and also get rid of the
|
get_saved_register would solve this problem and also get rid of the
|
ugly duplication between sparc_frame_find_saved_regs and
|
ugly duplication between sparc_frame_find_saved_regs and
|
get_saved_register.
|
get_saved_register.
|
|
|
Stores, into a struct frame_saved_regs,
|
Stores, into a struct frame_saved_regs,
|
the addresses of the saved registers of frame described by FRAME_INFO.
|
the addresses of the saved registers of frame described by FRAME_INFO.
|
This includes special registers such as pc and fp saved in special
|
This includes special registers such as pc and fp saved in special
|
ways in the stack frame. sp is even more special:
|
ways in the stack frame. sp is even more special:
|
the address we return for it IS the sp for the next frame.
|
the address we return for it IS the sp for the next frame.
|
|
|
Note that on register window machines, we are currently making the
|
Note that on register window machines, we are currently making the
|
assumption that window registers are being saved somewhere in the
|
assumption that window registers are being saved somewhere in the
|
frame in which they are being used. If they are stored in an
|
frame in which they are being used. If they are stored in an
|
inferior frame, find_saved_register will break.
|
inferior frame, find_saved_register will break.
|
|
|
On the Sun 4, the only time all registers are saved is when
|
On the Sun 4, the only time all registers are saved is when
|
a dummy frame is involved. Otherwise, the only saved registers
|
a dummy frame is involved. Otherwise, the only saved registers
|
are the LOCAL and IN registers which are saved as a result
|
are the LOCAL and IN registers which are saved as a result
|
of the "save/restore" opcodes. This condition is determined
|
of the "save/restore" opcodes. This condition is determined
|
by address rather than by value.
|
by address rather than by value.
|
|
|
The "pc" is not stored in a frame on the SPARC. (What is stored
|
The "pc" is not stored in a frame on the SPARC. (What is stored
|
is a return address minus 8.) sparc_pop_frame knows how to
|
is a return address minus 8.) sparc_pop_frame knows how to
|
deal with that. Other routines might or might not.
|
deal with that. Other routines might or might not.
|
|
|
See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
|
See tm-sparc.h (PUSH_DUMMY_FRAME and friends) for CRITICAL information
|
about how this works. */
|
about how this works. */
|
|
|
static void sparc_frame_find_saved_regs PARAMS ((struct frame_info *,
|
static void sparc_frame_find_saved_regs PARAMS ((struct frame_info *,
|
struct frame_saved_regs *));
|
struct frame_saved_regs *));
|
|
|
static void
|
static void
|
sparc_frame_find_saved_regs (fi, saved_regs_addr)
|
sparc_frame_find_saved_regs (fi, saved_regs_addr)
|
struct frame_info *fi;
|
struct frame_info *fi;
|
struct frame_saved_regs *saved_regs_addr;
|
struct frame_saved_regs *saved_regs_addr;
|
{
|
{
|
register int regnum;
|
register int regnum;
|
CORE_ADDR frame_addr = FRAME_FP (fi);
|
CORE_ADDR frame_addr = FRAME_FP (fi);
|
|
|
if (!fi)
|
if (!fi)
|
internal_error ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
|
internal_error ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
|
|
|
memset (saved_regs_addr, 0, sizeof (*saved_regs_addr));
|
memset (saved_regs_addr, 0, sizeof (*saved_regs_addr));
|
|
|
if (fi->pc >= (fi->bottom ? fi->bottom :
|
if (fi->pc >= (fi->bottom ? fi->bottom :
|
read_sp ())
|
read_sp ())
|
&& fi->pc <= FRAME_FP (fi))
|
&& fi->pc <= FRAME_FP (fi))
|
{
|
{
|
/* Dummy frame. All but the window regs are in there somewhere. */
|
/* Dummy frame. All but the window regs are in there somewhere. */
|
for (regnum = G1_REGNUM; regnum < G1_REGNUM + 7; regnum++)
|
for (regnum = G1_REGNUM; regnum < G1_REGNUM + 7; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
|
frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE
|
- DUMMY_STACK_REG_BUF_SIZE + 16 * SPARC_INTREG_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE + 16 * SPARC_INTREG_SIZE;
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
- DUMMY_STACK_REG_BUF_SIZE + 8 * SPARC_INTREG_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE + 8 * SPARC_INTREG_SIZE;
|
#ifdef FP0_REGNUM
|
#ifdef FP0_REGNUM
|
for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++)
|
for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + (regnum - FP0_REGNUM) * 4
|
frame_addr + (regnum - FP0_REGNUM) * 4
|
- DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
for (regnum = FP0_REGNUM + 32; regnum < FP_MAX_REGNUM; regnum++)
|
for (regnum = FP0_REGNUM + 32; regnum < FP_MAX_REGNUM; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + 32 * 4 + (regnum - FP0_REGNUM - 32) * 4
|
frame_addr + 32 * 4 + (regnum - FP0_REGNUM - 32) * 4
|
- DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE + 24 * SPARC_INTREG_SIZE;
|
#endif
|
#endif
|
#endif /* FP0_REGNUM */
|
#endif /* FP0_REGNUM */
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
for (regnum = PC_REGNUM; regnum < PC_REGNUM + 7; regnum++)
|
for (regnum = PC_REGNUM; regnum < PC_REGNUM + 7; regnum++)
|
{
|
{
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + (regnum - PC_REGNUM) * SPARC_INTREG_SIZE
|
frame_addr + (regnum - PC_REGNUM) * SPARC_INTREG_SIZE
|
- DUMMY_STACK_REG_BUF_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE;
|
}
|
}
|
saved_regs_addr->regs[PSTATE_REGNUM] =
|
saved_regs_addr->regs[PSTATE_REGNUM] =
|
frame_addr + 8 * SPARC_INTREG_SIZE - DUMMY_STACK_REG_BUF_SIZE;
|
frame_addr + 8 * SPARC_INTREG_SIZE - DUMMY_STACK_REG_BUF_SIZE;
|
#else
|
#else
|
for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++)
|
for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
|
frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE
|
- DUMMY_STACK_REG_BUF_SIZE;
|
- DUMMY_STACK_REG_BUF_SIZE;
|
#endif
|
#endif
|
frame_addr = fi->bottom ?
|
frame_addr = fi->bottom ?
|
fi->bottom : read_sp ();
|
fi->bottom : read_sp ();
|
}
|
}
|
else if (fi->flat)
|
else if (fi->flat)
|
{
|
{
|
CORE_ADDR func_start;
|
CORE_ADDR func_start;
|
find_pc_partial_function (fi->pc, NULL, &func_start, NULL);
|
find_pc_partial_function (fi->pc, NULL, &func_start, NULL);
|
examine_prologue (func_start, 0, fi, saved_regs_addr);
|
examine_prologue (func_start, 0, fi, saved_regs_addr);
|
|
|
/* Flat register window frame. */
|
/* Flat register window frame. */
|
saved_regs_addr->regs[RP_REGNUM] = fi->pc_addr;
|
saved_regs_addr->regs[RP_REGNUM] = fi->pc_addr;
|
saved_regs_addr->regs[I7_REGNUM] = fi->fp_addr;
|
saved_regs_addr->regs[I7_REGNUM] = fi->fp_addr;
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Normal frame. Just Local and In registers */
|
/* Normal frame. Just Local and In registers */
|
frame_addr = fi->bottom ?
|
frame_addr = fi->bottom ?
|
fi->bottom : read_sp ();
|
fi->bottom : read_sp ();
|
for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; regnum++)
|
for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
(frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
(frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_L0);
|
+ FRAME_SAVED_L0);
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
(frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
(frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_I0);
|
+ FRAME_SAVED_I0);
|
}
|
}
|
if (fi->next)
|
if (fi->next)
|
{
|
{
|
if (fi->flat)
|
if (fi->flat)
|
{
|
{
|
saved_regs_addr->regs[O7_REGNUM] = fi->pc_addr;
|
saved_regs_addr->regs[O7_REGNUM] = fi->pc_addr;
|
}
|
}
|
else
|
else
|
{
|
{
|
/* Pull off either the next frame pointer or the stack pointer */
|
/* Pull off either the next frame pointer or the stack pointer */
|
CORE_ADDR next_next_frame_addr =
|
CORE_ADDR next_next_frame_addr =
|
(fi->next->bottom ?
|
(fi->next->bottom ?
|
fi->next->bottom :
|
fi->next->bottom :
|
read_sp ());
|
read_sp ());
|
for (regnum = O0_REGNUM; regnum < O0_REGNUM + 8; regnum++)
|
for (regnum = O0_REGNUM; regnum < O0_REGNUM + 8; regnum++)
|
saved_regs_addr->regs[regnum] =
|
saved_regs_addr->regs[regnum] =
|
(next_next_frame_addr
|
(next_next_frame_addr
|
+ (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
|
+ (regnum - O0_REGNUM) * SPARC_INTREG_SIZE
|
+ FRAME_SAVED_I0);
|
+ FRAME_SAVED_I0);
|
}
|
}
|
}
|
}
|
/* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
|
/* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
|
/* FIXME -- should this adjust for the sparc64 offset? */
|
/* FIXME -- should this adjust for the sparc64 offset? */
|
saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi);
|
saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi);
|
}
|
}
|
|
|
/* Discard from the stack the innermost frame, restoring all saved registers.
|
/* Discard from the stack the innermost frame, restoring all saved registers.
|
|
|
Note that the values stored in fsr by get_frame_saved_regs are *in
|
Note that the values stored in fsr by get_frame_saved_regs are *in
|
the context of the called frame*. What this means is that the i
|
the context of the called frame*. What this means is that the i
|
regs of fsr must be restored into the o regs of the (calling) frame that
|
regs of fsr must be restored into the o regs of the (calling) frame that
|
we pop into. We don't care about the output regs of the calling frame,
|
we pop into. We don't care about the output regs of the calling frame,
|
since unless it's a dummy frame, it won't have any output regs in it.
|
since unless it's a dummy frame, it won't have any output regs in it.
|
|
|
We never have to bother with %l (local) regs, since the called routine's
|
We never have to bother with %l (local) regs, since the called routine's
|
locals get tossed, and the calling routine's locals are already saved
|
locals get tossed, and the calling routine's locals are already saved
|
on its stack. */
|
on its stack. */
|
|
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
|
|
void
|
void
|
sparc_pop_frame ()
|
sparc_pop_frame ()
|
{
|
{
|
register struct frame_info *frame = get_current_frame ();
|
register struct frame_info *frame = get_current_frame ();
|
register CORE_ADDR pc;
|
register CORE_ADDR pc;
|
struct frame_saved_regs fsr;
|
struct frame_saved_regs fsr;
|
char raw_buffer[REGISTER_BYTES];
|
char raw_buffer[REGISTER_BYTES];
|
int regnum;
|
int regnum;
|
|
|
sparc_frame_find_saved_regs (frame, &fsr);
|
sparc_frame_find_saved_regs (frame, &fsr);
|
#ifdef FP0_REGNUM
|
#ifdef FP0_REGNUM
|
if (fsr.regs[FP0_REGNUM])
|
if (fsr.regs[FP0_REGNUM])
|
{
|
{
|
read_memory (fsr.regs[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES);
|
read_memory (fsr.regs[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES);
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM),
|
raw_buffer, FP_REGISTER_BYTES);
|
raw_buffer, FP_REGISTER_BYTES);
|
}
|
}
|
#ifndef GDB_TARGET_IS_SPARC64
|
#ifndef GDB_TARGET_IS_SPARC64
|
if (fsr.regs[FPS_REGNUM])
|
if (fsr.regs[FPS_REGNUM])
|
{
|
{
|
read_memory (fsr.regs[FPS_REGNUM], raw_buffer, 4);
|
read_memory (fsr.regs[FPS_REGNUM], raw_buffer, 4);
|
write_register_bytes (REGISTER_BYTE (FPS_REGNUM), raw_buffer, 4);
|
write_register_bytes (REGISTER_BYTE (FPS_REGNUM), raw_buffer, 4);
|
}
|
}
|
if (fsr.regs[CPS_REGNUM])
|
if (fsr.regs[CPS_REGNUM])
|
{
|
{
|
read_memory (fsr.regs[CPS_REGNUM], raw_buffer, 4);
|
read_memory (fsr.regs[CPS_REGNUM], raw_buffer, 4);
|
write_register_bytes (REGISTER_BYTE (CPS_REGNUM), raw_buffer, 4);
|
write_register_bytes (REGISTER_BYTE (CPS_REGNUM), raw_buffer, 4);
|
}
|
}
|
#endif
|
#endif
|
#endif /* FP0_REGNUM */
|
#endif /* FP0_REGNUM */
|
if (fsr.regs[G1_REGNUM])
|
if (fsr.regs[G1_REGNUM])
|
{
|
{
|
read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE);
|
read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE);
|
write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer,
|
write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer,
|
7 * SPARC_INTREG_SIZE);
|
7 * SPARC_INTREG_SIZE);
|
}
|
}
|
|
|
if (frame->flat)
|
if (frame->flat)
|
{
|
{
|
/* Each register might or might not have been saved, need to test
|
/* Each register might or might not have been saved, need to test
|
individually. */
|
individually. */
|
for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum)
|
for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum)
|
if (fsr.regs[regnum])
|
if (fsr.regs[regnum])
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
SPARC_INTREG_SIZE));
|
SPARC_INTREG_SIZE));
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum)
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum)
|
if (fsr.regs[regnum])
|
if (fsr.regs[regnum])
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
SPARC_INTREG_SIZE));
|
SPARC_INTREG_SIZE));
|
|
|
/* Handle all outs except stack pointer (o0-o5; o7). */
|
/* Handle all outs except stack pointer (o0-o5; o7). */
|
for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum)
|
for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum)
|
if (fsr.regs[regnum])
|
if (fsr.regs[regnum])
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
write_register (regnum, read_memory_integer (fsr.regs[regnum],
|
SPARC_INTREG_SIZE));
|
SPARC_INTREG_SIZE));
|
if (fsr.regs[O0_REGNUM + 7])
|
if (fsr.regs[O0_REGNUM + 7])
|
write_register (O0_REGNUM + 7,
|
write_register (O0_REGNUM + 7,
|
read_memory_integer (fsr.regs[O0_REGNUM + 7],
|
read_memory_integer (fsr.regs[O0_REGNUM + 7],
|
SPARC_INTREG_SIZE));
|
SPARC_INTREG_SIZE));
|
|
|
write_sp (frame->frame);
|
write_sp (frame->frame);
|
}
|
}
|
else if (fsr.regs[I0_REGNUM])
|
else if (fsr.regs[I0_REGNUM])
|
{
|
{
|
CORE_ADDR sp;
|
CORE_ADDR sp;
|
|
|
char reg_temp[REGISTER_BYTES];
|
char reg_temp[REGISTER_BYTES];
|
|
|
read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE);
|
read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE);
|
|
|
/* Get the ins and locals which we are about to restore. Just
|
/* Get the ins and locals which we are about to restore. Just
|
moving the stack pointer is all that is really needed, except
|
moving the stack pointer is all that is really needed, except
|
store_inferior_registers is then going to write the ins and
|
store_inferior_registers is then going to write the ins and
|
locals from the registers array, so we need to muck with the
|
locals from the registers array, so we need to muck with the
|
registers array. */
|
registers array. */
|
sp = fsr.regs[SP_REGNUM];
|
sp = fsr.regs[SP_REGNUM];
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
if (sp & 1)
|
if (sp & 1)
|
sp += 2047;
|
sp += 2047;
|
#endif
|
#endif
|
read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16);
|
read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16);
|
|
|
/* Restore the out registers.
|
/* Restore the out registers.
|
Among other things this writes the new stack pointer. */
|
Among other things this writes the new stack pointer. */
|
write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer,
|
write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer,
|
SPARC_INTREG_SIZE * 8);
|
SPARC_INTREG_SIZE * 8);
|
|
|
write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp,
|
write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp,
|
SPARC_INTREG_SIZE * 16);
|
SPARC_INTREG_SIZE * 16);
|
}
|
}
|
#ifndef GDB_TARGET_IS_SPARC64
|
#ifndef GDB_TARGET_IS_SPARC64
|
if (fsr.regs[PS_REGNUM])
|
if (fsr.regs[PS_REGNUM])
|
write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4));
|
write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4));
|
#endif
|
#endif
|
if (fsr.regs[Y_REGNUM])
|
if (fsr.regs[Y_REGNUM])
|
write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], REGISTER_RAW_SIZE (Y_REGNUM)));
|
write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], REGISTER_RAW_SIZE (Y_REGNUM)));
|
if (fsr.regs[PC_REGNUM])
|
if (fsr.regs[PC_REGNUM])
|
{
|
{
|
/* Explicitly specified PC (and maybe NPC) -- just restore them. */
|
/* Explicitly specified PC (and maybe NPC) -- just restore them. */
|
write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM],
|
write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM],
|
REGISTER_RAW_SIZE (PC_REGNUM)));
|
REGISTER_RAW_SIZE (PC_REGNUM)));
|
if (fsr.regs[NPC_REGNUM])
|
if (fsr.regs[NPC_REGNUM])
|
write_register (NPC_REGNUM,
|
write_register (NPC_REGNUM,
|
read_memory_integer (fsr.regs[NPC_REGNUM],
|
read_memory_integer (fsr.regs[NPC_REGNUM],
|
REGISTER_RAW_SIZE (NPC_REGNUM)));
|
REGISTER_RAW_SIZE (NPC_REGNUM)));
|
}
|
}
|
else if (frame->flat)
|
else if (frame->flat)
|
{
|
{
|
if (frame->pc_addr)
|
if (frame->pc_addr)
|
pc = PC_ADJUST ((CORE_ADDR)
|
pc = PC_ADJUST ((CORE_ADDR)
|
read_memory_integer (frame->pc_addr,
|
read_memory_integer (frame->pc_addr,
|
REGISTER_RAW_SIZE (PC_REGNUM)));
|
REGISTER_RAW_SIZE (PC_REGNUM)));
|
else
|
else
|
{
|
{
|
/* I think this happens only in the innermost frame, if so then
|
/* I think this happens only in the innermost frame, if so then
|
it is a complicated way of saying
|
it is a complicated way of saying
|
"pc = read_register (O7_REGNUM);". */
|
"pc = read_register (O7_REGNUM);". */
|
char buf[MAX_REGISTER_RAW_SIZE];
|
char buf[MAX_REGISTER_RAW_SIZE];
|
get_saved_register (buf, 0, 0, frame, O7_REGNUM, 0);
|
get_saved_register (buf, 0, 0, frame, O7_REGNUM, 0);
|
pc = PC_ADJUST (extract_address
|
pc = PC_ADJUST (extract_address
|
(buf, REGISTER_RAW_SIZE (O7_REGNUM)));
|
(buf, REGISTER_RAW_SIZE (O7_REGNUM)));
|
}
|
}
|
|
|
write_register (PC_REGNUM, pc);
|
write_register (PC_REGNUM, pc);
|
write_register (NPC_REGNUM, pc + 4);
|
write_register (NPC_REGNUM, pc + 4);
|
}
|
}
|
else if (fsr.regs[I7_REGNUM])
|
else if (fsr.regs[I7_REGNUM])
|
{
|
{
|
/* Return address in %i7 -- adjust it, then restore PC and NPC from it */
|
/* Return address in %i7 -- adjust it, then restore PC and NPC from it */
|
pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr.regs[I7_REGNUM],
|
pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr.regs[I7_REGNUM],
|
SPARC_INTREG_SIZE));
|
SPARC_INTREG_SIZE));
|
write_register (PC_REGNUM, pc);
|
write_register (PC_REGNUM, pc);
|
write_register (NPC_REGNUM, pc + 4);
|
write_register (NPC_REGNUM, pc + 4);
|
}
|
}
|
flush_cached_frames ();
|
flush_cached_frames ();
|
}
|
}
|
|
|
/* On the Sun 4 under SunOS, the compile will leave a fake insn which
|
/* On the Sun 4 under SunOS, the compile will leave a fake insn which
|
encodes the structure size being returned. If we detect such
|
encodes the structure size being returned. If we detect such
|
a fake insn, step past it. */
|
a fake insn, step past it. */
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_pc_adjust (pc)
|
sparc_pc_adjust (pc)
|
CORE_ADDR pc;
|
CORE_ADDR pc;
|
{
|
{
|
unsigned long insn;
|
unsigned long insn;
|
char buf[4];
|
char buf[4];
|
int err;
|
int err;
|
|
|
err = target_read_memory (pc + 8, buf, 4);
|
err = target_read_memory (pc + 8, buf, 4);
|
insn = extract_unsigned_integer (buf, 4);
|
insn = extract_unsigned_integer (buf, 4);
|
if ((err == 0) && (insn & 0xffc00000) == 0)
|
if ((err == 0) && (insn & 0xffc00000) == 0)
|
return pc + 12;
|
return pc + 12;
|
else
|
else
|
return pc + 8;
|
return pc + 8;
|
}
|
}
|
|
|
/* If pc is in a shared library trampoline, return its target.
|
/* If pc is in a shared library trampoline, return its target.
|
The SunOs 4.x linker rewrites the jump table entries for PIC
|
The SunOs 4.x linker rewrites the jump table entries for PIC
|
compiled modules in the main executable to bypass the dynamic linker
|
compiled modules in the main executable to bypass the dynamic linker
|
with jumps of the form
|
with jumps of the form
|
sethi %hi(addr),%g1
|
sethi %hi(addr),%g1
|
jmp %g1+%lo(addr)
|
jmp %g1+%lo(addr)
|
and removes the corresponding jump table relocation entry in the
|
and removes the corresponding jump table relocation entry in the
|
dynamic relocations.
|
dynamic relocations.
|
find_solib_trampoline_target relies on the presence of the jump
|
find_solib_trampoline_target relies on the presence of the jump
|
table relocation entry, so we have to detect these jump instructions
|
table relocation entry, so we have to detect these jump instructions
|
by hand. */
|
by hand. */
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sunos4_skip_trampoline_code (pc)
|
sunos4_skip_trampoline_code (pc)
|
CORE_ADDR pc;
|
CORE_ADDR pc;
|
{
|
{
|
unsigned long insn1;
|
unsigned long insn1;
|
char buf[4];
|
char buf[4];
|
int err;
|
int err;
|
|
|
err = target_read_memory (pc, buf, 4);
|
err = target_read_memory (pc, buf, 4);
|
insn1 = extract_unsigned_integer (buf, 4);
|
insn1 = extract_unsigned_integer (buf, 4);
|
if (err == 0 && (insn1 & 0xffc00000) == 0x03000000)
|
if (err == 0 && (insn1 & 0xffc00000) == 0x03000000)
|
{
|
{
|
unsigned long insn2;
|
unsigned long insn2;
|
|
|
err = target_read_memory (pc + 4, buf, 4);
|
err = target_read_memory (pc + 4, buf, 4);
|
insn2 = extract_unsigned_integer (buf, 4);
|
insn2 = extract_unsigned_integer (buf, 4);
|
if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000)
|
if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000)
|
{
|
{
|
CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10;
|
CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10;
|
int delta = insn2 & 0x1fff;
|
int delta = insn2 & 0x1fff;
|
|
|
/* Sign extend the displacement. */
|
/* Sign extend the displacement. */
|
if (delta & 0x1000)
|
if (delta & 0x1000)
|
delta |= ~0x1fff;
|
delta |= ~0x1fff;
|
return target_pc + delta;
|
return target_pc + delta;
|
}
|
}
|
}
|
}
|
return find_solib_trampoline_target (pc);
|
return find_solib_trampoline_target (pc);
|
}
|
}
|
|
|
#ifdef USE_PROC_FS /* Target dependent support for /proc */
|
#ifdef USE_PROC_FS /* Target dependent support for /proc */
|
/* *INDENT-OFF* */
|
/* *INDENT-OFF* */
|
/* The /proc interface divides the target machine's register set up into
|
/* The /proc interface divides the target machine's register set up into
|
two different sets, the general register set (gregset) and the floating
|
two different sets, the general register set (gregset) and the floating
|
point register set (fpregset). For each set, there is an ioctl to get
|
point register set (fpregset). For each set, there is an ioctl to get
|
the current register set and another ioctl to set the current values.
|
the current register set and another ioctl to set the current values.
|
|
|
The actual structure passed through the ioctl interface is, of course,
|
The actual structure passed through the ioctl interface is, of course,
|
naturally machine dependent, and is different for each set of registers.
|
naturally machine dependent, and is different for each set of registers.
|
For the sparc for example, the general register set is typically defined
|
For the sparc for example, the general register set is typically defined
|
by:
|
by:
|
|
|
typedef int gregset_t[38];
|
typedef int gregset_t[38];
|
|
|
#define R_G0 0
|
#define R_G0 0
|
...
|
...
|
#define R_TBR 37
|
#define R_TBR 37
|
|
|
and the floating point set by:
|
and the floating point set by:
|
|
|
typedef struct prfpregset {
|
typedef struct prfpregset {
|
union {
|
union {
|
u_long pr_regs[32];
|
u_long pr_regs[32];
|
double pr_dregs[16];
|
double pr_dregs[16];
|
} pr_fr;
|
} pr_fr;
|
void * pr_filler;
|
void * pr_filler;
|
u_long pr_fsr;
|
u_long pr_fsr;
|
u_char pr_qcnt;
|
u_char pr_qcnt;
|
u_char pr_q_entrysize;
|
u_char pr_q_entrysize;
|
u_char pr_en;
|
u_char pr_en;
|
u_long pr_q[64];
|
u_long pr_q[64];
|
} prfpregset_t;
|
} prfpregset_t;
|
|
|
These routines provide the packing and unpacking of gregset_t and
|
These routines provide the packing and unpacking of gregset_t and
|
fpregset_t formatted data.
|
fpregset_t formatted data.
|
|
|
*/
|
*/
|
/* *INDENT-ON* */
|
/* *INDENT-ON* */
|
|
|
|
|
|
|
/* Given a pointer to a general register set in /proc format (gregset_t *),
|
/* Given a pointer to a general register set in /proc format (gregset_t *),
|
unpack the register contents and supply them as gdb's idea of the current
|
unpack the register contents and supply them as gdb's idea of the current
|
register values. */
|
register values. */
|
|
|
void
|
void
|
supply_gregset (gregsetp)
|
supply_gregset (gregsetp)
|
prgregset_t *gregsetp;
|
prgregset_t *gregsetp;
|
{
|
{
|
register int regi;
|
register int regi;
|
register prgreg_t *regp = (prgreg_t *) gregsetp;
|
register prgreg_t *regp = (prgreg_t *) gregsetp;
|
static char zerobuf[MAX_REGISTER_RAW_SIZE] =
|
static char zerobuf[MAX_REGISTER_RAW_SIZE] =
|
{0};
|
{0};
|
|
|
/* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
|
/* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */
|
for (regi = G0_REGNUM; regi <= I7_REGNUM; regi++)
|
for (regi = G0_REGNUM; regi <= I7_REGNUM; regi++)
|
{
|
{
|
supply_register (regi, (char *) (regp + regi));
|
supply_register (regi, (char *) (regp + regi));
|
}
|
}
|
|
|
/* These require a bit more care. */
|
/* These require a bit more care. */
|
supply_register (PS_REGNUM, (char *) (regp + R_PS));
|
supply_register (PS_REGNUM, (char *) (regp + R_PS));
|
supply_register (PC_REGNUM, (char *) (regp + R_PC));
|
supply_register (PC_REGNUM, (char *) (regp + R_PC));
|
supply_register (NPC_REGNUM, (char *) (regp + R_nPC));
|
supply_register (NPC_REGNUM, (char *) (regp + R_nPC));
|
supply_register (Y_REGNUM, (char *) (regp + R_Y));
|
supply_register (Y_REGNUM, (char *) (regp + R_Y));
|
|
|
/* Fill inaccessible registers with zero. */
|
/* Fill inaccessible registers with zero. */
|
supply_register (WIM_REGNUM, zerobuf);
|
supply_register (WIM_REGNUM, zerobuf);
|
supply_register (TBR_REGNUM, zerobuf);
|
supply_register (TBR_REGNUM, zerobuf);
|
supply_register (CPS_REGNUM, zerobuf);
|
supply_register (CPS_REGNUM, zerobuf);
|
}
|
}
|
|
|
void
|
void
|
fill_gregset (gregsetp, regno)
|
fill_gregset (gregsetp, regno)
|
prgregset_t *gregsetp;
|
prgregset_t *gregsetp;
|
int regno;
|
int regno;
|
{
|
{
|
int regi;
|
int regi;
|
register prgreg_t *regp = (prgreg_t *) gregsetp;
|
register prgreg_t *regp = (prgreg_t *) gregsetp;
|
|
|
for (regi = 0; regi <= R_I7; regi++)
|
for (regi = 0; regi <= R_I7; regi++)
|
{
|
{
|
if ((regno == -1) || (regno == regi))
|
if ((regno == -1) || (regno == regi))
|
{
|
{
|
*(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)];
|
*(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)];
|
}
|
}
|
}
|
}
|
if ((regno == -1) || (regno == PS_REGNUM))
|
if ((regno == -1) || (regno == PS_REGNUM))
|
{
|
{
|
*(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)];
|
*(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)];
|
}
|
}
|
if ((regno == -1) || (regno == PC_REGNUM))
|
if ((regno == -1) || (regno == PC_REGNUM))
|
{
|
{
|
*(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)];
|
*(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)];
|
}
|
}
|
if ((regno == -1) || (regno == NPC_REGNUM))
|
if ((regno == -1) || (regno == NPC_REGNUM))
|
{
|
{
|
*(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)];
|
*(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)];
|
}
|
}
|
if ((regno == -1) || (regno == Y_REGNUM))
|
if ((regno == -1) || (regno == Y_REGNUM))
|
{
|
{
|
*(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)];
|
*(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)];
|
}
|
}
|
}
|
}
|
|
|
#if defined (FP0_REGNUM)
|
#if defined (FP0_REGNUM)
|
|
|
/* Given a pointer to a floating point register set in /proc format
|
/* Given a pointer to a floating point register set in /proc format
|
(fpregset_t *), unpack the register contents and supply them as gdb's
|
(fpregset_t *), unpack the register contents and supply them as gdb's
|
idea of the current floating point register values. */
|
idea of the current floating point register values. */
|
|
|
void
|
void
|
supply_fpregset (fpregsetp)
|
supply_fpregset (fpregsetp)
|
prfpregset_t *fpregsetp;
|
prfpregset_t *fpregsetp;
|
{
|
{
|
register int regi;
|
register int regi;
|
char *from;
|
char *from;
|
|
|
for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
|
for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
|
{
|
{
|
from = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
|
from = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
|
supply_register (regi, from);
|
supply_register (regi, from);
|
}
|
}
|
supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr));
|
supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr));
|
}
|
}
|
|
|
/* Given a pointer to a floating point register set in /proc format
|
/* Given a pointer to a floating point register set in /proc format
|
(fpregset_t *), update the register specified by REGNO from gdb's idea
|
(fpregset_t *), update the register specified by REGNO from gdb's idea
|
of the current floating point register set. If REGNO is -1, update
|
of the current floating point register set. If REGNO is -1, update
|
them all. */
|
them all. */
|
/* ??? This will probably need some changes for sparc64. */
|
/* ??? This will probably need some changes for sparc64. */
|
|
|
void
|
void
|
fill_fpregset (fpregsetp, regno)
|
fill_fpregset (fpregsetp, regno)
|
prfpregset_t *fpregsetp;
|
prfpregset_t *fpregsetp;
|
int regno;
|
int regno;
|
{
|
{
|
int regi;
|
int regi;
|
char *to;
|
char *to;
|
char *from;
|
char *from;
|
|
|
for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
|
for (regi = FP0_REGNUM; regi < FP_MAX_REGNUM; regi++)
|
{
|
{
|
if ((regno == -1) || (regno == regi))
|
if ((regno == -1) || (regno == regi))
|
{
|
{
|
from = (char *) ®isters[REGISTER_BYTE (regi)];
|
from = (char *) ®isters[REGISTER_BYTE (regi)];
|
to = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
|
to = (char *) &fpregsetp->pr_fr.pr_regs[regi - FP0_REGNUM];
|
memcpy (to, from, REGISTER_RAW_SIZE (regi));
|
memcpy (to, from, REGISTER_RAW_SIZE (regi));
|
}
|
}
|
}
|
}
|
if ((regno == -1) || (regno == FPS_REGNUM))
|
if ((regno == -1) || (regno == FPS_REGNUM))
|
{
|
{
|
fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)];
|
fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)];
|
}
|
}
|
}
|
}
|
|
|
#endif /* defined (FP0_REGNUM) */
|
#endif /* defined (FP0_REGNUM) */
|
|
|
#endif /* USE_PROC_FS */
|
#endif /* USE_PROC_FS */
|
|
|
|
|
#ifdef GET_LONGJMP_TARGET
|
#ifdef GET_LONGJMP_TARGET
|
|
|
/* Figure out where the longjmp will land. We expect that we have just entered
|
/* Figure out where the longjmp will land. We expect that we have just entered
|
longjmp and haven't yet setup the stack frame, so the args are still in the
|
longjmp and haven't yet setup the stack frame, so the args are still in the
|
output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
|
output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
|
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
|
extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
|
This routine returns true on success */
|
This routine returns true on success */
|
|
|
int
|
int
|
get_longjmp_target (pc)
|
get_longjmp_target (pc)
|
CORE_ADDR *pc;
|
CORE_ADDR *pc;
|
{
|
{
|
CORE_ADDR jb_addr;
|
CORE_ADDR jb_addr;
|
#define LONGJMP_TARGET_SIZE 4
|
#define LONGJMP_TARGET_SIZE 4
|
char buf[LONGJMP_TARGET_SIZE];
|
char buf[LONGJMP_TARGET_SIZE];
|
|
|
jb_addr = read_register (O0_REGNUM);
|
jb_addr = read_register (O0_REGNUM);
|
|
|
if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
|
if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
|
LONGJMP_TARGET_SIZE))
|
LONGJMP_TARGET_SIZE))
|
return 0;
|
return 0;
|
|
|
*pc = extract_address (buf, LONGJMP_TARGET_SIZE);
|
*pc = extract_address (buf, LONGJMP_TARGET_SIZE);
|
|
|
return 1;
|
return 1;
|
}
|
}
|
#endif /* GET_LONGJMP_TARGET */
|
#endif /* GET_LONGJMP_TARGET */
|
|
|
#ifdef STATIC_TRANSFORM_NAME
|
#ifdef STATIC_TRANSFORM_NAME
|
/* SunPRO (3.0 at least), encodes the static variables. This is not
|
/* SunPRO (3.0 at least), encodes the static variables. This is not
|
related to C++ mangling, it is done for C too. */
|
related to C++ mangling, it is done for C too. */
|
|
|
char *
|
char *
|
sunpro_static_transform_name (name)
|
sunpro_static_transform_name (name)
|
char *name;
|
char *name;
|
{
|
{
|
char *p;
|
char *p;
|
if (name[0] == '$')
|
if (name[0] == '$')
|
{
|
{
|
/* For file-local statics there will be a dollar sign, a bunch
|
/* For file-local statics there will be a dollar sign, a bunch
|
of junk (the contents of which match a string given in the
|
of junk (the contents of which match a string given in the
|
N_OPT), a period and the name. For function-local statics
|
N_OPT), a period and the name. For function-local statics
|
there will be a bunch of junk (which seems to change the
|
there will be a bunch of junk (which seems to change the
|
second character from 'A' to 'B'), a period, the name of the
|
second character from 'A' to 'B'), a period, the name of the
|
function, and the name. So just skip everything before the
|
function, and the name. So just skip everything before the
|
last period. */
|
last period. */
|
p = strrchr (name, '.');
|
p = strrchr (name, '.');
|
if (p != NULL)
|
if (p != NULL)
|
name = p + 1;
|
name = p + 1;
|
}
|
}
|
return name;
|
return name;
|
}
|
}
|
#endif /* STATIC_TRANSFORM_NAME */
|
#endif /* STATIC_TRANSFORM_NAME */
|
|
|
|
|
/* Utilities for printing registers.
|
/* Utilities for printing registers.
|
Page numbers refer to the SPARC Architecture Manual. */
|
Page numbers refer to the SPARC Architecture Manual. */
|
|
|
static void dump_ccreg PARAMS ((char *, int));
|
static void dump_ccreg PARAMS ((char *, int));
|
|
|
static void
|
static void
|
dump_ccreg (reg, val)
|
dump_ccreg (reg, val)
|
char *reg;
|
char *reg;
|
int val;
|
int val;
|
{
|
{
|
/* page 41 */
|
/* page 41 */
|
printf_unfiltered ("%s:%s,%s,%s,%s", reg,
|
printf_unfiltered ("%s:%s,%s,%s,%s", reg,
|
val & 8 ? "N" : "NN",
|
val & 8 ? "N" : "NN",
|
val & 4 ? "Z" : "NZ",
|
val & 4 ? "Z" : "NZ",
|
val & 2 ? "O" : "NO",
|
val & 2 ? "O" : "NO",
|
val & 1 ? "C" : "NC"
|
val & 1 ? "C" : "NC"
|
);
|
);
|
}
|
}
|
|
|
static char *
|
static char *
|
decode_asi (val)
|
decode_asi (val)
|
int val;
|
int val;
|
{
|
{
|
/* page 72 */
|
/* page 72 */
|
switch (val)
|
switch (val)
|
{
|
{
|
case 4:
|
case 4:
|
return "ASI_NUCLEUS";
|
return "ASI_NUCLEUS";
|
case 0x0c:
|
case 0x0c:
|
return "ASI_NUCLEUS_LITTLE";
|
return "ASI_NUCLEUS_LITTLE";
|
case 0x10:
|
case 0x10:
|
return "ASI_AS_IF_USER_PRIMARY";
|
return "ASI_AS_IF_USER_PRIMARY";
|
case 0x11:
|
case 0x11:
|
return "ASI_AS_IF_USER_SECONDARY";
|
return "ASI_AS_IF_USER_SECONDARY";
|
case 0x18:
|
case 0x18:
|
return "ASI_AS_IF_USER_PRIMARY_LITTLE";
|
return "ASI_AS_IF_USER_PRIMARY_LITTLE";
|
case 0x19:
|
case 0x19:
|
return "ASI_AS_IF_USER_SECONDARY_LITTLE";
|
return "ASI_AS_IF_USER_SECONDARY_LITTLE";
|
case 0x80:
|
case 0x80:
|
return "ASI_PRIMARY";
|
return "ASI_PRIMARY";
|
case 0x81:
|
case 0x81:
|
return "ASI_SECONDARY";
|
return "ASI_SECONDARY";
|
case 0x82:
|
case 0x82:
|
return "ASI_PRIMARY_NOFAULT";
|
return "ASI_PRIMARY_NOFAULT";
|
case 0x83:
|
case 0x83:
|
return "ASI_SECONDARY_NOFAULT";
|
return "ASI_SECONDARY_NOFAULT";
|
case 0x88:
|
case 0x88:
|
return "ASI_PRIMARY_LITTLE";
|
return "ASI_PRIMARY_LITTLE";
|
case 0x89:
|
case 0x89:
|
return "ASI_SECONDARY_LITTLE";
|
return "ASI_SECONDARY_LITTLE";
|
case 0x8a:
|
case 0x8a:
|
return "ASI_PRIMARY_NOFAULT_LITTLE";
|
return "ASI_PRIMARY_NOFAULT_LITTLE";
|
case 0x8b:
|
case 0x8b:
|
return "ASI_SECONDARY_NOFAULT_LITTLE";
|
return "ASI_SECONDARY_NOFAULT_LITTLE";
|
default:
|
default:
|
return NULL;
|
return NULL;
|
}
|
}
|
}
|
}
|
|
|
/* PRINT_REGISTER_HOOK routine.
|
/* PRINT_REGISTER_HOOK routine.
|
Pretty print various registers. */
|
Pretty print various registers. */
|
/* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
|
/* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */
|
|
|
void
|
void
|
sparc_print_register_hook (regno)
|
sparc_print_register_hook (regno)
|
int regno;
|
int regno;
|
{
|
{
|
ULONGEST val;
|
ULONGEST val;
|
|
|
/* Handle double/quad versions of lower 32 fp regs. */
|
/* Handle double/quad versions of lower 32 fp regs. */
|
if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32
|
if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32
|
&& (regno & 1) == 0)
|
&& (regno & 1) == 0)
|
{
|
{
|
char value[16];
|
char value[16];
|
|
|
if (!read_relative_register_raw_bytes (regno, value)
|
if (!read_relative_register_raw_bytes (regno, value)
|
&& !read_relative_register_raw_bytes (regno + 1, value + 4))
|
&& !read_relative_register_raw_bytes (regno + 1, value + 4))
|
{
|
{
|
printf_unfiltered ("\t");
|
printf_unfiltered ("\t");
|
print_floating (value, builtin_type_double, gdb_stdout);
|
print_floating (value, builtin_type_double, gdb_stdout);
|
}
|
}
|
#if 0 /* FIXME: gdb doesn't handle long doubles */
|
#if 0 /* FIXME: gdb doesn't handle long doubles */
|
if ((regno & 3) == 0)
|
if ((regno & 3) == 0)
|
{
|
{
|
if (!read_relative_register_raw_bytes (regno + 2, value + 8)
|
if (!read_relative_register_raw_bytes (regno + 2, value + 8)
|
&& !read_relative_register_raw_bytes (regno + 3, value + 12))
|
&& !read_relative_register_raw_bytes (regno + 3, value + 12))
|
{
|
{
|
printf_unfiltered ("\t");
|
printf_unfiltered ("\t");
|
print_floating (value, builtin_type_long_double, gdb_stdout);
|
print_floating (value, builtin_type_long_double, gdb_stdout);
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
return;
|
return;
|
}
|
}
|
|
|
#if 0 /* FIXME: gdb doesn't handle long doubles */
|
#if 0 /* FIXME: gdb doesn't handle long doubles */
|
/* Print upper fp regs as long double if appropriate. */
|
/* Print upper fp regs as long double if appropriate. */
|
if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM
|
if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM
|
/* We test for even numbered regs and not a multiple of 4 because
|
/* We test for even numbered regs and not a multiple of 4 because
|
the upper fp regs are recorded as doubles. */
|
the upper fp regs are recorded as doubles. */
|
&& (regno & 1) == 0)
|
&& (regno & 1) == 0)
|
{
|
{
|
char value[16];
|
char value[16];
|
|
|
if (!read_relative_register_raw_bytes (regno, value)
|
if (!read_relative_register_raw_bytes (regno, value)
|
&& !read_relative_register_raw_bytes (regno + 1, value + 8))
|
&& !read_relative_register_raw_bytes (regno + 1, value + 8))
|
{
|
{
|
printf_unfiltered ("\t");
|
printf_unfiltered ("\t");
|
print_floating (value, builtin_type_long_double, gdb_stdout);
|
print_floating (value, builtin_type_long_double, gdb_stdout);
|
}
|
}
|
return;
|
return;
|
}
|
}
|
#endif
|
#endif
|
|
|
/* FIXME: Some of these are priviledged registers.
|
/* FIXME: Some of these are priviledged registers.
|
Not sure how they should be handled. */
|
Not sure how they should be handled. */
|
|
|
#define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
|
#define BITS(n, mask) ((int) (((val) >> (n)) & (mask)))
|
|
|
val = read_register (regno);
|
val = read_register (regno);
|
|
|
/* pages 40 - 60 */
|
/* pages 40 - 60 */
|
switch (regno)
|
switch (regno)
|
{
|
{
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
case CCR_REGNUM:
|
case CCR_REGNUM:
|
printf_unfiltered ("\t");
|
printf_unfiltered ("\t");
|
dump_ccreg ("xcc", val >> 4);
|
dump_ccreg ("xcc", val >> 4);
|
printf_unfiltered (", ");
|
printf_unfiltered (", ");
|
dump_ccreg ("icc", val & 15);
|
dump_ccreg ("icc", val & 15);
|
break;
|
break;
|
case FPRS_REGNUM:
|
case FPRS_REGNUM:
|
printf ("\tfef:%d, du:%d, dl:%d",
|
printf ("\tfef:%d, du:%d, dl:%d",
|
BITS (2, 1), BITS (1, 1), BITS (0, 1));
|
BITS (2, 1), BITS (1, 1), BITS (0, 1));
|
break;
|
break;
|
case FSR_REGNUM:
|
case FSR_REGNUM:
|
{
|
{
|
static char *fcc[4] =
|
static char *fcc[4] =
|
{"=", "<", ">", "?"};
|
{"=", "<", ">", "?"};
|
static char *rd[4] =
|
static char *rd[4] =
|
{"N", "0", "+", "-"};
|
{"N", "0", "+", "-"};
|
/* Long, yes, but I'd rather leave it as is and use a wide screen. */
|
/* Long, yes, but I'd rather leave it as is and use a wide screen. */
|
printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
|
printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d",
|
fcc[BITS (10, 3)], fcc[BITS (32, 3)],
|
fcc[BITS (10, 3)], fcc[BITS (32, 3)],
|
fcc[BITS (34, 3)], fcc[BITS (36, 3)],
|
fcc[BITS (34, 3)], fcc[BITS (36, 3)],
|
rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
|
rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
|
BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31));
|
BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31));
|
break;
|
break;
|
}
|
}
|
case ASI_REGNUM:
|
case ASI_REGNUM:
|
{
|
{
|
char *asi = decode_asi (val);
|
char *asi = decode_asi (val);
|
if (asi != NULL)
|
if (asi != NULL)
|
printf ("\t%s", asi);
|
printf ("\t%s", asi);
|
break;
|
break;
|
}
|
}
|
case VER_REGNUM:
|
case VER_REGNUM:
|
printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
|
printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d",
|
BITS (48, 0xffff), BITS (32, 0xffff),
|
BITS (48, 0xffff), BITS (32, 0xffff),
|
BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
|
BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31));
|
break;
|
break;
|
case PSTATE_REGNUM:
|
case PSTATE_REGNUM:
|
{
|
{
|
static char *mm[4] =
|
static char *mm[4] =
|
{"tso", "pso", "rso", "?"};
|
{"tso", "pso", "rso", "?"};
|
printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
|
printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d",
|
BITS (9, 1), BITS (8, 1), mm[BITS (6, 3)], BITS (5, 1),
|
BITS (9, 1), BITS (8, 1), mm[BITS (6, 3)], BITS (5, 1),
|
BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1),
|
BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1),
|
BITS (0, 1));
|
BITS (0, 1));
|
break;
|
break;
|
}
|
}
|
case TSTATE_REGNUM:
|
case TSTATE_REGNUM:
|
/* FIXME: print all 4? */
|
/* FIXME: print all 4? */
|
break;
|
break;
|
case TT_REGNUM:
|
case TT_REGNUM:
|
/* FIXME: print all 4? */
|
/* FIXME: print all 4? */
|
break;
|
break;
|
case TPC_REGNUM:
|
case TPC_REGNUM:
|
/* FIXME: print all 4? */
|
/* FIXME: print all 4? */
|
break;
|
break;
|
case TNPC_REGNUM:
|
case TNPC_REGNUM:
|
/* FIXME: print all 4? */
|
/* FIXME: print all 4? */
|
break;
|
break;
|
case WSTATE_REGNUM:
|
case WSTATE_REGNUM:
|
printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
|
printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7));
|
break;
|
break;
|
case CWP_REGNUM:
|
case CWP_REGNUM:
|
printf ("\t%d", BITS (0, 31));
|
printf ("\t%d", BITS (0, 31));
|
break;
|
break;
|
case CANSAVE_REGNUM:
|
case CANSAVE_REGNUM:
|
printf ("\t%-2d before spill", BITS (0, 31));
|
printf ("\t%-2d before spill", BITS (0, 31));
|
break;
|
break;
|
case CANRESTORE_REGNUM:
|
case CANRESTORE_REGNUM:
|
printf ("\t%-2d before fill", BITS (0, 31));
|
printf ("\t%-2d before fill", BITS (0, 31));
|
break;
|
break;
|
case CLEANWIN_REGNUM:
|
case CLEANWIN_REGNUM:
|
printf ("\t%-2d before clean", BITS (0, 31));
|
printf ("\t%-2d before clean", BITS (0, 31));
|
break;
|
break;
|
case OTHERWIN_REGNUM:
|
case OTHERWIN_REGNUM:
|
printf ("\t%d", BITS (0, 31));
|
printf ("\t%d", BITS (0, 31));
|
break;
|
break;
|
#else
|
#else
|
case PS_REGNUM:
|
case PS_REGNUM:
|
printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
|
printf ("\ticc:%c%c%c%c, pil:%d, s:%d, ps:%d, et:%d, cwp:%d",
|
BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
|
BITS (23, 1) ? 'N' : '-', BITS (22, 1) ? 'Z' : '-',
|
BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
|
BITS (21, 1) ? 'V' : '-', BITS (20, 1) ? 'C' : '-',
|
BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
|
BITS (8, 15), BITS (7, 1), BITS (6, 1), BITS (5, 1),
|
BITS (0, 31));
|
BITS (0, 31));
|
break;
|
break;
|
case FPS_REGNUM:
|
case FPS_REGNUM:
|
{
|
{
|
static char *fcc[4] =
|
static char *fcc[4] =
|
{"=", "<", ">", "?"};
|
{"=", "<", ">", "?"};
|
static char *rd[4] =
|
static char *rd[4] =
|
{"N", "0", "+", "-"};
|
{"N", "0", "+", "-"};
|
/* Long, yes, but I'd rather leave it as is and use a wide screen. */
|
/* Long, yes, but I'd rather leave it as is and use a wide screen. */
|
printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
|
printf ("\trd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, "
|
"fcc:%s, aexc:%d, cexc:%d",
|
"fcc:%s, aexc:%d, cexc:%d",
|
rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
|
rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7),
|
BITS (14, 7), BITS (13, 1), fcc[BITS (10, 3)], BITS (5, 31),
|
BITS (14, 7), BITS (13, 1), fcc[BITS (10, 3)], BITS (5, 31),
|
BITS (0, 31));
|
BITS (0, 31));
|
break;
|
break;
|
}
|
}
|
|
|
#endif /* GDB_TARGET_IS_SPARC64 */
|
#endif /* GDB_TARGET_IS_SPARC64 */
|
}
|
}
|
|
|
#undef BITS
|
#undef BITS
|
}
|
}
|
|
|
int
|
int
|
gdb_print_insn_sparc (memaddr, info)
|
gdb_print_insn_sparc (memaddr, info)
|
bfd_vma memaddr;
|
bfd_vma memaddr;
|
disassemble_info *info;
|
disassemble_info *info;
|
{
|
{
|
/* It's necessary to override mach again because print_insn messes it up. */
|
/* It's necessary to override mach again because print_insn messes it up. */
|
info->mach = TARGET_ARCHITECTURE->mach;
|
info->mach = TARGET_ARCHITECTURE->mach;
|
return print_insn_sparc (memaddr, info);
|
return print_insn_sparc (memaddr, info);
|
}
|
}
|
|
|
/* The SPARC passes the arguments on the stack; arguments smaller
|
/* The SPARC passes the arguments on the stack; arguments smaller
|
than an int are promoted to an int. */
|
than an int are promoted to an int. */
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc_push_arguments (nargs, args, sp, struct_return, struct_addr)
|
sparc_push_arguments (nargs, args, sp, struct_return, struct_addr)
|
int nargs;
|
int nargs;
|
value_ptr *args;
|
value_ptr *args;
|
CORE_ADDR sp;
|
CORE_ADDR sp;
|
int struct_return;
|
int struct_return;
|
CORE_ADDR struct_addr;
|
CORE_ADDR struct_addr;
|
{
|
{
|
int i;
|
int i;
|
int accumulate_size = 0;
|
int accumulate_size = 0;
|
struct sparc_arg
|
struct sparc_arg
|
{
|
{
|
char *contents;
|
char *contents;
|
int len;
|
int len;
|
int offset;
|
int offset;
|
};
|
};
|
struct sparc_arg *sparc_args =
|
struct sparc_arg *sparc_args =
|
(struct sparc_arg *) alloca (nargs * sizeof (struct sparc_arg));
|
(struct sparc_arg *) alloca (nargs * sizeof (struct sparc_arg));
|
struct sparc_arg *m_arg;
|
struct sparc_arg *m_arg;
|
|
|
/* Promote arguments if necessary, and calculate their stack offsets
|
/* Promote arguments if necessary, and calculate their stack offsets
|
and sizes. */
|
and sizes. */
|
for (i = 0, m_arg = sparc_args; i < nargs; i++, m_arg++)
|
for (i = 0, m_arg = sparc_args; i < nargs; i++, m_arg++)
|
{
|
{
|
value_ptr arg = args[i];
|
value_ptr arg = args[i];
|
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
|
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
|
/* Cast argument to long if necessary as the compiler does it too. */
|
/* Cast argument to long if necessary as the compiler does it too. */
|
switch (TYPE_CODE (arg_type))
|
switch (TYPE_CODE (arg_type))
|
{
|
{
|
case TYPE_CODE_INT:
|
case TYPE_CODE_INT:
|
case TYPE_CODE_BOOL:
|
case TYPE_CODE_BOOL:
|
case TYPE_CODE_CHAR:
|
case TYPE_CODE_CHAR:
|
case TYPE_CODE_RANGE:
|
case TYPE_CODE_RANGE:
|
case TYPE_CODE_ENUM:
|
case TYPE_CODE_ENUM:
|
if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
|
if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
|
{
|
{
|
arg_type = builtin_type_long;
|
arg_type = builtin_type_long;
|
arg = value_cast (arg_type, arg);
|
arg = value_cast (arg_type, arg);
|
}
|
}
|
break;
|
break;
|
default:
|
default:
|
break;
|
break;
|
}
|
}
|
m_arg->len = TYPE_LENGTH (arg_type);
|
m_arg->len = TYPE_LENGTH (arg_type);
|
m_arg->offset = accumulate_size;
|
m_arg->offset = accumulate_size;
|
accumulate_size = (accumulate_size + m_arg->len + 3) & ~3;
|
accumulate_size = (accumulate_size + m_arg->len + 3) & ~3;
|
m_arg->contents = VALUE_CONTENTS (arg);
|
m_arg->contents = VALUE_CONTENTS (arg);
|
}
|
}
|
|
|
/* Make room for the arguments on the stack. */
|
/* Make room for the arguments on the stack. */
|
accumulate_size += CALL_DUMMY_STACK_ADJUST;
|
accumulate_size += CALL_DUMMY_STACK_ADJUST;
|
sp = ((sp - accumulate_size) & ~7) + CALL_DUMMY_STACK_ADJUST;
|
sp = ((sp - accumulate_size) & ~7) + CALL_DUMMY_STACK_ADJUST;
|
|
|
/* `Push' arguments on the stack. */
|
/* `Push' arguments on the stack. */
|
for (i = nargs; m_arg--, --i >= 0;)
|
for (i = nargs; m_arg--, --i >= 0;)
|
write_memory (sp + m_arg->offset, m_arg->contents, m_arg->len);
|
write_memory (sp + m_arg->offset, m_arg->contents, m_arg->len);
|
|
|
return sp;
|
return sp;
|
}
|
}
|
|
|
|
|
/* Extract from an array REGBUF containing the (raw) register state
|
/* Extract from an array REGBUF containing the (raw) register state
|
a function return value of type TYPE, and copy that, in virtual format,
|
a function return value of type TYPE, and copy that, in virtual format,
|
into VALBUF. */
|
into VALBUF. */
|
|
|
void
|
void
|
sparc_extract_return_value (type, regbuf, valbuf)
|
sparc_extract_return_value (type, regbuf, valbuf)
|
struct type *type;
|
struct type *type;
|
char *regbuf;
|
char *regbuf;
|
char *valbuf;
|
char *valbuf;
|
{
|
{
|
int typelen = TYPE_LENGTH (type);
|
int typelen = TYPE_LENGTH (type);
|
int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
|
int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
|
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
|
memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
|
else
|
else
|
memcpy (valbuf,
|
memcpy (valbuf,
|
®buf[O0_REGNUM * regsize +
|
®buf[O0_REGNUM * regsize +
|
(typelen >= regsize
|
(typelen >= regsize
|
|| TARGET_BYTE_ORDER == LITTLE_ENDIAN ? 0
|
|| TARGET_BYTE_ORDER == LITTLE_ENDIAN ? 0
|
: regsize - typelen)],
|
: regsize - typelen)],
|
typelen);
|
typelen);
|
}
|
}
|
|
|
|
|
/* Write into appropriate registers a function return value
|
/* Write into appropriate registers a function return value
|
of type TYPE, given in virtual format. On SPARCs with FPUs,
|
of type TYPE, given in virtual format. On SPARCs with FPUs,
|
float values are returned in %f0 (and %f1). In all other cases,
|
float values are returned in %f0 (and %f1). In all other cases,
|
values are returned in register %o0. */
|
values are returned in register %o0. */
|
|
|
void
|
void
|
sparc_store_return_value (type, valbuf)
|
sparc_store_return_value (type, valbuf)
|
struct type *type;
|
struct type *type;
|
char *valbuf;
|
char *valbuf;
|
{
|
{
|
int regno;
|
int regno;
|
char buffer[MAX_REGISTER_RAW_SIZE];
|
char buffer[MAX_REGISTER_RAW_SIZE];
|
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
/* Floating-point values are returned in the register pair */
|
/* Floating-point values are returned in the register pair */
|
/* formed by %f0 and %f1 (doubles are, anyway). */
|
/* formed by %f0 and %f1 (doubles are, anyway). */
|
regno = FP0_REGNUM;
|
regno = FP0_REGNUM;
|
else
|
else
|
/* Other values are returned in register %o0. */
|
/* Other values are returned in register %o0. */
|
regno = O0_REGNUM;
|
regno = O0_REGNUM;
|
|
|
/* Add leading zeros to the value. */
|
/* Add leading zeros to the value. */
|
if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (regno))
|
if (TYPE_LENGTH (type) < REGISTER_RAW_SIZE (regno))
|
{
|
{
|
bzero (buffer, REGISTER_RAW_SIZE (regno));
|
bzero (buffer, REGISTER_RAW_SIZE (regno));
|
memcpy (buffer + REGISTER_RAW_SIZE (regno) - TYPE_LENGTH (type), valbuf,
|
memcpy (buffer + REGISTER_RAW_SIZE (regno) - TYPE_LENGTH (type), valbuf,
|
TYPE_LENGTH (type));
|
TYPE_LENGTH (type));
|
write_register_bytes (REGISTER_BYTE (regno), buffer,
|
write_register_bytes (REGISTER_BYTE (regno), buffer,
|
REGISTER_RAW_SIZE (regno));
|
REGISTER_RAW_SIZE (regno));
|
}
|
}
|
else
|
else
|
write_register_bytes (REGISTER_BYTE (regno), valbuf, TYPE_LENGTH (type));
|
write_register_bytes (REGISTER_BYTE (regno), valbuf, TYPE_LENGTH (type));
|
}
|
}
|
|
|
|
|
/* Insert the function address into a call dummy instruction sequence
|
/* Insert the function address into a call dummy instruction sequence
|
stored at DUMMY.
|
stored at DUMMY.
|
|
|
For structs and unions, if the function was compiled with Sun cc,
|
For structs and unions, if the function was compiled with Sun cc,
|
it expects 'unimp' after the call. But gcc doesn't use that
|
it expects 'unimp' after the call. But gcc doesn't use that
|
(twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
|
(twisted) convention. So leave a nop there for gcc (FIX_CALL_DUMMY
|
can assume it is operating on a pristine CALL_DUMMY, not one that
|
can assume it is operating on a pristine CALL_DUMMY, not one that
|
has already been customized for a different function). */
|
has already been customized for a different function). */
|
|
|
void
|
void
|
sparc_fix_call_dummy (dummy, pc, fun, value_type, using_gcc)
|
sparc_fix_call_dummy (dummy, pc, fun, value_type, using_gcc)
|
char *dummy;
|
char *dummy;
|
CORE_ADDR pc;
|
CORE_ADDR pc;
|
CORE_ADDR fun;
|
CORE_ADDR fun;
|
struct type *value_type;
|
struct type *value_type;
|
int using_gcc;
|
int using_gcc;
|
{
|
{
|
int i;
|
int i;
|
|
|
/* Store the relative adddress of the target function into the
|
/* Store the relative adddress of the target function into the
|
'call' instruction. */
|
'call' instruction. */
|
store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET, 4,
|
store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET, 4,
|
(0x40000000
|
(0x40000000
|
| (((fun - (pc + CALL_DUMMY_CALL_OFFSET)) >> 2)
|
| (((fun - (pc + CALL_DUMMY_CALL_OFFSET)) >> 2)
|
& 0x3fffffff)));
|
& 0x3fffffff)));
|
|
|
/* Comply with strange Sun cc calling convention for struct-returning
|
/* Comply with strange Sun cc calling convention for struct-returning
|
functions. */
|
functions. */
|
if (!using_gcc
|
if (!using_gcc
|
&& (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
|
&& (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
|
|| TYPE_CODE (value_type) == TYPE_CODE_UNION))
|
|| TYPE_CODE (value_type) == TYPE_CODE_UNION))
|
store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET + 8, 4,
|
store_unsigned_integer (dummy + CALL_DUMMY_CALL_OFFSET + 8, 4,
|
TYPE_LENGTH (value_type) & 0x1fff);
|
TYPE_LENGTH (value_type) & 0x1fff);
|
|
|
#ifndef GDB_TARGET_IS_SPARC64
|
#ifndef GDB_TARGET_IS_SPARC64
|
/* If this is not a simulator target, change the first four instructions
|
/* If this is not a simulator target, change the first four instructions
|
of the call dummy to NOPs. Those instructions include a 'save'
|
of the call dummy to NOPs. Those instructions include a 'save'
|
instruction and are designed to work around problems with register
|
instruction and are designed to work around problems with register
|
window flushing in the simulator. */
|
window flushing in the simulator. */
|
if (strcmp (target_shortname, "sim") != 0)
|
if (strcmp (target_shortname, "sim") != 0)
|
{
|
{
|
for (i = 0; i < 4; i++)
|
for (i = 0; i < 4; i++)
|
store_unsigned_integer (dummy + (i * 4), 4, 0x01000000);
|
store_unsigned_integer (dummy + (i * 4), 4, 0x01000000);
|
}
|
}
|
#endif
|
#endif
|
|
|
/* If this is a bi-endian target, GDB has written the call dummy
|
/* If this is a bi-endian target, GDB has written the call dummy
|
in little-endian order. We must byte-swap it back to big-endian. */
|
in little-endian order. We must byte-swap it back to big-endian. */
|
if (bi_endian)
|
if (bi_endian)
|
{
|
{
|
for (i = 0; i < CALL_DUMMY_LENGTH; i += 4)
|
for (i = 0; i < CALL_DUMMY_LENGTH; i += 4)
|
{
|
{
|
char tmp = dummy[i];
|
char tmp = dummy[i];
|
dummy[i] = dummy[i + 3];
|
dummy[i] = dummy[i + 3];
|
dummy[i + 3] = tmp;
|
dummy[i + 3] = tmp;
|
tmp = dummy[i + 1];
|
tmp = dummy[i + 1];
|
dummy[i + 1] = dummy[i + 2];
|
dummy[i + 1] = dummy[i + 2];
|
dummy[i + 2] = tmp;
|
dummy[i + 2] = tmp;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
|
|
/* Set target byte order based on machine type. */
|
/* Set target byte order based on machine type. */
|
|
|
static int
|
static int
|
sparc_target_architecture_hook (ap)
|
sparc_target_architecture_hook (ap)
|
const bfd_arch_info_type *ap;
|
const bfd_arch_info_type *ap;
|
{
|
{
|
int i, j;
|
int i, j;
|
|
|
if (ap->mach == bfd_mach_sparc_sparclite_le)
|
if (ap->mach == bfd_mach_sparc_sparclite_le)
|
{
|
{
|
if (TARGET_BYTE_ORDER_SELECTABLE_P)
|
if (TARGET_BYTE_ORDER_SELECTABLE_P)
|
{
|
{
|
target_byte_order = LITTLE_ENDIAN;
|
target_byte_order = LITTLE_ENDIAN;
|
bi_endian = 1;
|
bi_endian = 1;
|
}
|
}
|
else
|
else
|
{
|
{
|
warning ("This GDB does not support little endian sparclite.");
|
warning ("This GDB does not support little endian sparclite.");
|
}
|
}
|
}
|
}
|
else
|
else
|
bi_endian = 0;
|
bi_endian = 0;
|
return 1;
|
return 1;
|
}
|
}
|
|
|
|
|
void
|
void
|
_initialize_sparc_tdep ()
|
_initialize_sparc_tdep ()
|
{
|
{
|
tm_print_insn = gdb_print_insn_sparc;
|
tm_print_insn = gdb_print_insn_sparc;
|
tm_print_insn_info.mach = TM_PRINT_INSN_MACH; /* Selects sparc/sparclite */
|
tm_print_insn_info.mach = TM_PRINT_INSN_MACH; /* Selects sparc/sparclite */
|
target_architecture_hook = sparc_target_architecture_hook;
|
target_architecture_hook = sparc_target_architecture_hook;
|
}
|
}
|
|
|
|
|
#ifdef GDB_TARGET_IS_SPARC64
|
#ifdef GDB_TARGET_IS_SPARC64
|
|
|
/* Compensate for stack bias. Note that we currently don't handle mixed
|
/* Compensate for stack bias. Note that we currently don't handle mixed
|
32/64 bit code. */
|
32/64 bit code. */
|
CORE_ADDR
|
CORE_ADDR
|
sparc64_read_sp ()
|
sparc64_read_sp ()
|
{
|
{
|
CORE_ADDR sp = read_register (SP_REGNUM);
|
CORE_ADDR sp = read_register (SP_REGNUM);
|
|
|
if (sp & 1)
|
if (sp & 1)
|
sp += 2047;
|
sp += 2047;
|
return sp;
|
return sp;
|
}
|
}
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sparc64_read_fp ()
|
sparc64_read_fp ()
|
{
|
{
|
CORE_ADDR fp = read_register (FP_REGNUM);
|
CORE_ADDR fp = read_register (FP_REGNUM);
|
|
|
if (fp & 1)
|
if (fp & 1)
|
fp += 2047;
|
fp += 2047;
|
return fp;
|
return fp;
|
}
|
}
|
|
|
void
|
void
|
sparc64_write_sp (val)
|
sparc64_write_sp (val)
|
CORE_ADDR val;
|
CORE_ADDR val;
|
{
|
{
|
CORE_ADDR oldsp = read_register (SP_REGNUM);
|
CORE_ADDR oldsp = read_register (SP_REGNUM);
|
if (oldsp & 1)
|
if (oldsp & 1)
|
write_register (SP_REGNUM, val - 2047);
|
write_register (SP_REGNUM, val - 2047);
|
else
|
else
|
write_register (SP_REGNUM, val);
|
write_register (SP_REGNUM, val);
|
}
|
}
|
|
|
void
|
void
|
sparc64_write_fp (val)
|
sparc64_write_fp (val)
|
CORE_ADDR val;
|
CORE_ADDR val;
|
{
|
{
|
CORE_ADDR oldfp = read_register (FP_REGNUM);
|
CORE_ADDR oldfp = read_register (FP_REGNUM);
|
if (oldfp & 1)
|
if (oldfp & 1)
|
write_register (FP_REGNUM, val - 2047);
|
write_register (FP_REGNUM, val - 2047);
|
else
|
else
|
write_register (FP_REGNUM, val);
|
write_register (FP_REGNUM, val);
|
}
|
}
|
|
|
/* The SPARC 64 ABI passes floating-point arguments in FP0-31. They are
|
/* The SPARC 64 ABI passes floating-point arguments in FP0-31. They are
|
also copied onto the stack in the correct places. */
|
also copied onto the stack in the correct places. */
|
|
|
CORE_ADDR
|
CORE_ADDR
|
sp64_push_arguments (nargs, args, sp, struct_return, struct_retaddr)
|
sp64_push_arguments (nargs, args, sp, struct_return, struct_retaddr)
|
int nargs;
|
int nargs;
|
value_ptr *args;
|
value_ptr *args;
|
CORE_ADDR sp;
|
CORE_ADDR sp;
|
unsigned char struct_return;
|
unsigned char struct_return;
|
CORE_ADDR struct_retaddr;
|
CORE_ADDR struct_retaddr;
|
{
|
{
|
int x;
|
int x;
|
int regnum = 0;
|
int regnum = 0;
|
CORE_ADDR tempsp;
|
CORE_ADDR tempsp;
|
|
|
sp = (sp & ~(((unsigned long) TYPE_LENGTH (builtin_type_long)) - 1UL));
|
sp = (sp & ~(((unsigned long) TYPE_LENGTH (builtin_type_long)) - 1UL));
|
|
|
/* Figure out how much space we'll need. */
|
/* Figure out how much space we'll need. */
|
for (x = nargs - 1; x >= 0; x--)
|
for (x = nargs - 1; x >= 0; x--)
|
{
|
{
|
int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[x])));
|
int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[x])));
|
value_ptr copyarg = args[x];
|
value_ptr copyarg = args[x];
|
int copylen = len;
|
int copylen = len;
|
|
|
/* This code is, of course, no longer correct. */
|
/* This code is, of course, no longer correct. */
|
if (copylen < TYPE_LENGTH (builtin_type_long))
|
if (copylen < TYPE_LENGTH (builtin_type_long))
|
{
|
{
|
copyarg = value_cast (builtin_type_long, copyarg);
|
copyarg = value_cast (builtin_type_long, copyarg);
|
copylen = TYPE_LENGTH (builtin_type_long);
|
copylen = TYPE_LENGTH (builtin_type_long);
|
}
|
}
|
sp -= copylen;
|
sp -= copylen;
|
}
|
}
|
|
|
/* Round down. */
|
/* Round down. */
|
sp = sp & ~7;
|
sp = sp & ~7;
|
tempsp = sp;
|
tempsp = sp;
|
|
|
/* Now write the arguments onto the stack, while writing FP arguments
|
/* Now write the arguments onto the stack, while writing FP arguments
|
into the FP registers. */
|
into the FP registers. */
|
for (x = 0; x < nargs; x++)
|
for (x = 0; x < nargs; x++)
|
{
|
{
|
int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[x])));
|
int len = TYPE_LENGTH (check_typedef (VALUE_TYPE (args[x])));
|
value_ptr copyarg = args[x];
|
value_ptr copyarg = args[x];
|
int copylen = len;
|
int copylen = len;
|
|
|
/* This code is, of course, no longer correct. */
|
/* This code is, of course, no longer correct. */
|
if (copylen < TYPE_LENGTH (builtin_type_long))
|
if (copylen < TYPE_LENGTH (builtin_type_long))
|
{
|
{
|
copyarg = value_cast (builtin_type_long, copyarg);
|
copyarg = value_cast (builtin_type_long, copyarg);
|
copylen = TYPE_LENGTH (builtin_type_long);
|
copylen = TYPE_LENGTH (builtin_type_long);
|
}
|
}
|
write_memory (tempsp, VALUE_CONTENTS (copyarg), copylen);
|
write_memory (tempsp, VALUE_CONTENTS (copyarg), copylen);
|
tempsp += copylen;
|
tempsp += copylen;
|
if (TYPE_CODE (VALUE_TYPE (args[x])) == TYPE_CODE_FLT && regnum < 32)
|
if (TYPE_CODE (VALUE_TYPE (args[x])) == TYPE_CODE_FLT && regnum < 32)
|
{
|
{
|
/* This gets copied into a FP register. */
|
/* This gets copied into a FP register. */
|
int nextreg = regnum + 2;
|
int nextreg = regnum + 2;
|
char *data = VALUE_CONTENTS (args[x]);
|
char *data = VALUE_CONTENTS (args[x]);
|
/* Floats go into the lower half of a FP register pair; quads
|
/* Floats go into the lower half of a FP register pair; quads
|
use 2 pairs. */
|
use 2 pairs. */
|
|
|
if (len == 16)
|
if (len == 16)
|
nextreg += 2;
|
nextreg += 2;
|
else if (len == 4)
|
else if (len == 4)
|
regnum++;
|
regnum++;
|
|
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM + regnum),
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM + regnum),
|
data,
|
data,
|
len);
|
len);
|
regnum = nextreg;
|
regnum = nextreg;
|
}
|
}
|
}
|
}
|
return sp;
|
return sp;
|
}
|
}
|
|
|
/* Values <= 32 bytes are returned in o0-o3 (floating-point values are
|
/* Values <= 32 bytes are returned in o0-o3 (floating-point values are
|
returned in f0-f3). */
|
returned in f0-f3). */
|
void
|
void
|
sparc64_extract_return_value (type, regbuf, valbuf, bitoffset)
|
sparc64_extract_return_value (type, regbuf, valbuf, bitoffset)
|
struct type *type;
|
struct type *type;
|
char *regbuf;
|
char *regbuf;
|
char *valbuf;
|
char *valbuf;
|
int bitoffset;
|
int bitoffset;
|
{
|
{
|
int typelen = TYPE_LENGTH (type);
|
int typelen = TYPE_LENGTH (type);
|
int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
|
int regsize = REGISTER_RAW_SIZE (O0_REGNUM);
|
|
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
if (TYPE_CODE (type) == TYPE_CODE_FLT && SPARC_HAS_FPU)
|
{
|
{
|
memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
|
memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM)], typelen);
|
return;
|
return;
|
}
|
}
|
|
|
if (TYPE_CODE (type) != TYPE_CODE_STRUCT
|
if (TYPE_CODE (type) != TYPE_CODE_STRUCT
|
|| (TYPE_LENGTH (type) > 32))
|
|| (TYPE_LENGTH (type) > 32))
|
{
|
{
|
memcpy (valbuf,
|
memcpy (valbuf,
|
®buf[O0_REGNUM * regsize +
|
®buf[O0_REGNUM * regsize +
|
(typelen >= regsize ? 0 : regsize - typelen)],
|
(typelen >= regsize ? 0 : regsize - typelen)],
|
typelen);
|
typelen);
|
return;
|
return;
|
}
|
}
|
else
|
else
|
{
|
{
|
char *o0 = ®buf[O0_REGNUM * regsize];
|
char *o0 = ®buf[O0_REGNUM * regsize];
|
char *f0 = ®buf[FP0_REGNUM * regsize];
|
char *f0 = ®buf[FP0_REGNUM * regsize];
|
int x;
|
int x;
|
|
|
for (x = 0; x < TYPE_NFIELDS (type); x++)
|
for (x = 0; x < TYPE_NFIELDS (type); x++)
|
{
|
{
|
struct field *f = &TYPE_FIELDS (type)[x];
|
struct field *f = &TYPE_FIELDS (type)[x];
|
/* FIXME: We may need to handle static fields here. */
|
/* FIXME: We may need to handle static fields here. */
|
int whichreg = (f->loc.bitpos + bitoffset) / 32;
|
int whichreg = (f->loc.bitpos + bitoffset) / 32;
|
int remainder = ((f->loc.bitpos + bitoffset) % 32) / 8;
|
int remainder = ((f->loc.bitpos + bitoffset) % 32) / 8;
|
int where = (f->loc.bitpos + bitoffset) / 8;
|
int where = (f->loc.bitpos + bitoffset) / 8;
|
int size = TYPE_LENGTH (f->type);
|
int size = TYPE_LENGTH (f->type);
|
int typecode = TYPE_CODE (f->type);
|
int typecode = TYPE_CODE (f->type);
|
|
|
if (typecode == TYPE_CODE_STRUCT)
|
if (typecode == TYPE_CODE_STRUCT)
|
{
|
{
|
sparc64_extract_return_value (f->type,
|
sparc64_extract_return_value (f->type,
|
regbuf,
|
regbuf,
|
valbuf,
|
valbuf,
|
bitoffset + f->loc.bitpos);
|
bitoffset + f->loc.bitpos);
|
}
|
}
|
else if (typecode == TYPE_CODE_FLT)
|
else if (typecode == TYPE_CODE_FLT)
|
{
|
{
|
memcpy (valbuf + where, &f0[whichreg * 4] + remainder, size);
|
memcpy (valbuf + where, &f0[whichreg * 4] + remainder, size);
|
}
|
}
|
else
|
else
|
{
|
{
|
memcpy (valbuf + where, &o0[whichreg * 4] + remainder, size);
|
memcpy (valbuf + where, &o0[whichreg * 4] + remainder, size);
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
|
|
#endif
|
#endif
|
|
|
