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// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/WAND1.v,v 1.1.1.1 2001-11-04 19:00:00 lampret Exp $
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// $Header: /home/marcus/revision_ctrl_test/oc_cvs/cvs/or1k/mp3/lib/xilinx/unisims/WAND1.v,v 1.1.1.1 2001-11-04 19:00:00 lampret Exp $
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/*
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/*
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FUNCTION : 1-INPUT WIRED AND GATE
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FUNCTION : 1-INPUT WIRED AND GATE
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*/
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*/
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`timescale 100 ps / 10 ps
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`timescale 100 ps / 10 ps
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`celldefine
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`celldefine
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module WAND1 (O, I);
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module WAND1 (O, I);
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parameter cds_action = "ignore";
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parameter cds_action = "ignore";
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output O;
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output O;
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input I;
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input I;
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wand O;
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wand O;
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bufif0 T1 (O, I, I);
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bufif0 T1 (O, I, I);
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specify
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specify
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(I *> O) = (1, 1);
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(I *> O) = (1, 1);
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endspecify
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endspecify
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endmodule
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endmodule
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`endcelldefine
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`endcelldefine
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