/* libtoplevel.c -- Top level simulator library source file
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/* libtoplevel.c -- Top level simulator library source file
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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Copyright (C) 2008 Embecosm Limited
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Copyright (C) 2008 Embecosm Limited
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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This file is part of OpenRISC 1000 Architectural Simulator.
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify it
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This program is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the Free
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under the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3 of the License, or (at your option)
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Software Foundation; either version 3 of the License, or (at your option)
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any later version.
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any later version.
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This program is distributed in the hope that it will be useful, but WITHOUT
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This program is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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more details.
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You should have received a copy of the GNU General Public License along
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You should have received a copy of the GNU General Public License along
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This program is commented throughout in a fashion suitable for processing
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/* This program is commented throughout in a fashion suitable for processing
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with Doxygen. */
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with Doxygen. */
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/* Autoconf and/or portability configuration */
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/* Autoconf and/or portability configuration */
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#include "config.h"
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#include "config.h"
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/* System includes */
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/* System includes */
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#include <stdlib.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <signal.h>
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#include <signal.h>
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/* Package includes */
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/* Package includes */
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#include "or1ksim.h"
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#include "or1ksim.h"
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#include "sim-config.h"
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#include "sim-config.h"
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#include "toplevel-support.h"
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#include "toplevel-support.h"
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#include "sched.h"
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#include "sched.h"
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#include "execute.h"
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#include "execute.h"
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#include "pic.h"
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#include "pic.h"
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Initialize the simulator.
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/*!Initialize the simulator.
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Allows specification of an (optional) config file and an image file. Builds
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Allows specification of an (optional) config file and an image file. Builds
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up dummy argc/argv to pass to the existing argument parser.
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up dummy argc/argv to pass to the existing argument parser.
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@param[in] config_file Or1ksim configuration file name
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@param[in] config_file Or1ksim configuration file name
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@param[in] image_file The program image to execute
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@param[in] image_file The program image to execute
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@param[in] class_ptr Pointer to a C++ class instance (for use when
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@param[in] class_ptr Pointer to a C++ class instance (for use when
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called by C++)
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called by C++)
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@param[in] upr Upcall routine for reads
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@param[in] upr Upcall routine for reads
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@param[in] upw Upcall routine for writes
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@param[in] upw Upcall routine for writes
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@return 0 on success and an error code on failure */
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@return 0 on success and an error code on failure */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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int
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int
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or1ksim_init (const char *config_file,
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or1ksim_init (const char *config_file,
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const char *image_file,
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const char *image_file,
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void *class_ptr,
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void *class_ptr,
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unsigned long int (*upr) (void *class_ptr,
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unsigned long int (*upr) (void *class_ptr,
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unsigned long int addr,
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unsigned long int addr,
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unsigned long int mask),
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unsigned long int mask),
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void (*upw) (void *class_ptr,
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void (*upw) (void *class_ptr,
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unsigned long int addr,
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unsigned long int addr,
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unsigned long int mask, unsigned long int wdata))
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unsigned long int mask, unsigned long int wdata))
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{
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{
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int dummy_argc;
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int dummy_argc;
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char *dummy_argv[4];
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char *dummy_argv[4];
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/* Dummy argv array. Varies depending on whether an image file is
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/* Dummy argv array. Varies depending on whether an image file is
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specified. */
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specified. */
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dummy_argv[0] = "libsim";
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dummy_argv[0] = "libsim";
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dummy_argv[1] = "-f";
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dummy_argv[1] = "-f";
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dummy_argv[2] = (char *) ((NULL != config_file) ? config_file : "sim.cfg");
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dummy_argv[2] = (char *) ((NULL != config_file) ? config_file : "sim.cfg");
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dummy_argv[3] = (char *) image_file;
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dummy_argv[3] = (char *) image_file;
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dummy_argc = (NULL == image_file) ? 3 : 4;
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dummy_argc = (NULL == image_file) ? 3 : 4;
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/* Initialization copied from existing main() */
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/* Initialization copied from existing main() */
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srand (getpid ());
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srand (getpid ());
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init_defconfig ();
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init_defconfig ();
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reg_config_secs ();
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reg_config_secs ();
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if (parse_args (dummy_argc, dummy_argv))
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if (parse_args (dummy_argc, dummy_argv))
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{
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{
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return OR1KSIM_RC_BADINIT;
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return OR1KSIM_RC_BADINIT;
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}
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}
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config.sim.profile = 0; /* No profiling */
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config.sim.profile = 0; /* No profiling */
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config.sim.mprofile = 0;
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config.sim.mprofile = 0;
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config.ext.class_ptr = class_ptr; /* SystemC linkage */
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config.ext.class_ptr = class_ptr; /* SystemC linkage */
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config.ext.read_up = upr;
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config.ext.read_up = upr;
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config.ext.write_up = upw;
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config.ext.write_up = upw;
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print_config (); /* Will go eventually */
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print_config (); /* Will go eventually */
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signal (SIGINT, ctrl_c); /* Not sure we want this really */
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signal (SIGINT, ctrl_c); /* Not sure we want this really */
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runtime.sim.hush = 1; /* Not sure if this is needed */
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runtime.sim.hush = 1; /* Not sure if this is needed */
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do_stats = config.cpu.superscalar ||
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do_stats = config.cpu.superscalar ||
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config.cpu.dependstats ||
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config.cpu.dependstats ||
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config.sim.history ||
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config.sim.history ||
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config.sim.exe_log;
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config.sim.exe_log;
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sim_init ();
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sim_init ();
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runtime.sim.ext_int_set = 0; /* No interrupts pending to be set */
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runtime.sim.ext_int_set = 0; /* No interrupts pending to be set */
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runtime.sim.ext_int_clr = 0; /* No interrupts pending to be cleared */
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runtime.sim.ext_int_clr = 0; /* No interrupts pending to be cleared */
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return OR1KSIM_RC_OK;
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return OR1KSIM_RC_OK;
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} /* or1ksim_init() */
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} /* or1ksim_init() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Run the simulator
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/*!Run the simulator
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The argument is a time in seconds, which is converted to a number of
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The argument is a time in seconds, which is converted to a number of
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cycles, if positive. A negative value means "run for ever".
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cycles, if positive. A negative value means "run for ever".
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The semantics are that the duration for which the run may occur may be
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The semantics are that the duration for which the run may occur may be
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changed mid-run by a call to or1ksim_reset_duration(). This is to allow for
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changed mid-run by a call to or1ksim_reset_duration(). This is to allow for
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the upcalls to generic components adding time, and reducing the time
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the upcalls to generic components adding time, and reducing the time
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permitted for ISS execution before synchronization of the parent SystemC
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permitted for ISS execution before synchronization of the parent SystemC
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wrapper.
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wrapper.
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This is over-ridden if the call was for a negative duration, which means
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This is over-ridden if the call was for a negative duration, which means
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run forever!
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run forever!
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Uses a simplified version of the old main program loop. Returns success if
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Uses a simplified version of the old main program loop. Returns success if
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the requested number of cycles were run and an error code otherwise.
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the requested number of cycles were run and an error code otherwise.
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@param[in] duration Time to execute for (seconds)
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@param[in] duration Time to execute for (seconds)
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@return OR1KSIM_RC_OK if we run to completion, OR1KSIM_RC_BRKPT if we hit
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@return OR1KSIM_RC_OK if we run to completion, OR1KSIM_RC_BRKPT if we hit
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a breakpoint (not clear how this can be set without CLI access) */
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a breakpoint (not clear how this can be set without CLI access) */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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int
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int
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or1ksim_run (double duration)
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or1ksim_run (double duration)
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{
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{
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const int num_ints = sizeof (runtime.sim.ext_int_set) * 8;
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const int num_ints = sizeof (runtime.sim.ext_int_set) * 8;
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or1ksim_reset_duration (duration);
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or1ksim_reset_duration (duration);
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/* Loop until we have done enough cycles (or forever if we had a negative
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/* Loop until we have done enough cycles (or forever if we had a negative
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duration) */
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duration) */
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while (duration < 0.0 || (runtime.sim.cycles < runtime.sim.end_cycles))
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while (duration < 0.0 || (runtime.sim.cycles < runtime.sim.end_cycles))
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{
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{
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long long int time_start = runtime.sim.cycles;
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long long int time_start = runtime.sim.cycles;
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int i; /* Interrupt # */
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int i; /* Interrupt # */
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/* Each cycle has counter of mem_cycles; this value is joined with cycles
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/* Each cycle has counter of mem_cycles; this value is joined with cycles
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* at the end of the cycle; no sim originated memory accesses should be
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* at the end of the cycle; no sim originated memory accesses should be
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* performed inbetween.
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* performed inbetween.
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*/
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*/
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runtime.sim.mem_cycles = 0;
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runtime.sim.mem_cycles = 0;
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if (cpu_clock ())
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if (cpu_clock ())
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{
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{
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return OR1KSIM_RC_BRKPT; /* Hit a breakpoint */
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return OR1KSIM_RC_BRKPT; /* Hit a breakpoint */
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}
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}
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runtime.sim.cycles += runtime.sim.mem_cycles;
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runtime.sim.cycles += runtime.sim.mem_cycles;
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/* Take any external interrupts. Outer test is for the common case for
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/* Take any external interrupts. Outer test is for the common case for
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efficiency. */
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efficiency. */
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if (0 != runtime.sim.ext_int_set)
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if (0 != runtime.sim.ext_int_set)
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{
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{
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for (i = 0; i < num_ints; i++)
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for (i = 0; i < num_ints; i++)
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{
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{
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if (0x1 == ((runtime.sim.ext_int_set >> i) & 0x1))
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if (0x1 == ((runtime.sim.ext_int_set >> i) & 0x1))
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{
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{
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report_interrupt (i);
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report_interrupt (i);
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runtime.sim.ext_int_set &= ~(1 << i); /* Clear req flag */
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runtime.sim.ext_int_set &= ~(1 << i); /* Clear req flag */
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}
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}
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}
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}
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}
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}
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/* Clear any interrupts as requested. For edge triggered interrupts this
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/* Clear any interrupts as requested. For edge triggered interrupts this
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will happen in the same cycle. For level triggered, it must be an
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will happen in the same cycle. For level triggered, it must be an
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explicit call. */
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explicit call. */
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if (0 != runtime.sim.ext_int_clr)
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if (0 != runtime.sim.ext_int_clr)
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{
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{
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for (i = 0; i < num_ints; i++)
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for (i = 0; i < num_ints; i++)
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{
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{
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/* Only clear interrupts that have been explicitly cleared */
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/* Only clear interrupts that have been explicitly cleared */
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if(0x1 == ((runtime.sim.ext_int_clr >> i) & 0x1))
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if(0x1 == ((runtime.sim.ext_int_clr >> i) & 0x1))
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{
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{
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clear_interrupt(i);
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clear_interrupt(i);
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runtime.sim.ext_int_clr &= ~(1 << i); /* Clear clr flag */
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runtime.sim.ext_int_clr &= ~(1 << i); /* Clear clr flag */
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}
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}
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}
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}
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}
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}
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/* Update the scheduler queue */
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/* Update the scheduler queue */
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scheduler.job_queue->time -= (runtime.sim.cycles - time_start);
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scheduler.job_queue->time -= (runtime.sim.cycles - time_start);
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if (scheduler.job_queue->time <= 0)
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if (scheduler.job_queue->time <= 0)
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{
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{
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do_scheduler ();
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do_scheduler ();
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}
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}
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}
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}
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return OR1KSIM_RC_OK;
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return OR1KSIM_RC_OK;
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} /* or1ksim_run() */
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} /* or1ksim_run() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Reset the run-time simulation end point
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/*!Reset the run-time simulation end point
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Reset the time for which the simulation should run to the specified duration
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Reset the time for which the simulation should run to the specified duration
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from NOW (i.e. NOT from when the run started).
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from NOW (i.e. NOT from when the run started).
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@param[in] duration Time to run for in seconds */
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@param[in] duration Time to run for in seconds */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void
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void
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or1ksim_reset_duration (double duration)
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or1ksim_reset_duration (double duration)
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{
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{
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runtime.sim.end_cycles =
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runtime.sim.end_cycles =
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runtime.sim.cycles +
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runtime.sim.cycles +
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(long long int) (duration * 1.0e12 / (double) config.sim.clkcycle_ps);
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(long long int) (duration * 1.0e12 / (double) config.sim.clkcycle_ps);
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} /* or1ksim_reset_duration() */
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} /* or1ksim_reset_duration() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Return time executed so far
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/*!Return time executed so far
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Internal utility to return the time executed so far. Note that this is a
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Internal utility to return the time executed so far. Note that this is a
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re-entrant routine.
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re-entrant routine.
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@return Time executed so far in seconds */
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@return Time executed so far in seconds */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static double
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static double
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internal_or1ksim_time ()
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internal_or1ksim_time ()
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{
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{
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return (double) runtime.sim.cycles * (double) config.sim.clkcycle_ps /
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return (double) runtime.sim.cycles * (double) config.sim.clkcycle_ps /
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1.0e12;
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1.0e12;
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} // or1ksim_cycle_count()
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} // or1ksim_cycle_count()
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Mark a time point in the simulation
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/*!Mark a time point in the simulation
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Sets the internal parameter recording this point in the simulation */
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Sets the internal parameter recording this point in the simulation */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void
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void
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or1ksim_set_time_point ()
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or1ksim_set_time_point ()
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{
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{
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runtime.sim.time_point = internal_or1ksim_time ();
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runtime.sim.time_point = internal_or1ksim_time ();
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} /* or1ksim_set_time_point() */
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} /* or1ksim_set_time_point() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Return the time since the time point was set
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/*!Return the time since the time point was set
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Get the value from the internal parameter */
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Get the value from the internal parameter */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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double
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double
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or1ksim_get_time_period ()
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or1ksim_get_time_period ()
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{
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{
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return internal_or1ksim_time () - runtime.sim.time_point;
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return internal_or1ksim_time () - runtime.sim.time_point;
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} /* or1ksim_get_time_period() */
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} /* or1ksim_get_time_period() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Return the endianism of the model
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/*!Return the endianism of the model
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Note that this is a re-entrant routine.
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Note that this is a re-entrant routine.
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@return 1 if the model is little endian, 0 otherwise. */
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@return 1 if the model is little endian, 0 otherwise. */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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int
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int
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or1ksim_is_le ()
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or1ksim_is_le ()
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{
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{
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#ifdef OR32_BIG_ENDIAN
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#ifdef OR32_BIG_ENDIAN
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return 0;
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return 0;
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#else
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#else
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return 1;
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return 1;
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#endif
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#endif
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} /* or1ksim_is_le() */
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} /* or1ksim_is_le() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Return the clock rate
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/*!Return the clock rate
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Value is part of the configuration
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Value is part of the configuration
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@return Clock rate in Hz. */
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@return Clock rate in Hz. */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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unsigned long int
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unsigned long int
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or1ksim_clock_rate ()
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or1ksim_clock_rate ()
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{
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{
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return (unsigned long int) (1000000000000ULL /
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return (unsigned long int) (1000000000000ULL /
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(unsigned long long int) (config.sim.
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(unsigned long long int) (config.sim.
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clkcycle_ps));
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clkcycle_ps));
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} /* or1ksim_clock_rate() */
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} /* or1ksim_clock_rate() */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Trigger an edge triggered interrupt
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/*!Trigger an edge triggered interrupt
|
|
|
This function is appropriate for edge triggered interrupts, which are taken
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This function is appropriate for edge triggered interrupts, which are taken
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and then immediately cleared.
|
and then immediately cleared.
|
|
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@note There is no check that the specified interrupt number is reasonable
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@note There is no check that the specified interrupt number is reasonable
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(i.e. <= 31).
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(i.e. <= 31).
|
|
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@param[in] i The interrupt number */
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@param[in] i The interrupt number */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void
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void
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or1ksim_interrupt (int i)
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or1ksim_interrupt (int i)
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{
|
{
|
if (!config.pic.edge_trigger)
|
if (!config.pic.edge_trigger)
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{
|
{
|
fprintf (stderr, "Warning: or1ksim_interrupt should not be used for "
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fprintf (stderr, "Warning: or1ksim_interrupt should not be used for "
|
"edge triggered interrupts. Ignored\n");
|
"edge triggered interrupts. Ignored\n");
|
}
|
}
|
else
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else
|
{
|
{
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runtime.sim.ext_int_set |= 1 << i; // Better not be > 31!
|
runtime.sim.ext_int_set |= 1 << i; // Better not be > 31!
|
runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31!
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runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31!
|
}
|
}
|
} /* or1ksim_interrupt() */
|
} /* or1ksim_interrupt() */
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|
|
|
|
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
/*!Set a level triggered interrupt
|
/*!Set a level triggered interrupt
|
|
|
This function is appropriate for level triggered interrupts, which must be
|
This function is appropriate for level triggered interrupts, which must be
|
explicitly cleared in a separate call.
|
explicitly cleared in a separate call.
|
|
|
@note There is no check that the specified interrupt number is reasonable
|
@note There is no check that the specified interrupt number is reasonable
|
(i.e. <= 31).
|
(i.e. <= 31).
|
|
|
@param[in] i The interrupt number to set */
|
@param[in] i The interrupt number to set */
|
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
void
|
void
|
or1ksim_interrupt_set (int i)
|
or1ksim_interrupt_set (int i)
|
{
|
{
|
if (config.pic.edge_trigger)
|
if (config.pic.edge_trigger)
|
{
|
{
|
fprintf (stderr, "Warning: or1ksim_interrupt_set should not be used for "
|
fprintf (stderr, "Warning: or1ksim_interrupt_set should not be used for "
|
"level triggered interrupts. Ignored\n");
|
"level triggered interrupts. Ignored\n");
|
}
|
}
|
else
|
else
|
{
|
{
|
runtime.sim.ext_int_set |= 1 << i; // Better not be > 31!
|
runtime.sim.ext_int_set |= 1 << i; // Better not be > 31!
|
}
|
}
|
} /* or1ksim_interrupt() */
|
} /* or1ksim_interrupt() */
|
|
|
|
|
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
/*!Clear a level triggered interrupt
|
/*!Clear a level triggered interrupt
|
|
|
This function is appropriate for level triggered interrupts, which must be
|
This function is appropriate for level triggered interrupts, which must be
|
explicitly set first in a separate call.
|
explicitly set first in a separate call.
|
|
|
@note There is no check that the specified interrupt number is reasonable
|
@note There is no check that the specified interrupt number is reasonable
|
(i.e. <= 31).
|
(i.e. <= 31).
|
|
|
@param[in] i The interrupt number to clear */
|
@param[in] i The interrupt number to clear */
|
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
void
|
void
|
or1ksim_interrupt_clear (int i)
|
or1ksim_interrupt_clear (int i)
|
{
|
{
|
if (config.pic.edge_trigger)
|
if (config.pic.edge_trigger)
|
{
|
{
|
fprintf (stderr, "Warning: or1ksim_interrupt_clear should not be used "
|
fprintf (stderr, "Warning: or1ksim_interrupt_clear should not be used "
|
"for level triggered interrupts. Ignored\n");
|
"for level triggered interrupts. Ignored\n");
|
}
|
}
|
else
|
else
|
{
|
{
|
runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31!
|
runtime.sim.ext_int_clr |= 1 << i; // Better not be > 31!
|
}
|
}
|
} /* or1ksim_interrupt() */
|
} /* or1ksim_interrupt() */
|
|
|
