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https://opencores.org/ocsvn/or1k/or1k/trunk
[/] [or1k/] [trunk/] [orpmon/] [ram.ld] - Diff between revs 1312 and 1765
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Rev 1312 |
Rev 1765 |
MEMORY
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MEMORY
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{
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{
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vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
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vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
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ram : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000
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ram : ORIGIN = 0x00002000, LENGTH = 0x00400000 - 0x00002000
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flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000
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flash : ORIGIN = 0xf0000000, LENGTH = 0x04000000
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}
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}
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SECTIONS
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SECTIONS
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{
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{
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.vectors :
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.vectors :
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{
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{
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*(.crc)
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*(.crc)
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*(.vectors)
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*(.vectors)
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} > vectors
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} > vectors
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.text :
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.text :
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{
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{
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_text_begin = .;
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_text_begin = .;
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*(.text)
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*(.text)
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_text_end = .;
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_text_end = .;
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} > ram
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} > ram
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.mytext :
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.mytext :
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{
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{
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*(.mytext)
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*(.mytext)
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_fprog_addr = .;
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_fprog_addr = .;
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. += 0x500;
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. += 0x500;
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} > ram
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} > ram
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.data :
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.data :
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AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))
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AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))
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{
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{
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*(.data)
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*(.data)
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} > ram
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} > ram
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.rodata :
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.rodata :
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{
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{
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*(.rodata)
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*(.rodata)
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*(.rodata.*)
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*(.rodata.*)
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} > ram
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} > ram
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.bss :
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.bss :
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{
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{
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*(.bss)
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*(.bss)
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} > ram
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} > ram
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.stack :
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.stack :
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{
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{
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*(.stack)
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*(.stack)
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_src_addr = .;
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_src_addr = .;
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} > ram
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} > ram
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. = 0xf0000100;
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. = 0xf0000100;
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.monitor ALIGN(0x40000) :
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.monitor ALIGN(0x40000) :
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{
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{
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*(.monitor)
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*(.monitor)
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} > flash
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} > flash
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. += 0x100000;
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. += 0x100000;
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.config ALIGN(0x40000) :
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.config ALIGN(0x40000) :
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{
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{
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_cfg_start = .;
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_cfg_start = .;
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*(.config)
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*(.config)
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_cfg_end = .;
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_cfg_end = .;
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} > flash
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} > flash
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}
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}
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