#include
|
#include
|
|
|
@ Code for DMA with the 1772 fdc
|
@ Code for DMA with the 1772 fdc
|
.text
|
.text
|
|
|
|
|
.global _fdc1772_dataaddr
|
.global _fdc1772_dataaddr
|
_fdc1772_fiqdata:
|
_fdc1772_fiqdata:
|
@ Number of bytes left to DMA
|
@ Number of bytes left to DMA
|
.global _fdc1772_bytestogo
|
.global _fdc1772_bytestogo
|
_fdc1772_bytestogo:
|
_fdc1772_bytestogo:
|
.word 0
|
.word 0
|
@ Place to put/get data from in DMA
|
@ Place to put/get data from in DMA
|
.global _fdc1772_dataaddr
|
.global _fdc1772_dataaddr
|
_fdc1772_dataaddr:
|
_fdc1772_dataaddr:
|
.word 0
|
.word 0
|
|
|
.global _fdc1772_fdc_int_done
|
.global _fdc1772_fdc_int_done
|
_fdc1772_fdc_int_done:
|
_fdc1772_fdc_int_done:
|
.word 0
|
.word 0
|
.global _fdc1772_comendstatus
|
.global _fdc1772_comendstatus
|
_fdc1772_comendstatus:
|
_fdc1772_comendstatus:
|
.word 0
|
.word 0
|
|
|
@ We hang this off DMA channel 1
|
@ We hang this off DMA channel 1
|
.global _fdc1772_comendhandler
|
.global _fdc1772_comendhandler
|
_fdc1772_comendhandler:
|
_fdc1772_comendhandler:
|
mov r8,#IOC_BASE
|
mov r8,#IOC_BASE
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
tst r9,#2
|
tst r9,#2
|
subeqs pc,r14,#4 @ should I leave a space here
|
subeqs pc,r14,#4 @ should I leave a space here
|
orr r9,r8,#0x10000 @ FDC base
|
orr r9,r8,#0x10000 @ FDC base
|
adr r8,_fdc1772_fdc_int_done
|
adr r8,_fdc1772_fdc_int_done
|
ldrb r10,[r9,#0] @ FDC status
|
ldrb r10,[r9,#0] @ FDC status
|
mov r9,#1 @ Got a FIQ flag
|
mov r9,#1 @ Got a FIQ flag
|
stmia r8,{r9,r10}
|
stmia r8,{r9,r10}
|
subs pc,r14,#4
|
subs pc,r14,#4
|
|
|
|
|
.global _fdc1772_dma_read
|
.global _fdc1772_dma_read
|
_fdc1772_dma_read:
|
_fdc1772_dma_read:
|
mov r8,#IOC_BASE
|
mov r8,#IOC_BASE
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
tst r9,#1
|
tst r9,#1
|
beq _fdc1772_dma_read_notours
|
beq _fdc1772_dma_read_notours
|
orr r8,r8,#0x10000 @ FDC base
|
orr r8,r8,#0x10000 @ FDC base
|
ldrb r10,[r8,#0xc] @ Read from FDC data reg (also clears interrupt)
|
ldrb r10,[r8,#0xc] @ Read from FDC data reg (also clears interrupt)
|
ldmia r11,{r8,r9}
|
ldmia r11,{r8,r9}
|
subs r8,r8,#1 @ One less byte to go
|
subs r8,r8,#1 @ One less byte to go
|
@ If there was somewhere for this data to go then store it and update pointers
|
@ If there was somewhere for this data to go then store it and update pointers
|
strplb r10,[r9],#1 @ Store the data and increment the pointer
|
strplb r10,[r9],#1 @ Store the data and increment the pointer
|
stmplia r11,{r8,r9} @ Update count/pointers
|
stmplia r11,{r8,r9} @ Update count/pointers
|
@ Handle any other interrupts if there are any
|
@ Handle any other interrupts if there are any
|
_fdc1772_dma_read_notours:
|
_fdc1772_dma_read_notours:
|
@ Cant branch because this code has been copied down to the FIQ vector
|
@ Cant branch because this code has been copied down to the FIQ vector
|
ldr pc,[pc,#-4]
|
ldr pc,[pc,#-4]
|
.word _fdc1772_comendhandler
|
.word _fdc1772_comendhandler
|
.global _fdc1772_dma_read_end
|
.global _fdc1772_dma_read_end
|
_fdc1772_dma_read_end:
|
_fdc1772_dma_read_end:
|
|
|
.global _fdc1772_dma_write
|
.global _fdc1772_dma_write
|
_fdc1772_dma_write:
|
_fdc1772_dma_write:
|
mov r8,#IOC_BASE
|
mov r8,#IOC_BASE
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
ldrb r9,[r8,#0x34] @ IOC FIQ status
|
tst r9,#1
|
tst r9,#1
|
beq _fdc1772_dma_write_notours
|
beq _fdc1772_dma_write_notours
|
orr r8,r8,#0x10000 @ FDC base
|
orr r8,r8,#0x10000 @ FDC base
|
ldmia r11,{r9,r10}
|
ldmia r11,{r9,r10}
|
subs r9,r9,#1 @ One less byte to go
|
subs r9,r9,#1 @ One less byte to go
|
@ If there really is some data then get it, store it and update count
|
@ If there really is some data then get it, store it and update count
|
ldrplb r12,[r10],#1
|
ldrplb r12,[r10],#1
|
strplb r12,[r8,#0xc] @ write it to FDC data reg
|
strplb r12,[r8,#0xc] @ write it to FDC data reg
|
stmplia r11,{r9,r10} @ Update count and pointer - should clear interrupt
|
stmplia r11,{r9,r10} @ Update count and pointer - should clear interrupt
|
@ Handle any other interrupts
|
@ Handle any other interrupts
|
_fdc1772_dma_write_notours:
|
_fdc1772_dma_write_notours:
|
@ Cant branch because this code has been copied down to the FIQ vector
|
@ Cant branch because this code has been copied down to the FIQ vector
|
ldr pc,[pc,#-4]
|
ldr pc,[pc,#-4]
|
.word _fdc1772_comendhandler
|
.word _fdc1772_comendhandler
|
|
|
.global _fdc1772_dma_write_end
|
.global _fdc1772_dma_write_end
|
_fdc1772_dma_write_end:
|
_fdc1772_dma_write_end:
|
|
|
|
|
@ Setup the FIQ R11 to point to the data and store the count, address
|
@ Setup the FIQ R11 to point to the data and store the count, address
|
@ for this dma
|
@ for this dma
|
@ R0=count
|
@ R0=count
|
@ R1=address
|
@ R1=address
|
.global _fdc1772_setupdma
|
.global _fdc1772_setupdma
|
_fdc1772_setupdma:
|
_fdc1772_setupdma:
|
@ The big job is flipping in and out of FIQ mode
|
@ The big job is flipping in and out of FIQ mode
|
adr r2,_fdc1772_fiqdata @ This is what we really came here for
|
adr r2,_fdc1772_fiqdata @ This is what we really came here for
|
stmia r2,{r0,r1}
|
stmia r2,{r0,r1}
|
mov r3, pc
|
mov r3, pc
|
teqp pc,#0x0c000001 @ Disable FIQs, IRQs and switch to FIQ mode
|
teqp pc,#0x0c000001 @ Disable FIQs, IRQs and switch to FIQ mode
|
mov r0,r0 @ NOP
|
mov r0,r0 @ NOP
|
mov r11,r2
|
mov r11,r2
|
teqp r3,#0 @ Normal mode
|
teqp r3,#0 @ Normal mode
|
mov r0,r0 @ NOP
|
mov r0,r0 @ NOP
|
mov pc,r14
|
mov pc,r14
|
|
|
|
|
