/*
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/*
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* linux/arch/arm/lib/io.S
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* linux/arch/arm/lib/io.S
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*
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*
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* Copyright (C) 1995, 1996 Russell King
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* Copyright (C) 1995, 1996 Russell King
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*/
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*/
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#include
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#include
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#include
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#include
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#include
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#include
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.text
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.text
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.align
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.align
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#define OUT(reg) \
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#define OUT(reg) \
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mov r8, reg, lsl $16 ;\
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mov r8, reg, lsl $16 ;\
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orr r8, r8, r8, lsr $16 ;\
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orr r8, r8, r8, lsr $16 ;\
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str r8, [r3, r0, lsl $2] ;\
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str r8, [r3, r0, lsl $2] ;\
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mov r8, reg, lsr $16 ;\
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mov r8, reg, lsr $16 ;\
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orr r8, r8, r8, lsl $16 ;\
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orr r8, r8, r8, lsl $16 ;\
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str r8, [r3, r0, lsl $2]
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str r8, [r3, r0, lsl $2]
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#define IN(reg) \
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#define IN(reg) \
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ldr reg, [r0] ;\
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ldr reg, [r0] ;\
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and reg, reg, ip ;\
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and reg, reg, ip ;\
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ldr lr, [r0] ;\
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ldr lr, [r0] ;\
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orr reg, reg, lr, lsl $16
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orr reg, reg, lr, lsl $16
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#if (IO_BASE == (PCIO_BASE & 0xff000000))
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#if (IO_BASE == (PCIO_BASE & 0xff000000))
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#define ADDR(off,reg) \
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#define ADDR(off,reg) \
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tst off, $0x80000000 ;\
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tst off, $0x80000000 ;\
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mov reg, $IO_BASE ;\
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mov reg, $IO_BASE ;\
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orreq reg, reg, $(PCIO_BASE & 0x00ff0000)
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orreq reg, reg, $(PCIO_BASE & 0x00ff0000)
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#else
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#else
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#define ADDR(off,reg) \
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#define ADDR(off,reg) \
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tst off, $0x80000000 ;\
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tst off, $0x80000000 ;\
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movne reg, $IO_BASE ;\
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movne reg, $IO_BASE ;\
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moveq reg, $(PCIO_BASE & 0xff000000) ;\
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moveq reg, $(PCIO_BASE & 0xff000000) ;\
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orreq reg, reg, $(PCIO_BASE & 0x00ff0000)
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orreq reg, reg, $(PCIO_BASE & 0x00ff0000)
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#endif
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#endif
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@ purpose: read a byte from a hardware register.
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@ purpose: read a byte from a hardware register.
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@ Proto : unsigned char inb(int address);
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@ Proto : unsigned char inb(int address);
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.global ___inb
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.global ___inb
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.global ___inb_p
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.global ___inb_p
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.global ___inbc
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.global ___inbc
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.global ___inbc_p
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.global ___inbc_p
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___inb:
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___inb:
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___inb_p:
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___inb_p:
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___inbc:
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___inbc:
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___inbc_p:
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___inbc_p:
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ADDR(r0,r2)
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ADDR(r0,r2)
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ldrb r0, [r2, r0, lsl#2]
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ldrb r0, [r2, r0, lsl#2]
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RETINSTR(mov,pc,lr)
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RETINSTR(mov,pc,lr)
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@ purpose: read a short word from a hardware register.
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@ purpose: read a short word from a hardware register.
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@ Proto : unsigned short inw(int address);
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@ Proto : unsigned short inw(int address);
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.global ___inw
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.global ___inw
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___inw: ADDR(r0,r2)
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___inw: ADDR(r0,r2)
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ldr r0, [r2, r0, lsl#2]
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ldr r0, [r2, r0, lsl#2]
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bic r0, r0, #0xff000000
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bic r0, r0, #0xff000000
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bic r0, r0, #0x00ff0000
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bic r0, r0, #0x00ff0000
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RETINSTR(mov,pc,lr)
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RETINSTR(mov,pc,lr)
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@ Purpose: write a byte to a hardware register.
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@ Purpose: write a byte to a hardware register.
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@ Proto : outb(unsigned char c,int address);
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@ Proto : outb(unsigned char c,int address);
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.global ___outb
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.global ___outb
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.global ___outb_p
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.global ___outb_p
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.global ___outbc
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.global ___outbc
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.global ___outbc_p
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.global ___outbc_p
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___outb:
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___outb:
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___outb_p:
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___outb_p:
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___outbc:
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___outbc:
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___outbc_p:
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___outbc_p:
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ADDR(r1,r2)
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ADDR(r1,r2)
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strb r0,[r2,r1,LSL#2]
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strb r0,[r2,r1,LSL#2]
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RETINSTR(mov,pc,lr)
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RETINSTR(mov,pc,lr)
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@ Purpose: write a short to a hardware register.
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@ Purpose: write a short to a hardware register.
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@ Proto : outw(unsigned short c,int address);
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@ Proto : outw(unsigned short c,int address);
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.global ___outw
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.global ___outw
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___outw: ADDR(r1,r2)
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___outw: ADDR(r1,r2)
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orr r0, r0, r0, lsl#16
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orr r0, r0, r0, lsl#16
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str r0, [r2, r1, lsl#2]
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str r0, [r2, r1, lsl#2]
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RETINSTR(mov,pc,lr)
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RETINSTR(mov,pc,lr)
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@ Purpose: read a block of data from a hardware register to memory.
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@ Purpose: read a block of data from a hardware register to memory.
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@ Proto : insw(int from_port, void *to, int len_in_words);
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@ Proto : insw(int from_port, void *to, int len_in_words);
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@ Proto : inswb(int from_port, void *to, int len_in_bytes);
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@ Proto : inswb(int from_port, void *to, int len_in_bytes);
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@ Notes : increment to
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@ Notes : increment to
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.global _insw
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.global _insw
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.global _inswb
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.global _inswb
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_insw: mov r2, r2, lsl#1
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_insw: mov r2, r2, lsl#1
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_inswb: mov ip, sp
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_inswb: mov ip, sp
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stmfd sp!, {r4 - r10 ,fp ,ip ,lr ,pc}
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stmfd sp!, {r4 - r10 ,fp ,ip ,lr ,pc}
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sub fp, ip, #4
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sub fp, ip, #4
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ADDR(r0,r3)
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ADDR(r0,r3)
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add r0, r3, r0, lsl #2
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add r0, r3, r0, lsl #2
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tst r1, #3
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tst r1, #3
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beq Linswok
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beq Linswok
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tst r1, #1
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tst r1, #1
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bne Linsw_notaligned
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bne Linsw_notaligned
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cmp r2, #1
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cmp r2, #1
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ldrge r4, [r0]
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ldrge r4, [r0]
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strgeb r4, [r1], #1
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strgeb r4, [r1], #1
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movgt r4, r4, LSR#8
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movgt r4, r4, LSR#8
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strgtb r4, [r1], #1
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strgtb r4, [r1], #1
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ldmleea fp, {r4 - r10, fp, sp, pc}^
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ldmleea fp, {r4 - r10, fp, sp, pc}^
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sub r2, r2, #2
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sub r2, r2, #2
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Linswok: mov ip, #0xFF
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Linswok: mov ip, #0xFF
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orr ip, ip, ip, lsl #8
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orr ip, ip, ip, lsl #8
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Linswlp: subs r2, r2, #64
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Linswlp: subs r2, r2, #64
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bmi Linsw_toosmall
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bmi Linsw_toosmall
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IN(r3)
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IN(r3)
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IN(r4)
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IN(r4)
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IN(r5)
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IN(r5)
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IN(r6)
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IN(r6)
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IN(r7)
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IN(r7)
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IN(r8)
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IN(r8)
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IN(r9)
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IN(r9)
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IN(r10)
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IN(r10)
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stmia r1!, {r3 - r10}
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stmia r1!, {r3 - r10}
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IN(r3)
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IN(r3)
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IN(r4)
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IN(r4)
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IN(r5)
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IN(r5)
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IN(r6)
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IN(r6)
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IN(r7)
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IN(r7)
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IN(r8)
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IN(r8)
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IN(r9)
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IN(r9)
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IN(r10)
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IN(r10)
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stmia r1!, {r3 - r10}
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stmia r1!, {r3 - r10}
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bne Linswlp
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bne Linswlp
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LOADREGS(ea, fp, {r4 - r10, fp, sp, pc})
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LOADREGS(ea, fp, {r4 - r10, fp, sp, pc})
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Linsw_toosmall:
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Linsw_toosmall:
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adds r2, r2, #32
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adds r2, r2, #32
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bmi Linsw_toosmall2
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bmi Linsw_toosmall2
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Linsw2lp: IN(r3)
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Linsw2lp: IN(r3)
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IN(r4)
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IN(r4)
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IN(r5)
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IN(r5)
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IN(r6)
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IN(r6)
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IN(r7)
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IN(r7)
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IN(r8)
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IN(r8)
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IN(r9)
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IN(r9)
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IN(r10)
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IN(r10)
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stmia r1!, {r3 - r10}
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stmia r1!, {r3 - r10}
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LOADREGS(eqea, fp, {r4 - r10, fp, sp, pc})
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LOADREGS(eqea, fp, {r4 - r10, fp, sp, pc})
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b Linsw_notaligned
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b Linsw_notaligned
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Linsw_toosmall2:
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Linsw_toosmall2:
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add r2, r2, #32
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add r2, r2, #32
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Linsw_notaligned:
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Linsw_notaligned:
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cmp r2, #1
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cmp r2, #1
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LOADREGS(ltea, fp, {r4 - r10, fp, sp, pc})
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LOADREGS(ltea, fp, {r4 - r10, fp, sp, pc})
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ldr r4, [r0]
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ldr r4, [r0]
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strb r4, [r1], #1
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strb r4, [r1], #1
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movgt r4, r4, LSR#8
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movgt r4, r4, LSR#8
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strgtb r4, [r1], #1
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strgtb r4, [r1], #1
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subs r2, r2, #2
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subs r2, r2, #2
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bgt Linsw_notaligned
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bgt Linsw_notaligned
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LOADREGS(ea, fp, {r4 - r10, fp, sp, pc})
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LOADREGS(ea, fp, {r4 - r10, fp, sp, pc})
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@ Purpose: write a block of data from memory to a hardware register.
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@ Purpose: write a block of data from memory to a hardware register.
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@ Proto : outsw(int to_reg, void *from, int len_in_words);
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@ Proto : outsw(int to_reg, void *from, int len_in_words);
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@ Proto : outswb(int to_reg, void *from, int len_in_bytes);
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@ Proto : outswb(int to_reg, void *from, int len_in_bytes);
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@ Notes : increments from
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@ Notes : increments from
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.global _outsw
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.global _outsw
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.global _outswb
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.global _outswb
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_outsw: mov r2, r2, LSL#1
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_outsw: mov r2, r2, LSL#1
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_outswb: mov ip, sp
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_outswb: mov ip, sp
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stmfd sp!, {r4 - r8, fp, ip, lr, pc}
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stmfd sp!, {r4 - r8, fp, ip, lr, pc}
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sub fp, ip, #4
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sub fp, ip, #4
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ADDR(r0,r3)
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ADDR(r0,r3)
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tst r1, #2
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tst r1, #2
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beq Loutsw32lp
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beq Loutsw32lp
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ldr r4, [r1], #2
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ldr r4, [r1], #2
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mov r4, r4, lsl #16
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mov r4, r4, lsl #16
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orr r4, r4, r4, lsr #16
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orr r4, r4, r4, lsr #16
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str r4, [r3, r0, lsl #2]
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str r4, [r3, r0, lsl #2]
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sub r2, r2, #2
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sub r2, r2, #2
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teq r2, #0
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teq r2, #0
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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Loutsw32lp: subs r2,r2,#32
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Loutsw32lp: subs r2,r2,#32
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blt Loutsw_toosmall
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blt Loutsw_toosmall
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ldmia r1!,{r4,r5,r6,r7}
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ldmia r1!,{r4,r5,r6,r7}
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OUT(r4)
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OUT(r4)
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OUT(r5)
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OUT(r5)
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OUT(r6)
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OUT(r6)
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OUT(r7)
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OUT(r7)
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ldmia r1!,{r4,r5,r6,r7}
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ldmia r1!,{r4,r5,r6,r7}
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OUT(r4)
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OUT(r4)
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OUT(r5)
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OUT(r5)
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OUT(r6)
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OUT(r6)
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OUT(r7)
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OUT(r7)
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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b Loutsw32lp
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b Loutsw32lp
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Loutsw_toosmall:
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Loutsw_toosmall:
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adds r2,r2,#32
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adds r2,r2,#32
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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LOADREGS(eqea, fp, {r4 - r8, fp, sp, pc})
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Llpx: ldr r4,[r1],#2
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Llpx: ldr r4,[r1],#2
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mov r4,r4,LSL#16
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mov r4,r4,LSL#16
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orr r4,r4,r4,LSR#16
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orr r4,r4,r4,LSR#16
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str r4,[r3,r0,LSL#2]
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str r4,[r3,r0,LSL#2]
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subs r2,r2,#2
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subs r2,r2,#2
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bgt Llpx
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bgt Llpx
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LOADREGS(ea, fp, {r4 - r8, fp, sp, pc})
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LOADREGS(ea, fp, {r4 - r8, fp, sp, pc})
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@ Purpose: write a memc register
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@ Purpose: write a memc register
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@ Proto : void memc_write(int register, int value);
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@ Proto : void memc_write(int register, int value);
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@ Returns: nothing
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@ Returns: nothing
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#ifndef CONFIG_ARCH_RPC
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#ifndef CONFIG_ARCH_RPC
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.globl _memc_write
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.globl _memc_write
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_memc_write: cmp r0, #7
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_memc_write: cmp r0, #7
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RETINSTR(movgt,pc,lr)
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RETINSTR(movgt,pc,lr)
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mov r0, r0, lsl #17
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mov r0, r0, lsl #17
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mov r1, r1, lsl #15
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mov r1, r1, lsl #15
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mov r1, r1, lsr #17
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mov r1, r1, lsr #17
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orr r0, r0, r1, lsl #2
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orr r0, r0, r1, lsl #2
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add r0, r0, #0x03600000
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add r0, r0, #0x03600000
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strb r0, [r0]
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strb r0, [r0]
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RETINSTR(mov,pc,lr)
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RETINSTR(mov,pc,lr)
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#define CPSR2SPSR(rt)
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#define CPSR2SPSR(rt)
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#else
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#else
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#define CPSR2SPSR(rt) \
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#define CPSR2SPSR(rt) \
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mrs rt, cpsr; \
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mrs rt, cpsr; \
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msr spsr, rt
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msr spsr, rt
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#endif
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#endif
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@ Purpose: call an expansion card loader to read bytes.
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@ Purpose: call an expansion card loader to read bytes.
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@ Proto : char read_loader(int offset, char *card_base, char *loader);
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@ Proto : char read_loader(int offset, char *card_base, char *loader);
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@ Returns: byte read
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@ Returns: byte read
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.global _ecard_loader_read
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.global _ecard_loader_read
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_ecard_loader_read:
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_ecard_loader_read:
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stmfd sp!, {r4 - r12, lr}
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stmfd sp!, {r4 - r12, lr}
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mov r11, r1
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mov r11, r1
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mov r1, r0
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mov r1, r0
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CPSR2SPSR(r0)
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CPSR2SPSR(r0)
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mov lr, pc
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mov lr, pc
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mov pc, r2
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mov pc, r2
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LOADREGS(fd, sp!, {r4 - r12, pc})
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LOADREGS(fd, sp!, {r4 - r12, pc})
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@ Purpose: call an expansion card loader to reset the card
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@ Purpose: call an expansion card loader to reset the card
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@ Proto : void read_loader(int card_base, char *loader);
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@ Proto : void read_loader(int card_base, char *loader);
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@ Returns: byte read
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@ Returns: byte read
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.global _ecard_loader_reset
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.global _ecard_loader_reset
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_ecard_loader_reset:
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_ecard_loader_reset:
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stmfd sp!, {r4 - r12, lr}
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stmfd sp!, {r4 - r12, lr}
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mov r11, r0
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mov r11, r0
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CPSR2SPSR(r0)
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CPSR2SPSR(r0)
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mov lr, pc
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mov lr, pc
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add pc, r1, #8
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add pc, r1, #8
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LOADREGS(fd, sp!, {r4 - r12, pc})
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LOADREGS(fd, sp!, {r4 - r12, pc})
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