/*---------------------------------------------------------------------------+
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/*---------------------------------------------------------------------------+
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| fpu_aux.c |
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| fpu_aux.c |
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| Code to implement some of the FPU auxiliary instructions. |
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| Code to implement some of the FPU auxiliary instructions. |
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| Copyright (C) 1992,1993,1994 |
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| Copyright (C) 1992,1993,1994 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| Australia. E-mail billm@vaxc.cc.monash.edu.au |
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| Australia. E-mail billm@vaxc.cc.monash.edu.au |
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+---------------------------------------------------------------------------*/
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+---------------------------------------------------------------------------*/
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#include "fpu_system.h"
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#include "fpu_system.h"
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#include "exception.h"
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#include "exception.h"
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#include "fpu_emu.h"
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#include "fpu_emu.h"
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#include "status_w.h"
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#include "status_w.h"
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#include "control_w.h"
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#include "control_w.h"
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static void fnop(void)
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static void fnop(void)
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{
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{
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}
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}
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void fclex(void)
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void fclex(void)
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{
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{
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partial_status &= ~(SW_Backward|SW_Summary|SW_Stack_Fault|SW_Precision|
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partial_status &= ~(SW_Backward|SW_Summary|SW_Stack_Fault|SW_Precision|
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SW_Underflow|SW_Overflow|SW_Zero_Div|SW_Denorm_Op|
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SW_Underflow|SW_Overflow|SW_Zero_Div|SW_Denorm_Op|
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SW_Invalid);
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SW_Invalid);
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no_ip_update = 1;
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no_ip_update = 1;
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}
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}
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/* Needs to be externally visible */
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/* Needs to be externally visible */
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void finit()
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void finit()
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{
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{
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int r;
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int r;
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control_word = 0x037f;
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control_word = 0x037f;
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partial_status = 0;
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partial_status = 0;
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top = 0; /* We don't keep top in the status word internally. */
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top = 0; /* We don't keep top in the status word internally. */
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for (r = 0; r < 8; r++)
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for (r = 0; r < 8; r++)
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{
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{
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regs[r].tag = TW_Empty;
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regs[r].tag = TW_Empty;
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}
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}
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/* The behaviour is different to that detailed in
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/* The behaviour is different to that detailed in
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Section 15.1.6 of the Intel manual */
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Section 15.1.6 of the Intel manual */
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operand_address.offset = 0;
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operand_address.offset = 0;
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operand_address.selector = 0;
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operand_address.selector = 0;
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instruction_address.offset = 0;
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instruction_address.offset = 0;
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instruction_address.selector = 0;
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instruction_address.selector = 0;
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instruction_address.opcode = 0;
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instruction_address.opcode = 0;
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no_ip_update = 1;
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no_ip_update = 1;
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}
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}
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/*
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/*
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* These are nops on the i387..
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* These are nops on the i387..
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*/
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*/
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#define feni fnop
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#define feni fnop
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#define fdisi fnop
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#define fdisi fnop
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#define fsetpm fnop
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#define fsetpm fnop
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static FUNC const finit_table[] = {
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static FUNC const finit_table[] = {
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feni, fdisi, fclex, finit,
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feni, fdisi, fclex, finit,
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fsetpm, FPU_illegal, FPU_illegal, FPU_illegal
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fsetpm, FPU_illegal, FPU_illegal, FPU_illegal
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};
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};
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void finit_()
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void finit_()
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{
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{
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(finit_table[FPU_rm])();
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(finit_table[FPU_rm])();
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}
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}
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static void fstsw_ax(void)
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static void fstsw_ax(void)
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{
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{
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*(short *) &FPU_EAX = status_word();
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*(short *) &FPU_EAX = status_word();
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no_ip_update = 1;
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no_ip_update = 1;
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}
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}
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static FUNC const fstsw_table[] = {
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static FUNC const fstsw_table[] = {
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fstsw_ax, FPU_illegal, FPU_illegal, FPU_illegal,
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fstsw_ax, FPU_illegal, FPU_illegal, FPU_illegal,
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FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
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FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
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};
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};
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void fstsw_()
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void fstsw_()
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{
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{
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(fstsw_table[FPU_rm])();
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(fstsw_table[FPU_rm])();
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}
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}
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static FUNC const fp_nop_table[] = {
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static FUNC const fp_nop_table[] = {
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fnop, FPU_illegal, FPU_illegal, FPU_illegal,
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fnop, FPU_illegal, FPU_illegal, FPU_illegal,
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FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
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FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
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};
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};
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void fp_nop()
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void fp_nop()
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{
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{
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(fp_nop_table[FPU_rm])();
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(fp_nop_table[FPU_rm])();
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}
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}
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void fld_i_()
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void fld_i_()
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{
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{
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FPU_REG *st_new_ptr;
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FPU_REG *st_new_ptr;
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if ( STACK_OVERFLOW )
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if ( STACK_OVERFLOW )
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{ stack_overflow(); return; }
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{ stack_overflow(); return; }
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/* fld st(i) */
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/* fld st(i) */
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if ( NOT_EMPTY(FPU_rm) )
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if ( NOT_EMPTY(FPU_rm) )
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{ reg_move(&st(FPU_rm), st_new_ptr); push(); }
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{ reg_move(&st(FPU_rm), st_new_ptr); push(); }
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else
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else
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{
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{
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if ( control_word & CW_Invalid )
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if ( control_word & CW_Invalid )
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{
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{
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/* The masked response */
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/* The masked response */
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stack_underflow();
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stack_underflow();
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}
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}
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else
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else
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EXCEPTION(EX_StackUnder);
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EXCEPTION(EX_StackUnder);
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}
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}
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}
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}
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void fxch_i()
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void fxch_i()
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{
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{
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/* fxch st(i) */
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/* fxch st(i) */
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FPU_REG t;
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FPU_REG t;
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register FPU_REG *sti_ptr = &st(FPU_rm), *st0_ptr = &st(0);
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register FPU_REG *sti_ptr = &st(FPU_rm), *st0_ptr = &st(0);
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if ( st0_ptr->tag == TW_Empty )
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if ( st0_ptr->tag == TW_Empty )
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{
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{
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if ( sti_ptr->tag == TW_Empty )
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if ( sti_ptr->tag == TW_Empty )
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{
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{
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stack_underflow();
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stack_underflow();
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stack_underflow_i(FPU_rm);
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stack_underflow_i(FPU_rm);
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return;
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return;
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}
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}
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if ( control_word & CW_Invalid )
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if ( control_word & CW_Invalid )
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reg_move(sti_ptr, st0_ptr); /* Masked response */
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reg_move(sti_ptr, st0_ptr); /* Masked response */
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stack_underflow_i(FPU_rm);
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stack_underflow_i(FPU_rm);
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return;
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return;
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}
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}
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if ( sti_ptr->tag == TW_Empty )
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if ( sti_ptr->tag == TW_Empty )
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{
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{
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if ( control_word & CW_Invalid )
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if ( control_word & CW_Invalid )
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reg_move(st0_ptr, sti_ptr); /* Masked response */
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reg_move(st0_ptr, sti_ptr); /* Masked response */
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stack_underflow();
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stack_underflow();
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return;
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return;
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}
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}
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clear_C1();
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clear_C1();
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reg_move(st0_ptr, &t);
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reg_move(st0_ptr, &t);
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reg_move(sti_ptr, st0_ptr);
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reg_move(sti_ptr, st0_ptr);
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reg_move(&t, sti_ptr);
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reg_move(&t, sti_ptr);
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}
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}
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void ffree_()
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void ffree_()
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{
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{
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/* ffree st(i) */
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/* ffree st(i) */
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st(FPU_rm).tag = TW_Empty;
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st(FPU_rm).tag = TW_Empty;
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}
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}
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void ffreep()
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void ffreep()
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{
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{
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/* ffree st(i) + pop - unofficial code */
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/* ffree st(i) + pop - unofficial code */
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st(FPU_rm).tag = TW_Empty;
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st(FPU_rm).tag = TW_Empty;
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pop();
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pop();
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}
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}
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void fst_i_()
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void fst_i_()
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{
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{
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/* fst st(i) */
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/* fst st(i) */
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reg_move(&st(0), &st(FPU_rm));
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reg_move(&st(0), &st(FPU_rm));
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}
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}
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void fstp_i()
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void fstp_i()
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{
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{
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/* fstp st(i) */
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/* fstp st(i) */
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reg_move(&st(0), &st(FPU_rm));
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reg_move(&st(0), &st(FPU_rm));
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pop();
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pop();
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}
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}
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