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[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [arch/] [or32/] [board/] [rom.ld] - Diff between revs 1624 and 1765

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Rev 1624 Rev 1765
MEMORY
MEMORY
        {
        {
        romvec : ORIGIN = 0xf0000000, LENGTH = 0x2000
        romvec : ORIGIN = 0xf0000000, LENGTH = 0x2000
        flash  : ORIGIN = 0xf0002000, LENGTH = 0x00800000 - 0x2000
        flash  : ORIGIN = 0xf0002000, LENGTH = 0x00800000 - 0x2000
        eflash : ORIGIN = 0xf0800000, LENGTH = 0
        eflash : ORIGIN = 0xf0800000, LENGTH = 0
        ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram    : ORIGIN = 0x00002000, LENGTH = 0x00800000 - 0x2000
        ram    : ORIGIN = 0x00002000, LENGTH = 0x00800000 - 0x2000
        eram   : ORIGIN = 0x00800000, LENGTH = 0
        eram   : ORIGIN = 0x00800000, LENGTH = 0
        }
        }
SECTIONS
SECTIONS
{
{
        .romvec :
        .romvec :
        {
        {
        __romvec = . ;
        __romvec = . ;
        *(.romvec)
        *(.romvec)
        } > romvec
        } > romvec
        .text :
        .text :
        {
        {
        ___rom_start = . ;
        ___rom_start = . ;
        text_start = . ;
        text_start = . ;
        *(.text)
        *(.text)
        } > flash
        } > flash
        .rodata :
        .rodata :
        {
        {
        *(.rodata)
        *(.rodata)
        __etext = . ;
        __etext = . ;
        } > flash
        } > flash
        .initrd :
        .initrd :
        {
        {
        __initrd_start = . ;
        __initrd_start = . ;
        *(.initrd)
        *(.initrd)
        __initrd_end = . ;
        __initrd_end = . ;
        ___data_rom_start = . ;
        ___data_rom_start = . ;
        } > flash
        } > flash
        .eflash :
        .eflash :
        {
        {
        __flashend = . ;
        __flashend = . ;
        } > eflash
        } > eflash
        .data :
        .data :
        AT ( ADDR (.initrd) + SIZEOF (.initrd))
        AT ( ADDR (.initrd) + SIZEOF (.initrd))
        {
        {
        __ramstart = . ;
        __ramstart = . ;
        __sdata = . ;
        __sdata = . ;
        ___data_start = . ;
        ___data_start = . ;
        *(.data)
        *(.data)
        __edata = . ;
        __edata = . ;
        __end_data = . ;
        __end_data = . ;
        __data_end = . ;
        __data_end = . ;
        edata = ALIGN( 0x10 ) ;
        edata = ALIGN( 0x10 ) ;
        } > ram
        } > ram
        .bss :
        .bss :
        {
        {
        __sbss = ALIGN( 0x10 ) ;
        __sbss = ALIGN( 0x10 ) ;
        ___bss_start = ALIGN( 0x10 ) ;
        ___bss_start = ALIGN( 0x10 ) ;
        *(.bss)
        *(.bss)
        *(COMMON)
        *(COMMON)
        __ebss = . ;
        __ebss = . ;
        ___bss_end = . ;
        ___bss_end = . ;
        end = ALIGN( 0x10 ) ;
        end = ALIGN( 0x10 ) ;
        __end = ALIGN( 0x10 ) ;
        __end = ALIGN( 0x10 ) ;
        } > ram
        } > ram
        .ramvec :
        .ramvec :
        AT ( ADDR (.initrd) + SIZEOF (.initrd) + SIZEOF (.data))
        AT ( ADDR (.initrd) + SIZEOF (.initrd) + SIZEOF (.data))
        {
        {
        __ramvec_start = . ;
        __ramvec_start = . ;
        *(.ramvec)
        *(.ramvec)
        __ramvec_end = . ;
        __ramvec_end = . ;
        } > ramvec
        } > ramvec
        .eram :
        .eram :
        {
        {
        __ramend = . ;
        __ramend = . ;
        } > eram
        } > eram
}
}
 
 

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