OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [arch-a5k/] [irq.h] - Diff between revs 1765 and 1782

Only display areas with differences | Details | Blame | View Log

Rev 1765 Rev 1782
/*
/*
 * include/asm-arm/arch-a5k/irq.h
 * include/asm-arm/arch-a5k/irq.h
 *
 *
 * Copyright (C) 1996 Russell King
 * Copyright (C) 1996 Russell King
 *
 *
 * Changelog:
 * Changelog:
 *   24-09-1996 RMK     Created
 *   24-09-1996 RMK     Created
 *   10-10-1996 RMK     Brought up to date with arch-sa110eval
 *   10-10-1996 RMK     Brought up to date with arch-sa110eval
 *   22-10-1996 RMK     Changed interrupt numbers & uses new inb/outb macros
 *   22-10-1996 RMK     Changed interrupt numbers & uses new inb/outb macros
 */
 */
 
 
#define BUILD_IRQ(s,n,m) \
#define BUILD_IRQ(s,n,m) \
        void IRQ##n##_interrupt(void); \
        void IRQ##n##_interrupt(void); \
        void fast_IRQ##n##_interrupt(void); \
        void fast_IRQ##n##_interrupt(void); \
        void bad_IRQ##n##_interrupt(void); \
        void bad_IRQ##n##_interrupt(void); \
        void probe_IRQ##n##_interrupt(void);
        void probe_IRQ##n##_interrupt(void);
 
 
/*
/*
 * The timer is a special interrupt
 * The timer is a special interrupt
 */
 */
#define IRQ5_interrupt          timer_IRQ_interrupt
#define IRQ5_interrupt          timer_IRQ_interrupt
 
 
#define IRQ_INTERRUPT(n)        IRQ##n##_interrupt
#define IRQ_INTERRUPT(n)        IRQ##n##_interrupt
#define FAST_INTERRUPT(n)       fast_IRQ##n##_interrupt
#define FAST_INTERRUPT(n)       fast_IRQ##n##_interrupt
#define BAD_INTERRUPT(n)        bad_IRQ##n##_interrupt
#define BAD_INTERRUPT(n)        bad_IRQ##n##_interrupt
#define PROBE_INTERRUPT(n)      probe_IRQ##n##_interrupt
#define PROBE_INTERRUPT(n)      probe_IRQ##n##_interrupt
 
 
static __inline__ void mask_irq(unsigned int irq)
static __inline__ void mask_irq(unsigned int irq)
{
{
        extern void ecard_disableirq (unsigned int);
        extern void ecard_disableirq (unsigned int);
        extern void ecard_disablefiq (unsigned int);
        extern void ecard_disablefiq (unsigned int);
        unsigned char mask = 1 << (irq & 7);
        unsigned char mask = 1 << (irq & 7);
 
 
        switch (irq >> 3) {
        switch (irq >> 3) {
        case 0:
        case 0:
                outb(inb(IOC_IRQMASKA) & ~mask, IOC_IRQMASKA);
                outb(inb(IOC_IRQMASKA) & ~mask, IOC_IRQMASKA);
                break;
                break;
        case 1:
        case 1:
                outb(inb(IOC_IRQMASKB) & ~mask, IOC_IRQMASKB);
                outb(inb(IOC_IRQMASKB) & ~mask, IOC_IRQMASKB);
                break;
                break;
        case 4:
        case 4:
                ecard_disableirq (irq & 7);
                ecard_disableirq (irq & 7);
                break;
                break;
        case 8:
        case 8:
                outb(inb(IOC_FIQMASK) & ~mask, IOC_FIQMASK);
                outb(inb(IOC_FIQMASK) & ~mask, IOC_FIQMASK);
                break;
                break;
        case 12:
        case 12:
                ecard_disablefiq (irq & 7);
                ecard_disablefiq (irq & 7);
        }
        }
}
}
 
 
static __inline__ void unmask_irq(unsigned int irq)
static __inline__ void unmask_irq(unsigned int irq)
{
{
        extern void ecard_enableirq (unsigned int);
        extern void ecard_enableirq (unsigned int);
        extern void ecard_enablefiq (unsigned int);
        extern void ecard_enablefiq (unsigned int);
        unsigned char mask = 1 << (irq & 7);
        unsigned char mask = 1 << (irq & 7);
 
 
        switch (irq >> 3) {
        switch (irq >> 3) {
        case 0:
        case 0:
                outb(inb(IOC_IRQMASKA) | mask, IOC_IRQMASKA);
                outb(inb(IOC_IRQMASKA) | mask, IOC_IRQMASKA);
                break;
                break;
        case 1:
        case 1:
                outb(inb(IOC_IRQMASKB) | mask, IOC_IRQMASKB);
                outb(inb(IOC_IRQMASKB) | mask, IOC_IRQMASKB);
                break;
                break;
        case 4:
        case 4:
                ecard_enableirq (irq & 7);
                ecard_enableirq (irq & 7);
                break;
                break;
        case 8:
        case 8:
                outb(inb(IOC_FIQMASK) | mask, IOC_FIQMASK);
                outb(inb(IOC_FIQMASK) | mask, IOC_FIQMASK);
                break;
                break;
        case 12:
        case 12:
                ecard_enablefiq (irq & 7);
                ecard_enablefiq (irq & 7);
        }
        }
}
}
 
 
static __inline__ unsigned long get_enabled_irqs(void)
static __inline__ unsigned long get_enabled_irqs(void)
{
{
        return inb(IOC_IRQMASKA) | inb(IOC_IRQMASKB) << 8;
        return inb(IOC_IRQMASKA) | inb(IOC_IRQMASKB) << 8;
}
}
 
 
static __inline__ void irq_init_irq(void)
static __inline__ void irq_init_irq(void)
{
{
        outb(0, IOC_IRQMASKA);
        outb(0, IOC_IRQMASKA);
        outb(0, IOC_IRQMASKB);
        outb(0, IOC_IRQMASKB);
        outb(0, IOC_FIQMASK);
        outb(0, IOC_FIQMASK);
}
}
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.