/*
|
/*
|
* linux/include/asm-arm/proc-armo/system.h
|
* linux/include/asm-arm/proc-armo/system.h
|
*
|
*
|
* Copyright (C) 1995, 1996 Russell King
|
* Copyright (C) 1995, 1996 Russell King
|
*/
|
*/
|
|
|
#ifndef __ASM_PROC_SYSTEM_H
|
#ifndef __ASM_PROC_SYSTEM_H
|
#define __ASM_PROC_SYSTEM_H
|
#define __ASM_PROC_SYSTEM_H
|
|
|
extern const char xchg_str[];
|
extern const char xchg_str[];
|
|
|
#include <asm/proc-fns.h>
|
#include <asm/proc-fns.h>
|
|
|
extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
|
extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
|
{
|
{
|
switch (size) {
|
switch (size) {
|
case 1: return processor.u.armv2._xchg_1(x, ptr);
|
case 1: return processor.u.armv2._xchg_1(x, ptr);
|
case 2: return processor.u.armv2._xchg_2(x, ptr);
|
case 2: return processor.u.armv2._xchg_2(x, ptr);
|
case 4: return processor.u.armv2._xchg_4(x, ptr);
|
case 4: return processor.u.armv2._xchg_4(x, ptr);
|
default: arm_invalidptr(xchg_str, size);
|
default: arm_invalidptr(xchg_str, size);
|
}
|
}
|
}
|
}
|
|
|
/*
|
/*
|
* We need to turn the caches off before calling the reset vector - RiscOS
|
* We need to turn the caches off before calling the reset vector - RiscOS
|
* messes up if we don't
|
* messes up if we don't
|
*/
|
*/
|
#define proc_hard_reset() processor._proc_fin()
|
#define proc_hard_reset() processor._proc_fin()
|
|
|
/*
|
/*
|
* This processor does not idle
|
* This processor does not idle
|
*/
|
*/
|
#define proc_idle()
|
#define proc_idle()
|
|
|
/*
|
/*
|
* A couple of speedups for the ARM
|
* A couple of speedups for the ARM
|
*/
|
*/
|
|
|
/*
|
/*
|
* Save the current interrupt enable state & disable IRQs
|
* Save the current interrupt enable state & disable IRQs
|
*/
|
*/
|
#define save_flags_cli(x) \
|
#define save_flags_cli(x) \
|
do { \
|
do { \
|
unsigned long temp; \
|
unsigned long temp; \
|
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
" mov %0, pc\n" \
|
" mov %0, pc\n" \
|
" orr %1, %0, #0x08000000\n" \
|
" orr %1, %0, #0x08000000\n" \
|
" and %0, %0, #0x0c000000\n" \
|
" and %0, %0, #0x0c000000\n" \
|
" teqp %1, #0\n" \
|
" teqp %1, #0\n" \
|
: "=r" (x), "=r" (temp) \
|
: "=r" (x), "=r" (temp) \
|
: \
|
: \
|
: "memory"); \
|
: "memory"); \
|
} while (0)
|
} while (0)
|
|
|
/*
|
/*
|
* Enable IRQs
|
* Enable IRQs
|
*/
|
*/
|
#define sti() \
|
#define sti() \
|
do { \
|
do { \
|
unsigned long temp; \
|
unsigned long temp; \
|
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
" mov %0, pc\n" \
|
" mov %0, pc\n" \
|
" bic %0, %0, #0x08000000\n" \
|
" bic %0, %0, #0x08000000\n" \
|
" teqp %0, #0\n" \
|
" teqp %0, #0\n" \
|
: "=r" (temp) \
|
: "=r" (temp) \
|
: \
|
: \
|
: "memory"); \
|
: "memory"); \
|
} while(0)
|
} while(0)
|
|
|
/*
|
/*
|
* Disable IRQs
|
* Disable IRQs
|
*/
|
*/
|
#define cli() \
|
#define cli() \
|
do { \
|
do { \
|
unsigned long temp; \
|
unsigned long temp; \
|
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
" mov %0, pc\n" \
|
" mov %0, pc\n" \
|
" orr %0, %0, #0x08000000\n" \
|
" orr %0, %0, #0x08000000\n" \
|
" teqp %0, #0\n" \
|
" teqp %0, #0\n" \
|
: "=r" (temp) \
|
: "=r" (temp) \
|
: \
|
: \
|
: "memory"); \
|
: "memory"); \
|
} while(0)
|
} while(0)
|
|
|
/*
|
/*
|
* save current IRQ & FIQ state
|
* save current IRQ & FIQ state
|
*/
|
*/
|
#define save_flags(x) \
|
#define save_flags(x) \
|
do { \
|
do { \
|
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
" mov %0, pc\n" \
|
" mov %0, pc\n" \
|
" and %0, %0, #0x0c000000\n" \
|
" and %0, %0, #0x0c000000\n" \
|
: "=r" (x)); \
|
: "=r" (x)); \
|
} while (0)
|
} while (0)
|
|
|
/*
|
/*
|
* restore saved IRQ & FIQ state
|
* restore saved IRQ & FIQ state
|
*/
|
*/
|
#define restore_flags(x) \
|
#define restore_flags(x) \
|
do { \
|
do { \
|
unsigned long temp; \
|
unsigned long temp; \
|
__asm__ __volatile__( \
|
__asm__ __volatile__( \
|
" mov %0, pc\n" \
|
" mov %0, pc\n" \
|
" bic %0, %0, #0x0c000000\n" \
|
" bic %0, %0, #0x0c000000\n" \
|
" orr %0, %0, %1\n" \
|
" orr %0, %0, %1\n" \
|
" teqp %0, #0\n" \
|
" teqp %0, #0\n" \
|
: "=r" (temp) \
|
: "=r" (temp) \
|
: "r" (x) \
|
: "r" (x) \
|
: "memory"); \
|
: "memory"); \
|
} while (0)
|
} while (0)
|
|
|
#endif
|
#endif
|
|
|