URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-armnommu/] [proc-trio/] [uncompress.h] - Diff between revs 1765 and 1782

Rev 1765	Rev 1782
`/*`	`/*`
`* linux/include/asm-arm/proc-armv/uncompress.h`	`* linux/include/asm-arm/proc-armv/uncompress.h`
`*`	`*`
`* (c) 1997 Russell King`	`* (c) 1997 Russell King`
`*/`	`*/`

`static inline void proc_decomp_setup (void)`	`static inline void proc_decomp_setup (void)`
`{`	`{`
`__asm__ __volatile__("`	`__asm__ __volatile__("`
`mrc p15, 0, r0, c0, c0`	`mrc p15, 0, r0, c0, c0`
`eor r0, r0, #0x44 << 24`	`eor r0, r0, #0x44 << 24`
`eor r0, r0, #0x01 << 16`	`eor r0, r0, #0x01 << 16`
`eor r0, r0, #0xA1 << 8`	`eor r0, r0, #0xA1 << 8`
`movs r0, r0, lsr #4`	`movs r0, r0, lsr #4`
`mcreq p15, 0, r0, c7, c5, 0 @ flush I cache`	`mcreq p15, 0, r0, c7, c5, 0 @ flush I cache`
`mrceq p15, 0, r0, c1, c0`	`mrceq p15, 0, r0, c1, c0`
`orreq r0, r0, #1 << 12`	`orreq r0, r0, #1 << 12`
`mcreq p15, 0, r0, c1, c0 @ enable I cache`	`mcreq p15, 0, r0, c1, c0 @ enable I cache`
`mov r0, #0`	`mov r0, #0`
`mcreq p15, 0, r0, c15, c1, 2 @ enable clock switching`	`mcreq p15, 0, r0, c15, c1, 2 @ enable clock switching`
`" : : : "r0", "cc", "memory");`	`" : : : "r0", "cc", "memory");`
`}`	`}`