OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [trunk/] [rc203soc/] [sw/] [uClinux/] [include/] [asm-m68knommu/] [pgtable.h] - Diff between revs 1765 and 1782

Only display areas with differences | Details | Blame | View Log

Rev 1765 Rev 1782
#ifndef _M68K_PGTABLE_H
#ifndef _M68K_PGTABLE_H
#define _M68K_PGTABLE_H
#define _M68K_PGTABLE_H
 
 
extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
 
 
#define VTOP(addr)  (mm_vtop((unsigned long)(addr)))
#define VTOP(addr)  (mm_vtop((unsigned long)(addr)))
#define PTOV(addr)  (mm_ptov((unsigned long)(addr)))
#define PTOV(addr)  (mm_ptov((unsigned long)(addr)))
 
 
#ifndef NO_MM
#ifndef NO_MM
 
 
#include <asm/setup.h>
#include <asm/setup.h>
 
 
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLY__
#include <linux/config.h>
#include <linux/config.h>
 
 
/*
/*
 * This file contains the functions and defines necessary to modify and use
 * This file contains the functions and defines necessary to modify and use
 * the m68k page table tree.
 * the m68k page table tree.
 */
 */
 
 
/*
/*
 * flush all atc entries (user-space entries only for the 680[46]0).
 * flush all atc entries (user-space entries only for the 680[46]0).
 */
 */
static inline void __flush_tlb(void)
static inline void __flush_tlb(void)
{
{
        if (CPU_IS_040_OR_060)
        if (CPU_IS_040_OR_060)
                __asm__ __volatile__(".word 0xf510\n"::); /* pflushan */
                __asm__ __volatile__(".word 0xf510\n"::); /* pflushan */
        else
        else
                __asm__ __volatile__("pflusha\n"::);
                __asm__ __volatile__("pflusha\n"::);
}
}
 
 
static inline void __flush_tlb_one(unsigned long addr)
static inline void __flush_tlb_one(unsigned long addr)
{
{
        if (CPU_IS_040_OR_060) {
        if (CPU_IS_040_OR_060) {
                register unsigned long a0 __asm__ ("a0") = addr;
                register unsigned long a0 __asm__ ("a0") = addr;
                __asm__ __volatile__(".word 0xf508" /* pflush (%a0) */
                __asm__ __volatile__(".word 0xf508" /* pflush (%a0) */
                                     : : "a" (a0));
                                     : : "a" (a0));
        } else
        } else
                __asm__ __volatile__("pflush #0,#0,(%0)" : : "a" (addr));
                __asm__ __volatile__("pflush #0,#0,(%0)" : : "a" (addr));
}
}
 
 
#define flush_tlb() __flush_tlb()
#define flush_tlb() __flush_tlb()
 
 
/*
/*
 * flush all atc entries (both kernel and user-space entries).
 * flush all atc entries (both kernel and user-space entries).
 */
 */
static inline void flush_tlb_all(void)
static inline void flush_tlb_all(void)
{
{
        if (CPU_IS_040_OR_060)
        if (CPU_IS_040_OR_060)
                __asm__ __volatile__(".word 0xf518\n"::); /* pflusha */
                __asm__ __volatile__(".word 0xf518\n"::); /* pflusha */
        else
        else
                __asm__ __volatile__("pflusha\n"::);
                __asm__ __volatile__("pflusha\n"::);
}
}
 
 
static inline void flush_tlb_mm(struct mm_struct *mm)
static inline void flush_tlb_mm(struct mm_struct *mm)
{
{
        if (mm == current->mm)
        if (mm == current->mm)
                __flush_tlb();
                __flush_tlb();
}
}
 
 
static inline void flush_tlb_page(struct vm_area_struct *vma,
static inline void flush_tlb_page(struct vm_area_struct *vma,
        unsigned long addr)
        unsigned long addr)
{
{
        if (vma->vm_mm == current->mm)
        if (vma->vm_mm == current->mm)
                __flush_tlb_one(addr);
                __flush_tlb_one(addr);
}
}
 
 
static inline void flush_tlb_range(struct mm_struct *mm,
static inline void flush_tlb_range(struct mm_struct *mm,
        unsigned long start, unsigned long end)
        unsigned long start, unsigned long end)
{
{
        if (mm == current->mm)
        if (mm == current->mm)
                __flush_tlb();
                __flush_tlb();
}
}
 
 
/* Certain architectures need to do special things when pte's
/* Certain architectures need to do special things when pte's
 * within a page table are directly modified.  Thus, the following
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 * hook is made available.
 */
 */
#define set_pte(pteptr, pteval) do{     \
#define set_pte(pteptr, pteval) do{     \
        ((*(pteptr)) = (pteval));       \
        ((*(pteptr)) = (pteval));       \
        if (CPU_IS_060)                 \
        if (CPU_IS_060)                 \
                __asm__ __volatile__(".word 0xf518\n"::); /* pflusha */ \
                __asm__ __volatile__(".word 0xf518\n"::); /* pflusha */ \
        } while(0)
        } while(0)
 
 
 
 
/* PMD_SHIFT determines the size of the area a second-level page table can map */
/* PMD_SHIFT determines the size of the area a second-level page table can map */
#define PMD_SHIFT       22
#define PMD_SHIFT       22
#define PMD_SIZE        (1UL << PMD_SHIFT)
#define PMD_SIZE        (1UL << PMD_SHIFT)
#define PMD_MASK        (~(PMD_SIZE-1))
#define PMD_MASK        (~(PMD_SIZE-1))
 
 
/* PGDIR_SHIFT determines what a third-level page table entry can map */
/* PGDIR_SHIFT determines what a third-level page table entry can map */
#define PGDIR_SHIFT     25
#define PGDIR_SHIFT     25
#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
#define PGDIR_MASK      (~(PGDIR_SIZE-1))
#define PGDIR_MASK      (~(PGDIR_SIZE-1))
 
 
/*
/*
 * entries per page directory level: the m68k is configured as three-level,
 * entries per page directory level: the m68k is configured as three-level,
 * so we do have PMD level physically.
 * so we do have PMD level physically.
 */
 */
#define PTRS_PER_PTE    1024
#define PTRS_PER_PTE    1024
#define PTRS_PER_PMD    8
#define PTRS_PER_PMD    8
#define PTRS_PER_PGD    128
#define PTRS_PER_PGD    128
 
 
/* the no. of pointers that fit on a page: this will go away */
/* the no. of pointers that fit on a page: this will go away */
#define PTRS_PER_PAGE   (PAGE_SIZE/sizeof(void*))
#define PTRS_PER_PAGE   (PAGE_SIZE/sizeof(void*))
 
 
typedef pgd_t pgd_table[PTRS_PER_PGD];
typedef pgd_t pgd_table[PTRS_PER_PGD];
typedef pmd_t pmd_table[PTRS_PER_PMD];
typedef pmd_t pmd_table[PTRS_PER_PMD];
typedef pte_t pte_table[PTRS_PER_PTE];
typedef pte_t pte_table[PTRS_PER_PTE];
 
 
#define PGD_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pgd_table))
#define PGD_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pgd_table))
#define PMD_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pmd_table))
#define PMD_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pmd_table))
#define PTE_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pte_table))
#define PTE_TABLES_PER_PAGE (PAGE_SIZE/sizeof(pte_table))
 
 
typedef pgd_table pgd_tablepage[PGD_TABLES_PER_PAGE];
typedef pgd_table pgd_tablepage[PGD_TABLES_PER_PAGE];
typedef pmd_table pmd_tablepage[PMD_TABLES_PER_PAGE];
typedef pmd_table pmd_tablepage[PMD_TABLES_PER_PAGE];
typedef pte_table pte_tablepage[PTE_TABLES_PER_PAGE];
typedef pte_table pte_tablepage[PTE_TABLES_PER_PAGE];
 
 
/* Just any arbitrary offset to the start of the vmalloc VM area: the
/* Just any arbitrary offset to the start of the vmalloc VM area: the
 * current 8MB value just means that there will be a 8MB "hole" after the
 * current 8MB value just means that there will be a 8MB "hole" after the
 * physical memory until the kernel virtual memory starts.  That means that
 * physical memory until the kernel virtual memory starts.  That means that
 * any out-of-bounds memory accesses will hopefully be caught.
 * any out-of-bounds memory accesses will hopefully be caught.
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;)
 * area for the same reason. ;)
 */
 */
#define VMALLOC_OFFSET  (8*1024*1024)
#define VMALLOC_OFFSET  (8*1024*1024)
#define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
 
 
#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLY__ */
 
 
/*
/*
 * Definitions for MMU descriptors
 * Definitions for MMU descriptors
 */
 */
#define _PAGE_PRESENT   0x001
#define _PAGE_PRESENT   0x001
#define _PAGE_SHORT     0x002
#define _PAGE_SHORT     0x002
#define _PAGE_RONLY     0x004
#define _PAGE_RONLY     0x004
#define _PAGE_ACCESSED  0x008
#define _PAGE_ACCESSED  0x008
#define _PAGE_DIRTY     0x010
#define _PAGE_DIRTY     0x010
#define _PAGE_GLOBAL040 0x400   /* 68040 global bit, used for kva descs */
#define _PAGE_GLOBAL040 0x400   /* 68040 global bit, used for kva descs */
#define _PAGE_COW       0x800   /* implemented in software */
#define _PAGE_COW       0x800   /* implemented in software */
#define _PAGE_NOCACHE030 0x040  /* 68030 no-cache mode */
#define _PAGE_NOCACHE030 0x040  /* 68030 no-cache mode */
#define _PAGE_NOCACHE   0x060   /* 68040 cache mode, non-serialized */
#define _PAGE_NOCACHE   0x060   /* 68040 cache mode, non-serialized */
#define _PAGE_NOCACHE_S 0x040   /* 68040 no-cache mode, serialized */
#define _PAGE_NOCACHE_S 0x040   /* 68040 no-cache mode, serialized */
#define _PAGE_CACHE040  0x020   /* 68040 cache mode, cachable, copyback */
#define _PAGE_CACHE040  0x020   /* 68040 cache mode, cachable, copyback */
#define _PAGE_CACHE040W 0x000   /* 68040 cache mode, cachable, write-through */
#define _PAGE_CACHE040W 0x000   /* 68040 cache mode, cachable, write-through */
 
 
#define _DESCTYPE_MASK  0x003
#define _DESCTYPE_MASK  0x003
 
 
#define _CACHEMASK040   (~0x060)
#define _CACHEMASK040   (~0x060)
#define _TABLE_MASK     (0xfffffe00)
#define _TABLE_MASK     (0xfffffe00)
 
 
#define _PAGE_TABLE     (_PAGE_SHORT)
#define _PAGE_TABLE     (_PAGE_SHORT)
#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)
#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_NOCACHE)
 
 
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLY__
 
 
/* This is the cache mode to be used for pages containing page descriptors for
/* This is the cache mode to be used for pages containing page descriptors for
 * processors >= '040. It is in pte_mknocache(), and the variable is defined
 * processors >= '040. It is in pte_mknocache(), and the variable is defined
 * and initialized in head.S */
 * and initialized in head.S */
extern int m68k_pgtable_cachemode;
extern int m68k_pgtable_cachemode;
 
 
#if defined(CONFIG_M68040_OR_M68060_ONLY)
#if defined(CONFIG_M68040_OR_M68060_ONLY)
#define mm_cachebits _PAGE_CACHE040
#define mm_cachebits _PAGE_CACHE040
#elif defined(CONFIG_M68020_OR_M68030_ONLY)
#elif defined(CONFIG_M68020_OR_M68030_ONLY)
#define mm_cachebits 0
#define mm_cachebits 0
#else
#else
extern unsigned long mm_cachebits;
extern unsigned long mm_cachebits;
#endif
#endif
 
 
#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | mm_cachebits)
#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | mm_cachebits)
 
 
/* Alternate definitions that are compile time constants, for
/* Alternate definitions that are compile time constants, for
   initializing protection_map.  The cachebits are fixed later.  */
   initializing protection_map.  The cachebits are fixed later.  */
#define PAGE_NONE_C     __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_NONE_C     __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_SHARED_C   __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_SHARED_C   __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_COPY_C     __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_COPY_C     __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_READONLY_C __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
#define PAGE_READONLY_C __pgprot(_PAGE_PRESENT | _PAGE_RONLY | _PAGE_ACCESSED)
 
 
/*
/*
 * The m68k can't do page protection for execute, and considers that the same are read.
 * The m68k can't do page protection for execute, and considers that the same are read.
 * Also, write permissions imply read permissions. This is the closest we can get..
 * Also, write permissions imply read permissions. This is the closest we can get..
 */
 */
#define __P000  PAGE_NONE_C
#define __P000  PAGE_NONE_C
#define __P001  PAGE_READONLY_C
#define __P001  PAGE_READONLY_C
#define __P010  PAGE_COPY_C
#define __P010  PAGE_COPY_C
#define __P011  PAGE_COPY_C
#define __P011  PAGE_COPY_C
#define __P100  PAGE_READONLY_C
#define __P100  PAGE_READONLY_C
#define __P101  PAGE_READONLY_C
#define __P101  PAGE_READONLY_C
#define __P110  PAGE_COPY_C
#define __P110  PAGE_COPY_C
#define __P111  PAGE_COPY_C
#define __P111  PAGE_COPY_C
 
 
#define __S000  PAGE_NONE_C
#define __S000  PAGE_NONE_C
#define __S001  PAGE_READONLY_C
#define __S001  PAGE_READONLY_C
#define __S010  PAGE_SHARED_C
#define __S010  PAGE_SHARED_C
#define __S011  PAGE_SHARED_C
#define __S011  PAGE_SHARED_C
#define __S100  PAGE_READONLY_C
#define __S100  PAGE_READONLY_C
#define __S101  PAGE_READONLY_C
#define __S101  PAGE_READONLY_C
#define __S110  PAGE_SHARED_C
#define __S110  PAGE_SHARED_C
#define __S111  PAGE_SHARED_C
#define __S111  PAGE_SHARED_C
 
 
/* zero page used for uninitialized stuff */
/* zero page used for uninitialized stuff */
extern unsigned long empty_zero_page;
extern unsigned long empty_zero_page;
 
 
/*
/*
 * BAD_PAGETABLE is used when we need a bogus page-table, while
 * BAD_PAGETABLE is used when we need a bogus page-table, while
 * BAD_PAGE is used for a bogus page.
 * BAD_PAGE is used for a bogus page.
 *
 *
 * ZERO_PAGE is a global shared page that is always zero: used
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 * for zero-mapped memory areas etc..
 */
 */
extern pte_t __bad_page(void);
extern pte_t __bad_page(void);
extern pte_t * __bad_pagetable(void);
extern pte_t * __bad_pagetable(void);
 
 
#define BAD_PAGETABLE __bad_pagetable()
#define BAD_PAGETABLE __bad_pagetable()
#define BAD_PAGE __bad_page()
#define BAD_PAGE __bad_page()
#define ZERO_PAGE empty_zero_page
#define ZERO_PAGE empty_zero_page
 
 
/* number of bits that fit into a memory pointer */
/* number of bits that fit into a memory pointer */
#define BITS_PER_PTR                    (8*sizeof(unsigned long))
#define BITS_PER_PTR                    (8*sizeof(unsigned long))
 
 
/* to align the pointer to a pointer address */
/* to align the pointer to a pointer address */
#define PTR_MASK                        (~(sizeof(void*)-1))
#define PTR_MASK                        (~(sizeof(void*)-1))
 
 
/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
/* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
/* 64-bit machines, beware!  SRB. */
/* 64-bit machines, beware!  SRB. */
#define SIZEOF_PTR_LOG2                 2
#define SIZEOF_PTR_LOG2                 2
 
 
/* to find an entry in a page-table */
/* to find an entry in a page-table */
#define PAGE_PTR(address) \
#define PAGE_PTR(address) \
((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 
 
extern unsigned long high_memory;
extern unsigned long high_memory;
 
 
/* For virtual address to physical address conversion */
/* For virtual address to physical address conversion */
extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_vtop(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
extern unsigned long mm_ptov(unsigned long addr) __attribute__ ((const));
#define VTOP(addr)  (mm_vtop((unsigned long)(addr)))
#define VTOP(addr)  (mm_vtop((unsigned long)(addr)))
#define PTOV(addr)  (mm_ptov((unsigned long)(addr)))
#define PTOV(addr)  (mm_ptov((unsigned long)(addr)))
 
 
/*
/*
 * Conversion functions: convert a page and protection to a page entry,
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 * and a page entry and page directory to the page they refer to.
 */
 */
extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot)
extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot)
{ pte_t pte; pte_val(pte) = VTOP(page) | pgprot_val(pgprot); return pte; }
{ pte_t pte; pte_val(pte) = VTOP(page) | pgprot_val(pgprot); return pte; }
 
 
extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 
 
extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
{
{
        int i;
        int i;
 
 
        ptep = (pte_t *) VTOP(ptep);
        ptep = (pte_t *) VTOP(ptep);
        for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
        for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
                pmdp->pmd[i] = _PAGE_TABLE | _PAGE_ACCESSED | (unsigned long)ptep;
                pmdp->pmd[i] = _PAGE_TABLE | _PAGE_ACCESSED | (unsigned long)ptep;
}
}
 
 
/* early termination version of the above */
/* early termination version of the above */
extern inline void pmd_set_et(pmd_t * pmdp, pte_t * ptep)
extern inline void pmd_set_et(pmd_t * pmdp, pte_t * ptep)
{
{
        int i;
        int i;
 
 
        ptep = (pte_t *) VTOP(ptep);
        ptep = (pte_t *) VTOP(ptep);
        for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
        for (i = 0; i < 16; i++, ptep += PTRS_PER_PTE/16)
                pmdp->pmd[i] = _PAGE_PRESENT | _PAGE_ACCESSED | (unsigned long)ptep;
                pmdp->pmd[i] = _PAGE_PRESENT | _PAGE_ACCESSED | (unsigned long)ptep;
}
}
 
 
extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
extern inline void pgd_set(pgd_t * pgdp, pmd_t * pmdp)
{ pgd_val(*pgdp) = _PAGE_TABLE | _PAGE_ACCESSED | VTOP(pmdp); }
{ pgd_val(*pgdp) = _PAGE_TABLE | _PAGE_ACCESSED | VTOP(pmdp); }
 
 
extern inline unsigned long pte_page(pte_t pte)
extern inline unsigned long pte_page(pte_t pte)
{ return PTOV(pte_val(pte) & PAGE_MASK); }
{ return PTOV(pte_val(pte) & PAGE_MASK); }
 
 
extern inline unsigned long pmd_page2(pmd_t *pmd)
extern inline unsigned long pmd_page2(pmd_t *pmd)
{ return PTOV(pmd_val(*pmd) & _TABLE_MASK); }
{ return PTOV(pmd_val(*pmd) & _TABLE_MASK); }
#define pmd_page(pmd) pmd_page2(&(pmd))
#define pmd_page(pmd) pmd_page2(&(pmd))
 
 
extern inline unsigned long pgd_page(pgd_t pgd)
extern inline unsigned long pgd_page(pgd_t pgd)
{ return PTOV(pgd_val(pgd) & _TABLE_MASK); }
{ return PTOV(pgd_val(pgd) & _TABLE_MASK); }
 
 
extern inline int pte_none(pte_t pte)           { return !pte_val(pte); }
extern inline int pte_none(pte_t pte)           { return !pte_val(pte); }
extern inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_PRESENT; }
extern inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_PRESENT; }
extern inline void pte_clear(pte_t *ptep)       { pte_val(*ptep) = 0; }
extern inline void pte_clear(pte_t *ptep)       { pte_val(*ptep) = 0; }
 
 
extern inline int pmd_none2(pmd_t *pmd)         { return !pmd_val(*pmd); }
extern inline int pmd_none2(pmd_t *pmd)         { return !pmd_val(*pmd); }
#define pmd_none(pmd) pmd_none2(&(pmd))
#define pmd_none(pmd) pmd_none2(&(pmd))
extern inline int pmd_bad2(pmd_t *pmd)          { return (pmd_val(*pmd) & _DESCTYPE_MASK) != _PAGE_TABLE || pmd_page(*pmd) > high_memory; }
extern inline int pmd_bad2(pmd_t *pmd)          { return (pmd_val(*pmd) & _DESCTYPE_MASK) != _PAGE_TABLE || pmd_page(*pmd) > high_memory; }
#define pmd_bad(pmd) pmd_bad2(&(pmd))
#define pmd_bad(pmd) pmd_bad2(&(pmd))
extern inline int pmd_present2(pmd_t *pmd)      { return pmd_val(*pmd) & _PAGE_TABLE; }
extern inline int pmd_present2(pmd_t *pmd)      { return pmd_val(*pmd) & _PAGE_TABLE; }
#define pmd_present(pmd) pmd_present2(&(pmd))
#define pmd_present(pmd) pmd_present2(&(pmd))
extern inline void pmd_clear(pmd_t * pmdp)
extern inline void pmd_clear(pmd_t * pmdp)
{
{
        short i;
        short i;
 
 
        for (i = 15; i >= 0; i--)
        for (i = 15; i >= 0; i--)
                pmdp->pmd[i] = 0;
                pmdp->pmd[i] = 0;
}
}
 
 
extern inline int pgd_none(pgd_t pgd)           { return !pgd_val(pgd); }
extern inline int pgd_none(pgd_t pgd)           { return !pgd_val(pgd); }
extern inline int pgd_bad(pgd_t pgd)            { return (pgd_val(pgd) & _DESCTYPE_MASK) != _PAGE_TABLE || pgd_page(pgd) > high_memory; }
extern inline int pgd_bad(pgd_t pgd)            { return (pgd_val(pgd) & _DESCTYPE_MASK) != _PAGE_TABLE || pgd_page(pgd) > high_memory; }
extern inline int pgd_present(pgd_t pgd)        { return pgd_val(pgd) & _PAGE_TABLE; }
extern inline int pgd_present(pgd_t pgd)        { return pgd_val(pgd) & _PAGE_TABLE; }
 
 
extern inline void pgd_clear(pgd_t * pgdp)      { pgd_val(*pgdp) = 0; }
extern inline void pgd_clear(pgd_t * pgdp)      { pgd_val(*pgdp) = 0; }
 
 
/*
/*
 * The following only work if pte_present() is true.
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 * Undefined behaviour if not..
 */
 */
extern inline int pte_read(pte_t pte)           { return 1; }
extern inline int pte_read(pte_t pte)           { return 1; }
extern inline int pte_write(pte_t pte)          { return !(pte_val(pte) & _PAGE_RONLY); }
extern inline int pte_write(pte_t pte)          { return !(pte_val(pte) & _PAGE_RONLY); }
extern inline int pte_exec(pte_t pte)           { return 1; }
extern inline int pte_exec(pte_t pte)           { return 1; }
extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
 
 
extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) |= _PAGE_RONLY; return pte; }
extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) |= _PAGE_RONLY; return pte; }
extern inline pte_t pte_rdprotect(pte_t pte)    { return pte; }
extern inline pte_t pte_rdprotect(pte_t pte)    { return pte; }
extern inline pte_t pte_exprotect(pte_t pte)    { return pte; }
extern inline pte_t pte_exprotect(pte_t pte)    { return pte; }
extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) &= ~_PAGE_RONLY; return pte; }
extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) &= ~_PAGE_RONLY; return pte; }
extern inline pte_t pte_mkread(pte_t pte)       { return pte; }
extern inline pte_t pte_mkread(pte_t pte)       { return pte; }
extern inline pte_t pte_mkexec(pte_t pte)       { return pte; }
extern inline pte_t pte_mkexec(pte_t pte)       { return pte; }
extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
extern inline pte_t pte_mknocache(pte_t pte)
extern inline pte_t pte_mknocache(pte_t pte)
{
{
        pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
        pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | m68k_pgtable_cachemode;
        return pte;
        return pte;
}
}
extern inline pte_t pte_mkcache(pte_t pte)      { pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | _PAGE_CACHE040; return pte; }
extern inline pte_t pte_mkcache(pte_t pte)      { pte_val(pte) = (pte_val(pte) & _CACHEMASK040) | _PAGE_CACHE040; return pte; }
 
 
/* to set the page-dir */
/* to set the page-dir */
extern inline void SET_PAGE_DIR(struct task_struct * tsk, pgd_t * pgdir)
extern inline void SET_PAGE_DIR(struct task_struct * tsk, pgd_t * pgdir)
{
{
        tsk->tss.crp[0] = 0x80000000 | _PAGE_TABLE;
        tsk->tss.crp[0] = 0x80000000 | _PAGE_TABLE;
        tsk->tss.crp[1] = VTOP(pgdir);
        tsk->tss.crp[1] = VTOP(pgdir);
        if (tsk == current) {
        if (tsk == current) {
                if (CPU_IS_040_OR_060)
                if (CPU_IS_040_OR_060)
                        __asm__ __volatile__ ("movel %0@,%/d0\n\t"
                        __asm__ __volatile__ ("movel %0@,%/d0\n\t"
                                              ".long 0x4e7b0806\n\t"
                                              ".long 0x4e7b0806\n\t"
                                              /* movec d0,urp */
                                              /* movec d0,urp */
                                              : : "a" (&tsk->tss.crp[1])
                                              : : "a" (&tsk->tss.crp[1])
                                              : "d0");
                                              : "d0");
                else
                else
                        __asm__ __volatile__ ("movec  %/cacr,%/d0\n\t"
                        __asm__ __volatile__ ("movec  %/cacr,%/d0\n\t"
                                              "oriw #0x0808,%/d0\n\t"
                                              "oriw #0x0808,%/d0\n\t"
                                              "movec %/d0,%/cacr\n\t"
                                              "movec %/d0,%/cacr\n\t"
                                              "pmove %0@,%/crp\n\t"
                                              "pmove %0@,%/crp\n\t"
                                              : : "a" (&tsk->tss.crp[0])
                                              : : "a" (&tsk->tss.crp[0])
                                              : "d0");
                                              : "d0");
        }
        }
}
}
 
 
#define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
#define PAGE_DIR_OFFSET(tsk,address) pgd_offset((tsk),(address))
 
 
/* to find an entry in a page-table-directory */
/* to find an entry in a page-table-directory */
extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
{
{
        return mm->pgd + (address >> PGDIR_SHIFT);
        return mm->pgd + (address >> PGDIR_SHIFT);
}
}
 
 
extern pgd_t swapper_pg_dir[128];
extern pgd_t swapper_pg_dir[128];
extern pgd_t kernel_pg_dir[128];
extern pgd_t kernel_pg_dir[128];
 
 
extern inline pgd_t * pgd_offset_k(unsigned long address)
extern inline pgd_t * pgd_offset_k(unsigned long address)
{
{
        return kernel_pg_dir + (address >> PGDIR_SHIFT);
        return kernel_pg_dir + (address >> PGDIR_SHIFT);
}
}
 
 
 
 
/* Find an entry in the second-level page table.. */
/* Find an entry in the second-level page table.. */
extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
{
{
        return (pmd_t *) pgd_page(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
        return (pmd_t *) pgd_page(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PMD-1));
}
}
 
 
/* Find an entry in the third-level page table.. */
/* Find an entry in the third-level page table.. */
extern inline pte_t * pte_offset(pmd_t * pmdp, unsigned long address)
extern inline pte_t * pte_offset(pmd_t * pmdp, unsigned long address)
{
{
        return (pte_t *) pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
        return (pte_t *) pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
}
}
 
 
/*
/*
 * Allocate and free page tables. The xxx_kernel() versions are
 * Allocate and free page tables. The xxx_kernel() versions are
 * used to allocate a kernel page table - this turns on ASN bits
 * used to allocate a kernel page table - this turns on ASN bits
 * if any.
 * if any.
 */
 */
 
 
extern inline void nocache_page (unsigned long vaddr)
extern inline void nocache_page (unsigned long vaddr)
{
{
        if (CPU_IS_040_OR_060) {
        if (CPU_IS_040_OR_060) {
                pgd_t *dir;
                pgd_t *dir;
                pmd_t *pmdp;
                pmd_t *pmdp;
                pte_t *ptep;
                pte_t *ptep;
 
 
                if(CPU_IS_060)
                if(CPU_IS_060)
                        __asm__ __volatile__ ("movel %0,%/a0\n\t"
                        __asm__ __volatile__ ("movel %0,%/a0\n\t"
                                              ".word 0xf470"
                                              ".word 0xf470"
                                              : : "g" (VTOP(vaddr))
                                              : : "g" (VTOP(vaddr))
                                              : "a0");
                                              : "a0");
 
 
                dir = pgd_offset_k(vaddr);
                dir = pgd_offset_k(vaddr);
                pmdp = pmd_offset(dir,vaddr);
                pmdp = pmd_offset(dir,vaddr);
                ptep = pte_offset(pmdp,vaddr);
                ptep = pte_offset(pmdp,vaddr);
                *ptep = pte_mknocache(*ptep);
                *ptep = pte_mknocache(*ptep);
        }
        }
}
}
 
 
static inline void cache_page (unsigned long vaddr)
static inline void cache_page (unsigned long vaddr)
{
{
        if (CPU_IS_040_OR_060) {
        if (CPU_IS_040_OR_060) {
                pgd_t *dir;
                pgd_t *dir;
                pmd_t *pmdp;
                pmd_t *pmdp;
                pte_t *ptep;
                pte_t *ptep;
 
 
                dir = pgd_offset_k(vaddr);
                dir = pgd_offset_k(vaddr);
                pmdp = pmd_offset(dir,vaddr);
                pmdp = pmd_offset(dir,vaddr);
                ptep = pte_offset(pmdp,vaddr);
                ptep = pte_offset(pmdp,vaddr);
                *ptep = pte_mkcache(*ptep);
                *ptep = pte_mkcache(*ptep);
        }
        }
}
}
 
 
 
 
extern const char PgtabStr_bad_pmd[];
extern const char PgtabStr_bad_pmd[];
extern const char PgtabStr_bad_pgd[];
extern const char PgtabStr_bad_pgd[];
extern const char PgtabStr_bad_pmdk[];
extern const char PgtabStr_bad_pmdk[];
extern const char PgtabStr_bad_pgdk[];
extern const char PgtabStr_bad_pgdk[];
 
 
extern inline void pte_free(pte_t * pte)
extern inline void pte_free(pte_t * pte)
{
{
        cache_page((unsigned long)pte);
        cache_page((unsigned long)pte);
        free_page((unsigned long) pte);
        free_page((unsigned long) pte);
}
}
 
 
extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
{
{
        address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
        address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
        if (pmd_none(*pmd)) {
        if (pmd_none(*pmd)) {
                pte_t * page = (pte_t *)get_free_page(GFP_KERNEL);
                pte_t * page = (pte_t *)get_free_page(GFP_KERNEL);
                if (pmd_none(*pmd)) {
                if (pmd_none(*pmd)) {
                        if (page) {
                        if (page) {
                                nocache_page((unsigned long)page);
                                nocache_page((unsigned long)page);
                                pmd_set(pmd,page);
                                pmd_set(pmd,page);
                                return page + address;
                                return page + address;
                        }
                        }
                        pmd_set(pmd, BAD_PAGETABLE);
                        pmd_set(pmd, BAD_PAGETABLE);
                        return NULL;
                        return NULL;
                }
                }
                free_page((unsigned long)page);
                free_page((unsigned long)page);
        }
        }
        if (pmd_bad(*pmd)) {
        if (pmd_bad(*pmd)) {
                printk(PgtabStr_bad_pmd, pmd_val(*pmd));
                printk(PgtabStr_bad_pmd, pmd_val(*pmd));
                pmd_set(pmd, BAD_PAGETABLE);
                pmd_set(pmd, BAD_PAGETABLE);
                return NULL;
                return NULL;
        }
        }
        return (pte_t *) pmd_page(*pmd) + address;
        return (pte_t *) pmd_page(*pmd) + address;
}
}
 
 
extern pmd_t *get_pointer_table (void);
extern pmd_t *get_pointer_table (void);
extern void free_pointer_table (pmd_t *);
extern void free_pointer_table (pmd_t *);
extern pmd_t *get_kpointer_table (void);
extern pmd_t *get_kpointer_table (void);
extern void free_kpointer_table (pmd_t *);
extern void free_kpointer_table (pmd_t *);
 
 
extern inline void pmd_free(pmd_t * pmd)
extern inline void pmd_free(pmd_t * pmd)
{
{
        free_pointer_table (pmd);
        free_pointer_table (pmd);
}
}
 
 
extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
{
{
        address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
        address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
        if (pgd_none(*pgd)) {
        if (pgd_none(*pgd)) {
                pmd_t *page = get_pointer_table();
                pmd_t *page = get_pointer_table();
                if (pgd_none(*pgd)) {
                if (pgd_none(*pgd)) {
                        if (page) {
                        if (page) {
                                pgd_set(pgd, page);
                                pgd_set(pgd, page);
                                return page + address;
                                return page + address;
                        }
                        }
                        pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                        pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                        return NULL;
                        return NULL;
                }
                }
                free_pointer_table(page);
                free_pointer_table(page);
        }
        }
        if (pgd_bad(*pgd)) {
        if (pgd_bad(*pgd)) {
                printk(PgtabStr_bad_pgd, pgd_val(*pgd));
                printk(PgtabStr_bad_pgd, pgd_val(*pgd));
                pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                return NULL;
                return NULL;
        }
        }
        return (pmd_t *) pgd_page(*pgd) + address;
        return (pmd_t *) pgd_page(*pgd) + address;
}
}
 
 
extern inline void pte_free_kernel(pte_t * pte)
extern inline void pte_free_kernel(pte_t * pte)
{
{
        cache_page((unsigned long)pte);
        cache_page((unsigned long)pte);
        free_page((unsigned long) pte);
        free_page((unsigned long) pte);
}
}
 
 
extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
{
{
        address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
        address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
        if (pmd_none(*pmd)) {
        if (pmd_none(*pmd)) {
                pte_t * page = (pte_t *) get_free_page(GFP_KERNEL);
                pte_t * page = (pte_t *) get_free_page(GFP_KERNEL);
                if (pmd_none(*pmd)) {
                if (pmd_none(*pmd)) {
                        if (page) {
                        if (page) {
                                nocache_page((unsigned long)page);
                                nocache_page((unsigned long)page);
                                pmd_set(pmd, page);
                                pmd_set(pmd, page);
                                return page + address;
                                return page + address;
                        }
                        }
                        pmd_set(pmd, BAD_PAGETABLE);
                        pmd_set(pmd, BAD_PAGETABLE);
                        return NULL;
                        return NULL;
                }
                }
                free_page((unsigned long) page);
                free_page((unsigned long) page);
        }
        }
        if (pmd_bad(*pmd)) {
        if (pmd_bad(*pmd)) {
                printk(PgtabStr_bad_pmdk, pmd_val(*pmd));
                printk(PgtabStr_bad_pmdk, pmd_val(*pmd));
                pmd_set(pmd, BAD_PAGETABLE);
                pmd_set(pmd, BAD_PAGETABLE);
                return NULL;
                return NULL;
        }
        }
        return (pte_t *) pmd_page(*pmd) + address;
        return (pte_t *) pmd_page(*pmd) + address;
}
}
 
 
extern inline void pmd_free_kernel(pmd_t * pmd)
extern inline void pmd_free_kernel(pmd_t * pmd)
{
{
        free_kpointer_table(pmd);
        free_kpointer_table(pmd);
}
}
 
 
extern inline pmd_t * pmd_alloc_kernel(pgd_t * pgd, unsigned long address)
extern inline pmd_t * pmd_alloc_kernel(pgd_t * pgd, unsigned long address)
{
{
        address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
        address = (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
        if (pgd_none(*pgd)) {
        if (pgd_none(*pgd)) {
                pmd_t *page = get_kpointer_table();
                pmd_t *page = get_kpointer_table();
                if (pgd_none(*pgd)) {
                if (pgd_none(*pgd)) {
                        if (page) {
                        if (page) {
                                pgd_set(pgd, page);
                                pgd_set(pgd, page);
                                return page + address;
                                return page + address;
                        }
                        }
                        pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                        pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                        return NULL;
                        return NULL;
                }
                }
                free_kpointer_table(page);
                free_kpointer_table(page);
        }
        }
        if (pgd_bad(*pgd)) {
        if (pgd_bad(*pgd)) {
                printk(PgtabStr_bad_pgdk, pgd_val(*pgd));
                printk(PgtabStr_bad_pgdk, pgd_val(*pgd));
                pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                pgd_set(pgd, (pmd_t *)BAD_PAGETABLE);
                return NULL;
                return NULL;
        }
        }
        return (pmd_t *) pgd_page(*pgd) + address;
        return (pmd_t *) pgd_page(*pgd) + address;
}
}
 
 
extern inline void pgd_free(pgd_t * pgd)
extern inline void pgd_free(pgd_t * pgd)
{
{
        free_pointer_table ((pmd_t *) pgd);
        free_pointer_table ((pmd_t *) pgd);
}
}
 
 
extern inline pgd_t * pgd_alloc(void)
extern inline pgd_t * pgd_alloc(void)
{
{
        return (pgd_t *)get_pointer_table ();
        return (pgd_t *)get_pointer_table ();
}
}
 
 
#define flush_icache() \
#define flush_icache() \
do { \
do { \
        if (CPU_IS_040_OR_060) \
        if (CPU_IS_040_OR_060) \
                asm __volatile__ ("nop; .word 0xf498 /* cinva %%ic */"); \
                asm __volatile__ ("nop; .word 0xf498 /* cinva %%ic */"); \
        else \
        else \
                asm __volatile__ ("movec %/cacr,%/d0;" \
                asm __volatile__ ("movec %/cacr,%/d0;" \
                     "oriw %0,%/d0;" \
                     "oriw %0,%/d0;" \
                     "movec %/d0,%/cacr" \
                     "movec %/d0,%/cacr" \
                     : /* no outputs */ \
                     : /* no outputs */ \
                     : "i" (FLUSH_I) \
                     : "i" (FLUSH_I) \
                     : "d0"); \
                     : "d0"); \
} while (0)
} while (0)
 
 
/*
/*
 * invalidate the cache for the specified memory range.
 * invalidate the cache for the specified memory range.
 * It starts at the physical address specified for
 * It starts at the physical address specified for
 * the given number of bytes.
 * the given number of bytes.
 */
 */
extern void cache_clear (unsigned long paddr, int len);
extern void cache_clear (unsigned long paddr, int len);
/*
/*
 * push any dirty cache in the specified memory range.
 * push any dirty cache in the specified memory range.
 * It starts at the physical address specified for
 * It starts at the physical address specified for
 * the given number of bytes.
 * the given number of bytes.
 */
 */
extern void cache_push (unsigned long paddr, int len);
extern void cache_push (unsigned long paddr, int len);
 
 
/*
/*
 * push and invalidate pages in the specified user virtual
 * push and invalidate pages in the specified user virtual
 * memory range.
 * memory range.
 */
 */
extern void cache_push_v (unsigned long vaddr, int len);
extern void cache_push_v (unsigned long vaddr, int len);
 
 
/* cache code */
/* cache code */
#define FLUSH_I_AND_D   (0x00000808)
#define FLUSH_I_AND_D   (0x00000808)
#define FLUSH_I         (0x00000008)
#define FLUSH_I         (0x00000008)
 
 
/* This is needed whenever the virtual mapping of the current
/* This is needed whenever the virtual mapping of the current
   process changes.  */
   process changes.  */
#define __flush_cache_all()                                             \
#define __flush_cache_all()                                             \
    do {                                                                \
    do {                                                                \
        if (CPU_IS_040_OR_060)                                          \
        if (CPU_IS_040_OR_060)                                          \
               __asm__ __volatile__ ("nop; .word 0xf478\n" ::);         \
               __asm__ __volatile__ ("nop; .word 0xf478\n" ::);         \
        else                                                            \
        else                                                            \
               __asm__ __volatile__ ("movec %%cacr,%%d0\n\t"            \
               __asm__ __volatile__ ("movec %%cacr,%%d0\n\t"            \
                                     "orw %0,%%d0\n\t"                  \
                                     "orw %0,%%d0\n\t"                  \
                                     "movec %%d0,%%cacr"                \
                                     "movec %%d0,%%cacr"                \
                                     : : "di" (FLUSH_I_AND_D) : "d0");  \
                                     : : "di" (FLUSH_I_AND_D) : "d0");  \
    } while (0)
    } while (0)
 
 
#define __flush_cache_030()                                             \
#define __flush_cache_030()                                             \
    do {                                                                \
    do {                                                                \
        if (CPU_IS_020_OR_030)                                  \
        if (CPU_IS_020_OR_030)                                  \
               __asm__ __volatile__ ("movec %%cacr,%%d0\n\t"            \
               __asm__ __volatile__ ("movec %%cacr,%%d0\n\t"            \
                                     "orw %0,%%d0\n\t"                  \
                                     "orw %0,%%d0\n\t"                  \
                                     "movec %%d0,%%cacr"                \
                                     "movec %%d0,%%cacr"                \
                                     : : "di" (FLUSH_I_AND_D) : "d0");  \
                                     : : "di" (FLUSH_I_AND_D) : "d0");  \
    } while (0)
    } while (0)
 
 
#define flush_cache_all() __flush_cache_all()
#define flush_cache_all() __flush_cache_all()
 
 
extern inline void flush_cache_mm(struct mm_struct *mm)
extern inline void flush_cache_mm(struct mm_struct *mm)
{
{
#if FLUSH_VIRTUAL_CACHE_040
#if FLUSH_VIRTUAL_CACHE_040
        if (mm == current->mm) __flush_cache_all();
        if (mm == current->mm) __flush_cache_all();
#else
#else
        if (mm == current->mm) __flush_cache_030();
        if (mm == current->mm) __flush_cache_030();
#endif
#endif
}
}
 
 
extern inline void flush_cache_range(struct mm_struct *mm,
extern inline void flush_cache_range(struct mm_struct *mm,
                                     unsigned long start,
                                     unsigned long start,
                                     unsigned long end)
                                     unsigned long end)
{
{
        if (mm == current->mm){
        if (mm == current->mm){
#if FLUSH_VIRTUAL_CACHE_040
#if FLUSH_VIRTUAL_CACHE_040
            if (CPU_IS_040_OR_060)
            if (CPU_IS_040_OR_060)
                cache_push_v(start, end-start);
                cache_push_v(start, end-start);
            else
            else
#endif
#endif
                __flush_cache_030();
                __flush_cache_030();
        }
        }
}
}
 
 
extern inline void flush_cache_page(struct vm_area_struct *vma,
extern inline void flush_cache_page(struct vm_area_struct *vma,
                                    unsigned long vmaddr)
                                    unsigned long vmaddr)
{
{
        if (vma->vm_mm == current->mm){
        if (vma->vm_mm == current->mm){
#if FLUSH_VIRTUAL_CACHE_040
#if FLUSH_VIRTUAL_CACHE_040
            if (CPU_IS_040_OR_060)
            if (CPU_IS_040_OR_060)
                cache_push_v(vmaddr, PAGE_SIZE);
                cache_push_v(vmaddr, PAGE_SIZE);
            else
            else
#endif
#endif
                __flush_cache_030();
                __flush_cache_030();
        }
        }
}
}
 
 
/* Push the page at kernel virtual address and clear the icache */
/* Push the page at kernel virtual address and clear the icache */
extern inline void flush_page_to_ram (unsigned long address)
extern inline void flush_page_to_ram (unsigned long address)
{
{
    if (CPU_IS_040_OR_060) {
    if (CPU_IS_040_OR_060) {
        register unsigned long tmp __asm ("a0") = VTOP(address);
        register unsigned long tmp __asm ("a0") = VTOP(address);
        __asm__ __volatile__ ("nop\n\t"
        __asm__ __volatile__ ("nop\n\t"
                              ".word 0xf470 /* cpushp %%dc,(%0) */\n\t"
                              ".word 0xf470 /* cpushp %%dc,(%0) */\n\t"
                              ".word 0xf490 /* cinvp %%ic,(%0) */"
                              ".word 0xf490 /* cinvp %%ic,(%0) */"
                              : : "a" (tmp));
                              : : "a" (tmp));
    }
    }
    else
    else
        __asm volatile ("movec %%cacr,%%d0\n\t"
        __asm volatile ("movec %%cacr,%%d0\n\t"
                        "orw %0,%%d0\n\t"
                        "orw %0,%%d0\n\t"
                        "movec %%d0,%%cacr"
                        "movec %%d0,%%cacr"
                        : : "di" (FLUSH_I) : "d0");
                        : : "di" (FLUSH_I) : "d0");
}
}
 
 
/* Push n pages at kernel virtual address and clear the icache */
/* Push n pages at kernel virtual address and clear the icache */
extern inline void flush_pages_to_ram (unsigned long address, int n)
extern inline void flush_pages_to_ram (unsigned long address, int n)
{
{
    if (CPU_IS_040_OR_060) {
    if (CPU_IS_040_OR_060) {
        while (n--) {
        while (n--) {
            register unsigned long tmp __asm ("a0") = VTOP(address);
            register unsigned long tmp __asm ("a0") = VTOP(address);
            __asm__ __volatile__ ("nop\n\t"
            __asm__ __volatile__ ("nop\n\t"
                                  ".word 0xf470 /* cpushp %%dc,(%0) */\n\t"
                                  ".word 0xf470 /* cpushp %%dc,(%0) */\n\t"
                                  ".word 0xf490 /* cinvp %%ic,(%0) */"
                                  ".word 0xf490 /* cinvp %%ic,(%0) */"
                                  : : "a" (tmp));
                                  : : "a" (tmp));
            address += PAGE_SIZE;
            address += PAGE_SIZE;
        }
        }
    }
    }
    else
    else
        __asm volatile ("movec %%cacr,%%d0\n\t"
        __asm volatile ("movec %%cacr,%%d0\n\t"
                        "orw %0,%%d0\n\t"
                        "orw %0,%%d0\n\t"
                        "movec %%d0,%%cacr"
                        "movec %%d0,%%cacr"
                        : : "di" (FLUSH_I) : "d0");
                        : : "di" (FLUSH_I) : "d0");
}
}
 
 
/*
/*
 * Check if the addr/len goes up to the end of a physical
 * Check if the addr/len goes up to the end of a physical
 * memory chunk.  Used for DMA functions.
 * memory chunk.  Used for DMA functions.
 */
 */
int mm_end_of_chunk (unsigned long addr, int len);
int mm_end_of_chunk (unsigned long addr, int len);
 
 
/*
/*
 * Map some physical address range into the kernel address space. The
 * Map some physical address range into the kernel address space. The
 * code is copied and adapted from map_chunk().
 * code is copied and adapted from map_chunk().
 */
 */
extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
                                int nocacheflag, unsigned long *memavailp );
                                int nocacheflag, unsigned long *memavailp );
/*
/*
 * Change the cache mode of some kernel address range.
 * Change the cache mode of some kernel address range.
 */
 */
extern void kernel_set_cachemode( unsigned long address, unsigned long size,
extern void kernel_set_cachemode( unsigned long address, unsigned long size,
                                  unsigned cmode );
                                  unsigned cmode );
 
 
/* Values for nocacheflag and cmode */
/* Values for nocacheflag and cmode */
#define KERNELMAP_FULL_CACHING          0
#define KERNELMAP_FULL_CACHING          0
#define KERNELMAP_NOCACHE_SER           1
#define KERNELMAP_NOCACHE_SER           1
#define KERNELMAP_NOCACHE_NONSER        2
#define KERNELMAP_NOCACHE_NONSER        2
#define KERNELMAP_NO_COPYBACK           3
#define KERNELMAP_NO_COPYBACK           3
 
 
/*
/*
 * The m68k doesn't have any external MMU info: the kernel page
 * The m68k doesn't have any external MMU info: the kernel page
 * tables contain all the necessary information.
 * tables contain all the necessary information.
 */
 */
extern inline void update_mmu_cache(struct vm_area_struct * vma,
extern inline void update_mmu_cache(struct vm_area_struct * vma,
        unsigned long address, pte_t pte)
        unsigned long address, pte_t pte)
{
{
}
}
 
 
/*
/*
 * I don't know what is going on here, but since these were changed,
 * I don't know what is going on here, but since these were changed,
 * swapping hasn't been working on the 68040.
 * swapping hasn't been working on the 68040.
 */
 */
 
 
#define SWP_TYPE(entry)  (((entry) >> 2) & 0x7f)
#define SWP_TYPE(entry)  (((entry) >> 2) & 0x7f)
#if 0
#if 0
#define SWP_OFFSET(entry) ((entry) >> 9)
#define SWP_OFFSET(entry) ((entry) >> 9)
#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << 9))
#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << 9))
#else
#else
#define SWP_OFFSET(entry) ((entry) >> PAGE_SHIFT)
#define SWP_OFFSET(entry) ((entry) >> PAGE_SHIFT)
#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << PAGE_SHIFT))
#define SWP_ENTRY(type,offset) (((type) << 2) | ((offset) << PAGE_SHIFT))
#endif
#endif
 
 
 
 
#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLY__ */
 
 
#else /* NO_MM */
#else /* NO_MM */
 
 
extern inline void flush_cache_mm(struct mm_struct *mm)
extern inline void flush_cache_mm(struct mm_struct *mm)
{
{
}
}
 
 
extern inline void flush_cache_range(struct mm_struct *mm,
extern inline void flush_cache_range(struct mm_struct *mm,
                                     unsigned long start,
                                     unsigned long start,
                                     unsigned long end)
                                     unsigned long end)
{
{
}
}
 
 
/* Push the page at kernel virtual address and clear the icache */
/* Push the page at kernel virtual address and clear the icache */
extern inline void flush_page_to_ram (unsigned long address)
extern inline void flush_page_to_ram (unsigned long address)
{
{
}
}
 
 
/* Push n pages at kernel virtual address and clear the icache */
/* Push n pages at kernel virtual address and clear the icache */
extern inline void flush_pages_to_ram (unsigned long address, int n)
extern inline void flush_pages_to_ram (unsigned long address, int n)
{
{
}
}
 
 
#endif /* NO_MM */
#endif /* NO_MM */
 
 
#endif /* _M68K_PGTABLE_H */
#endif /* _M68K_PGTABLE_H */
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.