`timescale 1ns / 1ns
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`timescale 1ns / 1ns
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`include "../rtl/inc.v"
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`include "../rtl/inc.v"
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module test_duursma_lee_algo;
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module test_duursma_lee_algo;
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// Inputs
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// Inputs
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reg clk;
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reg clk;
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reg reset;
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reg reset;
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reg [`WIDTH:0] xp,yp,xr,yr;
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reg [`WIDTH:0] xp,yp,xr,yr;
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// Outputs
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// Outputs
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wire done;
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wire done;
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wire [`W6:0] out;
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wire [`W6:0] out;
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wire [`WIDTH:0] o0,o1,o2,o3,o4,o5;
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wire [`WIDTH:0] o0,o1,o2,o3,o4,o5;
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// Instantiate the Unit Under Test (UUT)
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// Instantiate the Unit Under Test (UUT)
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duursma_lee_algo uut (
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duursma_lee_algo uut (
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.xp(xp),
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.xp(xp),
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.yp(yp),
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.yp(yp),
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.xr(xr),
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.xr(xr),
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.yr(yr),
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.yr(yr),
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.done(done),
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.done(done),
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.out(out)
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.out(out)
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);
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);
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assign {o5,o4,o3,o2,o1,o0} = out;
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assign {o5,o4,o3,o2,o1,o0} = out;
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initial begin
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initial begin
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// Initialize Inputs
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// Initialize Inputs
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clk = 0;
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clk = 0;
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reset = 0;
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reset = 0;
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xp = 0;
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xp = 0;
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yp = 0;
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yp = 0;
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xr = 0;
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xr = 0;
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yr = 0;
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yr = 0;
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// Wait 100 ns for global reset to finish
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// Wait 100 ns for global reset to finish
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#100;
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#100;
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// Add stimulus here
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// Add stimulus here
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xp = 194'haa5a8129a02a0544a4409a500045458901280969815aa820;
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xp = 194'haa5a8129a02a0544a4409a500045458901280969815aa820;
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yp = 194'h1414a205a21a4428968985650895464402249258428049204;
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yp = 194'h1414a205a21a4428968985650895464402249258428049204;
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xr = 194'h614011499522506668a01a20988812468a5aa8641aa24595;
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xr = 194'h614011499522506668a01a20988812468a5aa8641aa24595;
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yr = 194'haa01145590659058124a0261410682860225909182a92189;
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yr = 194'haa01145590659058124a0261410682860225909182a92189;
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@ (negedge clk); reset = 1;
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@ (negedge clk); reset = 1;
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@ (negedge clk); reset = 0;
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@ (negedge clk); reset = 0;
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@ (posedge done);
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@ (posedge done);
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#100;
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#100;
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if (out !== {{194'h289898988a561125505a60640642444905248262004845aa6,194'ha6a208a8402504225588a080a124292404061158a96a6a44},{194'h2266261625a9894a45640906a242a99295816525895a98a25,194'h21868921614220506a96a9285119405a15550801829589214},{194'h26a4200680102269189946046919aa804602128246999685a,194'h1a558028a5a964224120a9212a9089a0966a0918a41612219}})
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if (out !== {{194'h289898988a561125505a60640642444905248262004845aa6,194'ha6a208a8402504225588a080a124292404061158a96a6a44},{194'h2266261625a9894a45640906a242a99295816525895a98a25,194'h21868921614220506a96a9285119405a15550801829589214},{194'h26a4200680102269189946046919aa804602128246999685a,194'h1a558028a5a964224120a9212a9089a0966a0918a41612219}})
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begin
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begin
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$display("E");
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$display("E");
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$display("o0=%h",o0);
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$display("o0=%h",o0);
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$display("o1=%h",o1);
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$display("o1=%h",o1);
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$display("o2=%h",o2);
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$display("o2=%h",o2);
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$display("o3=%h",o3);
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$display("o3=%h",o3);
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$display("o4=%h",o4);
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$display("o4=%h",o4);
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$display("o5=%h",o5);
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$display("o5=%h",o5);
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end
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end
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#100;
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#100;
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$finish;
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$finish;
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end
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end
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always #5 clk = ~clk;
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always #5 clk = ~clk;
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endmodule
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endmodule
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