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<title>RAMPD port</title>
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<title>RAMPD port</title>
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<hr><h1>RAMPD port<br>
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<hr><h1>RAMPD port<br>
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<small>
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<small>
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[<a class="el" href="group__pavr__hwres__iof.html">IO File</a>]</small>
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[<a class="el" href="group__pavr__hwres__iof.html">IO File</a>]</small>
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<dl compact><dt><b>
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<dl compact><dt><b>
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RAMPD port connectivity</b><dd>
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RAMPD port connectivity</b><dd>
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<img src="pavr_hwres_iof_rampd_01.gif" alt="pavr_hwres_iof_rampd_01.gif">
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This is a trivial read-only port. <br>
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This is a trivial read-only port. <br>
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<br>
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The register RAMPD is used in controllers with more than 64KB of Data Memory, to access the whole Data Memory space. <br>
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The register RAMPD is used in controllers with more than 64KB of Data Memory, to access the whole Data Memory space. <br>
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RAMPD is used by instructions LDS (LoaD direct from data Space) and STS (STore direct to data Space). In order to get to the desired Data Memory space address, these instructions concatenate RAMPD with a 16 bit constant from the instruction word (RAMPD:k16). <br>
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RAMPD is used by instructions LDS (LoaD direct from data Space) and STS (STore direct to data Space). In order to get to the desired Data Memory space address, these instructions concatenate RAMPD with a 16 bit constant from the instruction word (RAMPD:k16). <br>
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<br>
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<br>
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In controllers with less than 64KB of Data Memory, this register is not used. <br>
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In controllers with less than 64KB of Data Memory, this register is not used. <br>
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The RAMPD register can be written only through the IOF general read and write port. <br>
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The RAMPD register can be written only through the IOF general read and write port. <br>
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No instruction explicitely requests to write this register. <br>
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No instruction explicitely requests to write this register. <br>
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<br>
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</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by
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</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by
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