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<title>Calls</title>
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<title>Calls</title>
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<hr><h1>Calls<br>
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<hr><h1>Calls<br>
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<small>
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<small>
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[<a class="el" href="group__pavr__pipeline.html">Pipeline details</a>]</small>
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[<a class="el" href="group__pavr__pipeline.html">Pipeline details</a>]</small>
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<dl compact><dt><b>
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<dl compact><dt><b>
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A few details</b><dd>
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A few details</b><dd>
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There are 4 call instructions, analogue to the <a class="el" href="group__pavr__pipeline__jumps.html">jump</a> instructions: <ul>
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There are 4 call instructions, analogue to the <a class="el" href="group__pavr__pipeline__jumps.html">jump</a> instructions: <ul>
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<li> RCALL (relative call) <br>
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<li> RCALL (relative call) <br>
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The call address is obtained by adding to the current Program Counter a 12 bit signed offset obtained from the instruction word. <li> ICALL (indirect call) <br>
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The call address is obtained by adding to the current Program Counter a 12 bit signed offset obtained from the instruction word. <li> ICALL (indirect call) <br>
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The call address is read from the Z pointer register. <br>
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The call address is read from the Z pointer register. <br>
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The destination resides in the lower 64 Kwords of Program Memory. <br>
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The destination resides in the lower 64 Kwords of Program Memory. <br>
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<li> EICALL (extended indirect call) <br>
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<li> EICALL (extended indirect call) <br>
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The call address is read from EIND:Z (higher 6 bis from EIND register in IOF, and lower 16 bits from Z pointer in RF). <br>
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The call address is read from EIND:Z (higher 6 bis from EIND register in IOF, and lower 16 bits from Z pointer in RF). <br>
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This call accesses the whole 22 bit addressing space of the Program Memory. <br>
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This call accesses the whole 22 bit addressing space of the Program Memory. <br>
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<li> CALL (far call) <br>
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<li> CALL (far call) <br>
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The call address is read from two consecutive instruction words. <br>
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The call address is read from two consecutive instruction words. <br>
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This call accesses the whole 22 bit addressing space of the Program Memory. <br>
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This call accesses the whole 22 bit addressing space of the Program Memory. <br>
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</ul>
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</ul>
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<br>
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<br>
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Apart from these, there is another kind of call, automatically inserted into the pipeline when an interrupt is processed. In addition to the regular calls, the implicit interrupt call also clears the general interrupt flag (flag I in the Status Register). This way, nested interrupts are disabled by default. However, they can be enabled explicitely. This behavior is questionable, but is implemented for the sake of AVR compatibility. <br>
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Apart from these, there is another kind of call, automatically inserted into the pipeline when an interrupt is processed. In addition to the regular calls, the implicit interrupt call also clears the general interrupt flag (flag I in the Status Register). This way, nested interrupts are disabled by default. However, they can be enabled explicitely. This behavior is questionable, but is implemented for the sake of AVR compatibility. <br>
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After an interrupt generates an implicit call, further interrupts are disabled for 4 clocks. This way, at least one instruction will be executed fron the called subroutine. Only after that, another interrupt can change the instruction flow. <br>
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After an interrupt generates an implicit call, further interrupts are disabled for 4 clocks. This way, at least one instruction will be executed fron the called subroutine. Only after that, another interrupt can change the instruction flow. <br>
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<br>
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<br>
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All calls take 4 clocks. <br>
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All calls take 4 clocks. <br>
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</dl><dl compact><dt><b>
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</dl><dl compact><dt><b>
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Call state machine</b><dd>
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Call state machine</b><dd>
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<br>
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<br>
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</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by
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</dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by
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