// ===========================================================================
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// ===========================================================================
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// File : crc32d16N.v
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// File : crc32d16N.v
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// Author : cwinward
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// Author : cwinward
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// Date : Sat Dec 8 14:00:37 MST 2007
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// Date : Sat Dec 8 14:00:37 MST 2007
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// Project : TI PHY design
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// Project : TI PHY design
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//
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//
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// Copyright (c) notice
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// Copyright (c) notice
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// This code adheres to the GNU public license
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// This code adheres to the GNU public license
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//
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//
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// ===========================================================================
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// ===========================================================================
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//
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//
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// $Id: crc32d16N.v,v 1.1.1.1 2007-12-08 22:26:59 cmagleby Exp $
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// $Id: crc32d16N.v,v 1.1.1.1 2007-12-08 22:26:59 cmagleby Exp $
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//
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//
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// ===========================================================================
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// ===========================================================================
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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//
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//
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// ===========================================================================
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// ===========================================================================
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// Function : This provides the lcrc for the end of the pci express TLP
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// Function : This provides the lcrc for the end of the pci express TLP
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// packet. This is 16 bits in 32 bits out.
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// packet. This is 16 bits in 32 bits out.
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// For more data widths see www.gutzlogic.com
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// For more data widths see www.gutzlogic.com
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// ===========================================================================
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// ===========================================================================
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// ===========================================================================
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// ===========================================================================
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module crc32d16N (/*AUTOARG*/
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module crc32d16N (/*AUTOARG*/
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// Outputs
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// Outputs
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crc32N,
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crc32N,
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// Inputs
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// Inputs
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clk, resetN, load, d, en
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clk, resetN, load, d, en
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);
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);
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input clk;
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input clk;
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input resetN;
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input resetN;
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input load; //load the seed value
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input load; //load the seed value
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input [15:0] d; //16 bit of tlp data starting with seq. num
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input [15:0] d; //16 bit of tlp data starting with seq. num
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input en; //should be high the entire packet.
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input en; //should be high the entire packet.
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output [31:0] crc32N; //inverted and swapped per pci spec.
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output [31:0] crc32N; //inverted and swapped per pci spec.
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wire [31:0] crc32N;
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wire [31:0] crc32N;
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assign crc32N = {~crc32[0],~crc32[1],~crc32[2],~crc32[3],~crc32[4],~crc32[5],~crc32[6],~crc32[7],
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assign crc32N = {~crc32[0],~crc32[1],~crc32[2],~crc32[3],~crc32[4],~crc32[5],~crc32[6],~crc32[7],
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~crc32[8],~crc32[9],~crc32[10],~crc32[11],~crc32[12],~crc32[13],~crc32[14],~crc32[15],
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~crc32[8],~crc32[9],~crc32[10],~crc32[11],~crc32[12],~crc32[13],~crc32[14],~crc32[15],
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~crc32[16],~crc32[17],~crc32[18],~crc32[19],~crc32[20],~crc32[21],~crc32[22],~crc32[23],
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~crc32[16],~crc32[17],~crc32[18],~crc32[19],~crc32[20],~crc32[21],~crc32[22],~crc32[23],
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~crc32[24],~crc32[25],~crc32[26],~crc32[27],~crc32[28],~crc32[29],~crc32[30],~crc32[31]};
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~crc32[24],~crc32[25],~crc32[26],~crc32[27],~crc32[28],~crc32[29],~crc32[30],~crc32[31]};
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/*AUTOWIRE*/
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/*AUTOWIRE*/
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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wire [31:0] crc; // From make_crc32d16 of crc32d16.v
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wire [31:0] crc; // From make_crc32d16 of crc32d16.v
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// End of automatics
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// End of automatics
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/* -----\/----- EXCLUDED -----\/-----
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/* -----\/----- EXCLUDED -----\/-----
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crc32d16 AUTO_TEMPLATE (.init(32'hFFFF_FFFF));
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crc32d16 AUTO_TEMPLATE (.init(32'hFFFF_FFFF));
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-----/\----- EXCLUDED -----/\----- */
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-----/\----- EXCLUDED -----/\----- */
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crc32d16 make_crc32d16 (/*AUTOINST*/
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crc32d16 make_crc32d16 (/*AUTOINST*/
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// Outputs
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// Outputs
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.crc (crc[31:0]),
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.crc (crc[31:0]),
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// Inputs
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// Inputs
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.clk (clk),
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.clk (clk),
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.resetN (resetN),
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.resetN (resetN),
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.load (load),
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.load (load),
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.d (d[15:0]),
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.d (d[15:0]),
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.init (32'hFFFF_FFFF), // Templated
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.init (32'hFFFF_FFFF), // Templated
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.en (en));
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.en (en));
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endmodule
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endmodule
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