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#include <stdio.h>
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#include <stdio.h>
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#include <fcntl.h>
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#include <fcntl.h>
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#include <pthread.h>
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#include <pthread.h>
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#include <unistd.h>
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#include <unistd.h>
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#include <math.h>
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#include <math.h>
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#include <sys/types.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/stat.h>
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#include <pthread.h>
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#include <pthread.h>
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#include "utypes.h"
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#include "utypes.h"
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#include "tf_teststrm.h"
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#include "tf_teststrm.h"
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#include "cl_ambpex.h"
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#include "cl_ambpex.h"
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#include "sys/time.h"
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#include "sys/time.h"
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#define BUFSIZEPKG 62
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#define BUFSIZEPKG 62
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#define TRDIND_MODE0 0x0
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#define TRDIND_MODE0 0x0
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#define TRDIND_MODE1 0x9
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#define TRDIND_MODE1 0x9
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#define TRDIND_MODE2 0xA
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#define TRDIND_MODE2 0xA
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#define TRDIND_SPD_CTRL 0x204
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#define TRDIND_SPD_CTRL 0x204
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#define TRDIND_SPD_ADDR 0x205
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#define TRDIND_SPD_ADDR 0x205
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#define TRDIND_SPD_DATA 0x206
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#define TRDIND_SPD_DATA 0x206
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#define TRDIND_TESTSEQ 0x0C
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#define TRDIND_TESTSEQ 0x0C
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#define TRDIND_CHAN 0x10
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#define TRDIND_CHAN 0x10
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#define TRDIND_FSRC 0x13
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#define TRDIND_FSRC 0x13
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#define TRDIND_GAIN 0x15
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#define TRDIND_GAIN 0x15
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#define TRDIND_CONTROL1 0x17
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#define TRDIND_CONTROL1 0x17
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#define TRDIND_DELAY_CTRL 0x1F
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#define TRDIND_DELAY_CTRL 0x1F
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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long GetTickCount(void)
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long GetTickCount(void)
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{
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{
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// return time( NULL);
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// return time( NULL);
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struct timeval tv;
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struct timeval tv;
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struct timezone tz;
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struct timezone tz;
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gettimeofday(&tv, &tz);
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gettimeofday(&tv, &tz);
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long ret=tv.tv_sec*1000 + tv.tv_usec/1000;
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long ret=tv.tv_sec*1000 + tv.tv_usec/1000;
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return ret;
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return ret;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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TF_TestStrm::TF_TestStrm( char* fname, CL_AMBPEX *pex )
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TF_TestStrm::TF_TestStrm( char* fname, CL_AMBPEX *pex )
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{
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{
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lc_status=0;
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lc_status=0;
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Terminate=0;
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Terminate=0;
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BlockRd=0;
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BlockRd=0;
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BlockOk=0;
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BlockOk=0;
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BlockError=0;
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BlockError=0;
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TotalError=0;
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TotalError=0;
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pBrd=pex;
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pBrd=pex;
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bufIsvi=NULL;
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bufIsvi=NULL;
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SetDefault();
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SetDefault();
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GetParamFromFile( fname );
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GetParamFromFile( fname );
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CalculateParams();
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CalculateParams();
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isFirstCallStep=true;
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isFirstCallStep=true;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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TF_TestStrm::~TF_TestStrm()
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TF_TestStrm::~TF_TestStrm()
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{
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{
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pBrd->StreamDestroy( rd0.Strm );
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pBrd->StreamDestroy( rd0.Strm );
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delete bufIsvi;
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delete bufIsvi;
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bufIsvi=NULL;
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bufIsvi=NULL;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void TF_TestStrm::Prepare( void )
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void TF_TestStrm::Prepare( void )
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{
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{
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PrepareAdm();
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PrepareAdm();
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rd0.trd=trdNo;
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rd0.trd=trdNo;
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rd0.Strm=strmNo;
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rd0.Strm=strmNo;
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pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
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pBrd->StreamInit( rd0.Strm, CntBuffer, SizeBuferOfBytes, rd0.trd, 1, isCycle, isSystem, isAgreeMode );
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bufIsvi = new U32[SizeBlockOfWords*2];
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bufIsvi = new U32[SizeBlockOfWords*2];
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void TF_TestStrm::Start( void )
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void TF_TestStrm::Start( void )
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{
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{
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int res = pthread_attr_init(&attrThread_);
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int res = pthread_attr_init(&attrThread_);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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res = pthread_attr_setdetachstate(&attrThread_, PTHREAD_CREATE_JOINABLE);
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res = pthread_attr_setdetachstate(&attrThread_, PTHREAD_CREATE_JOINABLE);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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res = pthread_create(&hThread, &attrThread_, ThreadFunc, this);
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res = pthread_create(&hThread, &attrThread_, ThreadFunc, this);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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res = pthread_attr_init(&attrThreadIsvi_);
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res = pthread_attr_init(&attrThreadIsvi_);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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res = pthread_attr_setdetachstate(&attrThreadIsvi_, PTHREAD_CREATE_JOINABLE);
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res = pthread_attr_setdetachstate(&attrThreadIsvi_, PTHREAD_CREATE_JOINABLE);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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res = pthread_create(&hThreadIsvi, &attrThreadIsvi_, ThreadFuncIsvi, this);
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res = pthread_create(&hThreadIsvi, &attrThreadIsvi_, ThreadFuncIsvi, this);
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if(res != 0) {
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if(res != 0) {
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fprintf(stderr, "%s\n", "Stream not started");
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fprintf(stderr, "%s\n", "Stream not started");
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return;
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return;
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}
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}
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void TF_TestStrm::Stop( void )
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void TF_TestStrm::Stop( void )
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{
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{
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Terminate=1;
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Terminate=1;
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lc_status=3;
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lc_status=3;
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//BRDC_fprintf( stderr, "TF_TestStrm::Stop(): lc_status = %d\n", lc_status );
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//BRDC_fprintf( stderr, "TF_TestStrm::Stop(): lc_status = %d\n", lc_status );
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void TF_TestStrm::Step( void )
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void TF_TestStrm::Step( void )
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{
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{
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rd0.testBuf.check_result( &rd0.BlockOk , &rd0.BlockError, NULL, NULL, NULL );
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rd0.testBuf.check_result( &rd0.BlockOk , &rd0.BlockError, NULL, NULL, NULL );
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U32 status = pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
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U32 status = pBrd->RegPeekDir( rd0.trd, 0 ) & 0xFFFF;
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U32 cnt_rd=rd0.BlockRd;
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U32 cnt_rd=rd0.BlockRd;
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long currentTime = GetTickCount();
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long currentTime = GetTickCount();
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int min, sec_all, sec;
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int min, sec_all, sec;
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sec_all= currentTime-rd0.time_start;
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sec_all= currentTime-rd0.time_start;
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sec_all/=1000;
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sec_all/=1000;
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sec=sec_all%60;
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sec=sec_all%60;
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min=sec_all/60;
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min=sec_all/60;
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BRDC_fprintf( stderr, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %u:%.2u \r", "TRD :", rd0.trd, rd0.BlockWr, cnt_rd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, min, sec );
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BRDC_fprintf( stderr, "%6s %3d %10d %10d %10d %10d %9.1f %10.1f 0x%.4X %u:%.2u \r", "TRD :", rd0.trd, rd0.BlockWr, cnt_rd, rd0.BlockOk, rd0.BlockError, rd0.VelocityCurrent, rd0.VelocityAvarage, status, min, sec );
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if( isSystemMonitor )
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if( isSystemMonitor )
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{
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{
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unsigned temp;
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unsigned temp;
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float ty;
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float ty;
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pBrd->RegPokeInd( 0, 0x210, 0 );
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pBrd->RegPokeInd( 0, 0x210, 0 );
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temp = pBrd->RegPeekInd( 0, 0x211 );
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temp = pBrd->RegPeekInd( 0, 0x211 );
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temp >>=6;
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temp >>=6;
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temp &= 0x3FF;
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temp &= 0x3FF;
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ty = (temp*503.975)/1024-273.15;
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ty = (temp*503.975)/1024-273.15;
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BRDC_fprintf( stderr, "%6s %3d %10.1f\n", "SYSMON", 0, ty );
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BRDC_fprintf( stderr, "%6s %3d %10.1f\n", "SYSMON", 0, ty );
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}
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}
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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int TF_TestStrm::isComplete( void )
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int TF_TestStrm::isComplete( void )
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{
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{
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if( (lc_status==4) && (IsviStatus==100) )
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if( (lc_status==4) && (IsviStatus==100) )
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return 1;
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return 1;
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return 0;
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return 0;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void TF_TestStrm::GetResult( void )
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void TF_TestStrm::GetResult( void )
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{
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{
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BRDC_fprintf( stderr, "\n\nResult of receiving data from trd %d \n", trdNo );
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BRDC_fprintf( stderr, "\n\nResult of receiving data from trd %d \n", trdNo );
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BRDC_fprintf( stderr, "\n Recieved blocks : %d \n", rd0.BlockRd );
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BRDC_fprintf( stderr, "\n Recieved blocks : %d \n", rd0.BlockRd );
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BRDC_fprintf( stderr, " Correct blocks : %d \n", rd0.BlockOk );
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BRDC_fprintf( stderr, " Correct blocks : %d \n", rd0.BlockOk );
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BRDC_fprintf( stderr, " Incorrect blocks: %d \n", rd0.BlockError );
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BRDC_fprintf( stderr, " Incorrect blocks: %d \n", rd0.BlockError );
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BRDC_fprintf( stderr, " Total errors : %d \n\n", rd0.TotalError );
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BRDC_fprintf( stderr, " Total errors : %d \n\n", rd0.TotalError );
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BRDC_fprintf( stderr, " Speed : %.1f [Mbytes/s] \n", rd0.VelocityAvarage );
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BRDC_fprintf( stderr, " Speed : %.1f [Mbytes/s] \n", rd0.VelocityAvarage );
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long currentTime = GetTickCount();
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long currentTime = GetTickCount();
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int min, sec_all, sec;
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int min, sec_all, sec;
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sec_all= currentTime-rd0.time_start;
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sec_all= currentTime-rd0.time_start;
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sec_all/=1000;
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sec_all/=1000;
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sec=sec_all%60;
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sec=sec_all%60;
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min=sec_all/60;
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min=sec_all/60;
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BRDC_fprintf( stderr, " Time of test : %d min %.2d sec\n\n", min, sec );
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BRDC_fprintf( stderr, " Time of test : %d min %.2d sec\n\n", min, sec );
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if(rd0.BlockRd!=0 && rd0.BlockError==0)
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if(rd0.BlockRd!=0 && rd0.BlockError==0)
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{
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{
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BRDC_fprintf( stderr,"All data is correct. No error\n" );
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BRDC_fprintf( stderr,"All data is correct. No error\n" );
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} else if( rd0.BlockRd==0 )
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} else if( rd0.BlockRd==0 )
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{
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{
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BRDC_fprintf( stderr,"Error - data is not received \n" );
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BRDC_fprintf( stderr,"Error - data is not received \n" );
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} else
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} else
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{
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{
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BRDC_fprintf( stderr,"List of error:\n" );
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BRDC_fprintf( stderr,"List of error:\n" );
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BRDC_fprintf( stderr,"%s\n", rd0.testBuf.report_word_error());
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BRDC_fprintf( stderr,"%s\n", rd0.testBuf.report_word_error());
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}
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}
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BRDC_fprintf( stderr, "\n\n" );
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BRDC_fprintf( stderr, "\n\n" );
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void* TF_TestStrm::ThreadFunc( void* lpvThreadParm )
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void* TF_TestStrm::ThreadFunc( void* lpvThreadParm )
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{
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{
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TF_TestStrm *test=(TF_TestStrm*)lpvThreadParm;
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TF_TestStrm *test=(TF_TestStrm*)lpvThreadParm;
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UINT ret;
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uint32_t ret;
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if( !test )
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if( !test )
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return 0;
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return 0;
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ret=test->Execute();
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ret=test->Execute();
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return (void*)ret;
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return (void*)(size_t)ret;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void* TF_TestStrm::ThreadFuncIsvi( void* lpvThreadParm )
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void* TF_TestStrm::ThreadFuncIsvi( void* lpvThreadParm )
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{
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{
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TF_TestStrm *test=(TF_TestStrm*)lpvThreadParm;
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TF_TestStrm *test=(TF_TestStrm*)lpvThreadParm;
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UINT ret;
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uint32_t ret;
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if( !test )
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if( !test )
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return 0;
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return 0;
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Sleep( 200 );
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Sleep( 200 );
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ret=test->ExecuteIsvi();
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ret=test->ExecuteIsvi();
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return (void*)ret;
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return (void*)(size_t)ret;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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//! Установка параметров по умолчанию
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//! Установка параметров по умолчанию
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void TF_TestStrm::SetDefault( void )
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void TF_TestStrm::SetDefault( void )
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{
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{
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int ii=0;
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int ii=0;
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array_cfg[ii++]=STR_CFG( 0, "CntBuffer", "16", (U32*)&CntBuffer, "Stream buffers number" );
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array_cfg[ii++]=STR_CFG( 0, "CntBuffer", "16", (U32*)&CntBuffer, "Stream buffers number" );
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array_cfg[ii++]=STR_CFG( 0, "CntBlockInBuffer", "1", (U32*)&CntBlockInBuffer, "Blocks in buffer" );
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array_cfg[ii++]=STR_CFG( 0, "CntBlockInBuffer", "1", (U32*)&CntBlockInBuffer, "Blocks in buffer" );
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array_cfg[ii++]=STR_CFG( 0, "SizeBlockOfWords", "262144", (U32*)&SizeBlockOfWords, "Block size (in words)" );
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array_cfg[ii++]=STR_CFG( 0, "SizeBlockOfWords", "262144", (U32*)&SizeBlockOfWords, "Block size (in words)" );
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array_cfg[ii++]=STR_CFG( 0, "isCycle", "1", (U32*)&isCycle, "1 - Stream working in cycle mode" );
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array_cfg[ii++]=STR_CFG( 0, "isCycle", "1", (U32*)&isCycle, "1 - Stream working in cycle mode" );
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array_cfg[ii++]=STR_CFG( 0, "isSystem", "1", (U32*)&isSystem, "1 - system memory allocation" );
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array_cfg[ii++]=STR_CFG( 0, "isSystem", "1", (U32*)&isSystem, "1 - system memory allocation" );
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array_cfg[ii++]=STR_CFG( 0, "isAgreeMode", "0", (U32*)&isAgreeMode, "1 - adjust mode" );
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array_cfg[ii++]=STR_CFG( 0, "isAgreeMode", "0", (U32*)&isAgreeMode, "1 - adjust mode" );
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array_cfg[ii++]=STR_CFG( 0, "isRestart", "0", (U32*)&isRestart, "1 - Перезапуск АЦП" );
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array_cfg[ii++]=STR_CFG( 0, "isRestart", "0", (U32*)&isRestart, "1 - Перезапуск АЦП" );
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array_cfg[ii++]=STR_CFG( 0, "trdNo", "4", (U32*)&trdNo, "Номер тетрады" );
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array_cfg[ii++]=STR_CFG( 0, "trdNo", "4", (U32*)&trdNo, "Номер тетрады" );
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array_cfg[ii++]=STR_CFG( 0, "strmNo", "0", (U32*)&strmNo, "Номер стрма" );
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array_cfg[ii++]=STR_CFG( 0, "strmNo", "0", (U32*)&strmNo, "Номер стрма" );
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array_cfg[ii++]=STR_CFG( 0, "isTest", "0", (U32*)&isTest, "0 - нет, 1 - проверка псевдослучайной последовательности, 2 - проверка тестовой последовательности" );
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array_cfg[ii++]=STR_CFG( 0, "isTest", "0", (U32*)&isTest, "0 - нет, 1 - проверка псевдослучайной последовательности, 2 - проверка тестовой последовательности" );
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array_cfg[ii++]=STR_CFG( 0, "isMainTest", "0", (U32*)&isMainTest, "1 - включение режима тестирования в тетраде MAIN" );
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array_cfg[ii++]=STR_CFG( 0, "isMainTest", "0", (U32*)&isMainTest, "1 - включение режима тестирования в тетраде MAIN" );
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fnameAdmReg=NULL;
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fnameAdmReg=NULL;
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array_cfg[ii++]=STR_CFG( 2, "AdmReg", "adcreg.ini", (U32*)&fnameAdmReg, "имя файла регистров" );
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array_cfg[ii++]=STR_CFG( 2, "AdmReg", "adcreg.ini", (U32*)&fnameAdmReg, "имя файла регистров" );
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array_cfg[ii++]=STR_CFG( 0, "isAdmReg", "0", (U32*)&isAdmReg, "1 - разрешение записи регистров из файла AdmReg" );
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array_cfg[ii++]=STR_CFG( 0, "isAdmReg", "0", (U32*)&isAdmReg, "1 - разрешение записи регистров из файла AdmReg" );
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fnameAdmReg2=NULL;
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fnameAdmReg2=NULL;
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array_cfg[ii++]=STR_CFG( 2, "AdmReg2", "adcreg2.ini", (U32*)&fnameAdmReg2, "имя файла регистров (выполняется после старта стрима)" );
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array_cfg[ii++]=STR_CFG( 2, "AdmReg2", "adcreg2.ini", (U32*)&fnameAdmReg2, "имя файла регистров (выполняется после старта стрима)" );
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array_cfg[ii++]=STR_CFG( 0, "isAdmReg2", "0", (U32*)&isAdmReg2, "1 - разрешение записи регистров из файла AdmReg2" );
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array_cfg[ii++]=STR_CFG( 0, "isAdmReg2", "0", (U32*)&isAdmReg2, "1 - разрешение записи регистров из файла AdmReg2" );
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fnameIsvi=NULL;
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fnameIsvi=NULL;
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array_cfg[ii++]=STR_CFG( 2, "ISVI_FILE", "", (U32*)&fnameIsvi, "имя файла данных ISVI" );
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array_cfg[ii++]=STR_CFG( 2, "ISVI_FILE", "", (U32*)&fnameIsvi, "имя файла данных ISVI" );
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|
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array_cfg[ii++]=STR_CFG( 0, "ISVI_HEADER", "0", (U32*)&IsviHeaderMode, "режим формирования суффикса ISVI, 0 - нет, 1 - DDC, 2 - ADC" );
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array_cfg[ii++]=STR_CFG( 0, "ISVI_HEADER", "0", (U32*)&IsviHeaderMode, "режим формирования суффикса ISVI, 0 - нет, 1 - DDC, 2 - ADC" );
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|
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array_cfg[ii++]=STR_CFG( 0, "FifoRdy", "0", (U32*)&isFifoRdy, "1 - генератор тестовой последовательности анализирует флаг готовности FIFO" );
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array_cfg[ii++]=STR_CFG( 0, "FifoRdy", "0", (U32*)&isFifoRdy, "1 - генератор тестовой последовательности анализирует флаг готовности FIFO" );
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|
|
array_cfg[ii++]=STR_CFG( 0, "Cnt1", "0", (U32*)&Cnt1, "Число тактов записи в FIFO, 0 - постоянная запись в FIFO" );
|
array_cfg[ii++]=STR_CFG( 0, "Cnt1", "0", (U32*)&Cnt1, "Число тактов записи в FIFO, 0 - постоянная запись в FIFO" );
|
|
|
array_cfg[ii++]=STR_CFG( 0, "Cnt2", "0", (U32*)&Cnt2, "Число тактов паузы при записи в FIFO" );
|
array_cfg[ii++]=STR_CFG( 0, "Cnt2", "0", (U32*)&Cnt2, "Число тактов паузы при записи в FIFO" );
|
|
|
array_cfg[ii++]=STR_CFG( 0, "DataType", "0", (U32*)&DataType, "Тип данных при фиксированном типе блока, 6 - счётчик, 8 - псевдослучайная последовательность" );
|
array_cfg[ii++]=STR_CFG( 0, "DataType", "0", (U32*)&DataType, "Тип данных при фиксированном типе блока, 6 - счётчик, 8 - псевдослучайная последовательность" );
|
|
|
array_cfg[ii++]=STR_CFG( 0, "DataFix", "0", (U32*)&DataFix, "1 - фиксированный тип блока, 0 - данные в блоке записят от номера блока" );
|
array_cfg[ii++]=STR_CFG( 0, "DataFix", "0", (U32*)&DataFix, "1 - фиксированный тип блока, 0 - данные в блоке записят от номера блока" );
|
|
|
array_cfg[ii++]=STR_CFG( 0, "isTestCtrl", "0", (U32*)&isTestCtrl, "1 - подготовка тетрады TEST_CTRL" );
|
array_cfg[ii++]=STR_CFG( 0, "isTestCtrl", "0", (U32*)&isTestCtrl, "1 - подготовка тетрады TEST_CTRL" );
|
|
|
array_cfg[ii++]=STR_CFG( 0, "TestSeq", "0", (U32*)&TestSeq, "Значение регистра TEST_SEQ" );
|
array_cfg[ii++]=STR_CFG( 0, "TestSeq", "0", (U32*)&TestSeq, "Значение регистра TEST_SEQ" );
|
|
|
max_item=ii;
|
max_item=ii;
|
|
|
{
|
{
|
char str[1024];
|
char str[1024];
|
for( unsigned ii=0; ii<max_item; ii++ )
|
for( unsigned ii=0; ii<max_item; ii++ )
|
{
|
{
|
sprintf( str, "%s %s", array_cfg[ii].name, array_cfg[ii].def );
|
sprintf( str, "%s %s", array_cfg[ii].name, array_cfg[ii].def );
|
GetParamFromStr( str );
|
GetParamFromStr( str );
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
//! Расчёт параметров
|
//! Расчёт параметров
|
void TF_TestStrm::CalculateParams( void )
|
void TF_TestStrm::CalculateParams( void )
|
{
|
{
|
SizeBlockOfBytes = SizeBlockOfWords * 4; // Размер блока в байтах
|
SizeBlockOfBytes = SizeBlockOfWords * 4; // Размер блока в байтах
|
SizeBuferOfBytes = CntBlockInBuffer * SizeBlockOfBytes ; // Размер буфера в байтах
|
SizeBuferOfBytes = CntBlockInBuffer * SizeBlockOfBytes ; // Размер буфера в байтах
|
SizeStreamOfBytes = CntBuffer * SizeBuferOfBytes; // Общий размер буфера стрима
|
SizeStreamOfBytes = CntBuffer * SizeBuferOfBytes; // Общий размер буфера стрима
|
|
|
ShowParam();
|
ShowParam();
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
//! Отображение параметров
|
//! Отображение параметров
|
void TF_TestStrm::ShowParam( void )
|
void TF_TestStrm::ShowParam( void )
|
{
|
{
|
TF_WorkParam::ShowParam();
|
TF_WorkParam::ShowParam();
|
|
|
BRDC_fprintf( stderr, "Total stream buffer size: %d MB\n\n", SizeStreamOfBytes/(1024*1024) );
|
BRDC_fprintf( stderr, "Total stream buffer size: %d MB\n\n", SizeStreamOfBytes/(1024*1024) );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
U32 TF_TestStrm::Execute( void )
|
U32 TF_TestStrm::Execute( void )
|
{
|
{
|
rd0.testBuf.buf_check_start( 32, 64 );
|
rd0.testBuf.buf_check_start( 32, 64 );
|
|
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2010 );
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2010 );
|
pBrd->StreamStart( rd0.Strm );
|
pBrd->StreamStart( rd0.Strm );
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2038 );
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2038 );
|
if( isTestCtrl )
|
if( isTestCtrl )
|
{
|
{
|
StartTestCtrl();
|
StartTestCtrl();
|
}
|
}
|
|
|
if( isAdmReg2 ) {
|
if( isAdmReg2 ) {
|
PrepareAdmReg( fnameAdmReg2 );
|
PrepareAdmReg( fnameAdmReg2 );
|
}
|
}
|
|
|
|
|
rd0.time_last=rd0.time_start=GetTickCount();
|
rd0.time_last=rd0.time_start=GetTickCount();
|
|
|
isDmaStart=1;
|
isDmaStart=1;
|
|
|
for( ; ; )
|
for( ; ; )
|
{
|
{
|
if( Terminate )
|
if( Terminate )
|
{
|
{
|
break;
|
break;
|
}
|
}
|
|
|
ReceiveData( &rd0 );
|
ReceiveData( &rd0 );
|
}
|
}
|
|
|
pBrd->RegPokeInd( rd0.trd, 0, 2 );
|
pBrd->RegPokeInd( rd0.trd, 0, 2 );
|
Sleep( 200 );
|
Sleep( 200 );
|
|
|
pBrd->StreamStop( rd0.Strm );
|
pBrd->StreamStop( rd0.Strm );
|
Sleep( 10 );
|
Sleep( 10 );
|
|
|
lc_status=4;
|
lc_status=4;
|
|
|
//BRDC_fprintf( stderr, "TF_TestStrm::Execute(): lc_status = %d\n", lc_status );
|
//BRDC_fprintf( stderr, "TF_TestStrm::Execute(): lc_status = %d\n", lc_status );
|
|
|
return 1;
|
return 1;
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::ReceiveData( ParamExchange *pr )
|
void TF_TestStrm::ReceiveData( ParamExchange *pr )
|
{
|
{
|
U32 *ptr;
|
U32 *ptr;
|
U32 *ptrBlock;
|
U32 *ptrBlock;
|
U32 mode=0;
|
U32 mode=0;
|
mode |= pr->DataType<<8;
|
mode |= pr->DataType<<8;
|
mode |= pr->DataFix<<7;
|
mode |= pr->DataFix<<7;
|
|
|
int ret;
|
int ret;
|
int kk;
|
int kk;
|
|
|
for( kk=0; kk<16; kk++ )
|
for( kk=0; kk<16; kk++ )
|
{
|
{
|
ret=pBrd->StreamGetBuf( pr->Strm, &ptr );
|
ret=pBrd->StreamGetBuf( pr->Strm, &ptr );
|
if( ret )
|
if( ret )
|
{ // Проверка буфера стрима
|
{ // Проверка буфера стрима
|
|
|
for( unsigned ii=0; ii<CntBlockInBuffer; ii++ )
|
for( unsigned ii=0; ii<CntBlockInBuffer; ii++ )
|
{
|
{
|
ptrBlock=ptr+ii*SizeBlockOfWords;
|
ptrBlock=ptr+ii*SizeBlockOfWords;
|
if( isIsvi )
|
if( isIsvi )
|
IsviStep( ptrBlock );
|
IsviStep( ptrBlock );
|
|
|
if( 1==isTest )
|
if( 1==isTest )
|
pr->testBuf.buf_check_psd( ptrBlock, SizeBlockOfWords );
|
pr->testBuf.buf_check_psd( ptrBlock, SizeBlockOfWords );
|
//int a=0;
|
//int a=0;
|
else if( 2==isTest )
|
else if( 2==isTest )
|
pr->testBuf.buf_check( ptrBlock, pr->BlockRd, SizeBlockOfWords, BlockMode );
|
pr->testBuf.buf_check( ptrBlock, pr->BlockRd, SizeBlockOfWords, BlockMode );
|
else if( 4==isTest )
|
else if( 4==isTest )
|
pr->testBuf.buf_check_inv( ptrBlock, SizeBlockOfWords );
|
pr->testBuf.buf_check_inv( ptrBlock, SizeBlockOfWords );
|
|
|
pr->BlockRd++;
|
pr->BlockRd++;
|
}
|
}
|
if( isAgreeMode )
|
if( isAgreeMode )
|
{
|
{
|
pBrd->StreamGetBufDone( pr->Strm );
|
pBrd->StreamGetBufDone( pr->Strm );
|
}
|
}
|
if( (1==isRestart) && (pr->BlockRd==(CntBuffer*CntBlockInBuffer) ) )
|
if( (1==isRestart) && (pr->BlockRd==(CntBuffer*CntBlockInBuffer) ) )
|
{
|
{
|
RestartAdc();
|
RestartAdc();
|
}
|
}
|
|
|
} else {
|
} else {
|
|
|
pr->freeCycle++;
|
pr->freeCycle++;
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
long currentTime = GetTickCount();
|
long currentTime = GetTickCount();
|
if( (currentTime - pr->time_last)>4000 )
|
if( (currentTime - pr->time_last)>4000 )
|
{
|
{
|
float t1 = currentTime - pr->time_last;
|
float t1 = currentTime - pr->time_last;
|
float t2 = currentTime - pr->time_start;
|
float t2 = currentTime - pr->time_start;
|
float v = 1000.0*(pr->BlockRd-pr->BlockLast)*SizeBlockOfBytes/t1;
|
float v = 1000.0*(pr->BlockRd-pr->BlockLast)*SizeBlockOfBytes/t1;
|
v/=1024*1024;
|
v/=1024*1024;
|
pr->VelocityCurrent=v;
|
pr->VelocityCurrent=v;
|
|
|
v = 1000.0*(pr->BlockRd)*SizeBlockOfBytes/t2;
|
v = 1000.0*(pr->BlockRd)*SizeBlockOfBytes/t2;
|
v/=1024*1024;
|
v/=1024*1024;
|
pr->VelocityAvarage=v;
|
pr->VelocityAvarage=v;
|
pr->time_last = currentTime;
|
pr->time_last = currentTime;
|
pr->BlockLast = pr->BlockRd;
|
pr->BlockLast = pr->BlockRd;
|
pr->freeCycleZ=pr->freeCycle;
|
pr->freeCycleZ=pr->freeCycle;
|
pr->freeCycle=0;
|
pr->freeCycle=0;
|
}
|
}
|
//Sleep(1);
|
//Sleep(1);
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::PrepareAdm( void )
|
void TF_TestStrm::PrepareAdm( void )
|
{
|
{
|
U32 trd=trdNo;
|
U32 trd=trdNo;
|
U32 id, id_mod, ver;
|
U32 id, id_mod, ver;
|
BRDC_fprintf( stderr, "\nPreparing tetrade\n" );
|
BRDC_fprintf( stderr, "\nPreparing tetrade\n" );
|
|
|
|
|
id = pBrd->RegPeekInd( trd, 0x100 );
|
id = pBrd->RegPeekInd( trd, 0x100 );
|
id_mod = pBrd->RegPeekInd( trd, 0x101 );
|
id_mod = pBrd->RegPeekInd( trd, 0x101 );
|
ver = pBrd->RegPeekInd( trd, 0x102 );
|
ver = pBrd->RegPeekInd( trd, 0x102 );
|
|
|
BRDC_fprintf( stderr, "\nTetrade %d ID: 0x%.2X MOD: %d VER: %d.%d \n\n",
|
BRDC_fprintf( stderr, "\nTetrade %d ID: 0x%.2X MOD: %d VER: %d.%d \n\n",
|
trd, id, id_mod, (ver>>8) & 0xFF, ver&0xFF );
|
trd, id, id_mod, (ver>>8) & 0xFF, ver&0xFF );
|
|
|
|
|
if( isMainTest )
|
if( isMainTest )
|
PrepareMain();
|
PrepareMain();
|
|
|
BlockMode = DataType <<8;
|
BlockMode = DataType <<8;
|
BlockMode |= DataFix <<7;
|
BlockMode |= DataFix <<7;
|
|
|
if( isTestCtrl )
|
if( isTestCtrl )
|
PrepareTestCtrl();
|
PrepareTestCtrl();
|
|
|
if( isAdmReg )
|
if( isAdmReg )
|
PrepareAdmReg( fnameAdmReg );
|
PrepareAdmReg( fnameAdmReg );
|
|
|
IsviStatus=0;
|
IsviStatus=0;
|
IsviCnt=0;
|
IsviCnt=0;
|
isIsvi=0;
|
isIsvi=0;
|
if( fnameIsvi )
|
if( fnameIsvi )
|
{
|
{
|
IsviStatus=1;
|
IsviStatus=1;
|
isIsvi=1;
|
isIsvi=1;
|
}
|
}
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
//! Подготовка MAIN
|
//! Подготовка MAIN
|
void TF_TestStrm::PrepareMain( void )
|
void TF_TestStrm::PrepareMain( void )
|
{
|
{
|
|
|
if( 4==isTest )
|
if( 4==isTest )
|
{
|
{
|
BRDC_fprintf( stderr, "In tetrade MAIN set mode of binary-inversion sequence\n" );
|
BRDC_fprintf( stderr, "In tetrade MAIN set mode of binary-inversion sequence\n" );
|
} else
|
} else
|
{
|
{
|
BRDC_fprintf( stderr, "In tetrade MAIN set of pseudo-random mode sequence\n" );
|
BRDC_fprintf( stderr, "In tetrade MAIN set of pseudo-random mode sequence\n" );
|
pBrd->RegPokeInd( 0, 12, 1 ); // Регистр TEST_MODE[0]=1 - режим формирования псевдослучайной последовательности
|
pBrd->RegPokeInd( 0, 12, 1 ); // Регистр TEST_MODE[0]=1 - режим формирования псевдослучайной последовательности
|
}
|
}
|
pBrd->RegPokeInd( 0, 0, 2 ); // Сброс FIFO - перевод в начальное состояние
|
pBrd->RegPokeInd( 0, 0, 2 ); // Сброс FIFO - перевод в начальное состояние
|
Sleep( 1 );
|
Sleep( 1 );
|
pBrd->RegPokeInd( 0, 0, 0 );
|
pBrd->RegPokeInd( 0, 0, 0 );
|
Sleep( 1 );
|
Sleep( 1 );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::IsviStep( U32* ptr )
|
void TF_TestStrm::IsviStep( U32* ptr )
|
{
|
{
|
unsigned ii;
|
unsigned ii;
|
if( (1==IsviStatus) || (4==IsviStatus ) )
|
if( (1==IsviStatus) || (4==IsviStatus ) )
|
{
|
{
|
for( ii=0; ii<SizeBlockOfWords; ii++ ) bufIsvi[ii]=ptr[ii];
|
for( ii=0; ii<SizeBlockOfWords; ii++ ) bufIsvi[ii]=ptr[ii];
|
IsviStatus++;
|
IsviStatus++;
|
}
|
}
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::WriteFlagSinc(int flg, int isNewParam)
|
void TF_TestStrm::WriteFlagSinc(int flg, int isNewParam)
|
{
|
{
|
int fs = -1;
|
int fs = -1;
|
int val[2];
|
int val[2];
|
|
|
char fname[256];
|
char fname[256];
|
sprintf( fname, "%s.flg", fnameIsvi );
|
sprintf( fname, "%s.flg", fnameIsvi );
|
|
|
while( fs==-1 )
|
while( fs==-1 )
|
{
|
{
|
fs = open( fname, O_RDWR|O_CREAT, 0666 );
|
fs = open( fname, O_RDWR|O_CREAT, 0666 );
|
Sleep( 10 );
|
Sleep( 10 );
|
}
|
}
|
val[0] = flg;
|
val[0] = flg;
|
val[1] = isNewParam;
|
val[1] = isNewParam;
|
int res = write( fs, val, 8 );
|
int res = write( fs, val, 8 );
|
if(res < 0) {
|
if(res < 0) {
|
BRDC_fprintf( stderr, "Error write flag sync\r\n" );
|
BRDC_fprintf( stderr, "Error write flag sync\r\n" );
|
}
|
}
|
close( fs );
|
close( fs );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
int TF_TestStrm::ReadFlagSinc(void)
|
int TF_TestStrm::ReadFlagSinc(void)
|
{
|
{
|
int fs = -1;
|
int fs = -1;
|
int flg;
|
int flg;
|
|
|
char fname[256];
|
char fname[256];
|
sprintf( fname, "%s.flg", fnameIsvi );
|
sprintf( fname, "%s.flg", fnameIsvi );
|
|
|
while( fs==-1 )
|
while( fs==-1 )
|
{
|
{
|
fs = open( fname, O_RDWR|O_CREAT, 0666 );
|
fs = open( fname, O_RDWR|O_CREAT, 0666 );
|
Sleep( 10 );
|
Sleep( 10 );
|
}
|
}
|
int res = read( fs, &flg, 4 );
|
int res = read( fs, &flg, 4 );
|
if(res < 0) {
|
if(res < 0) {
|
BRDC_fprintf( stderr, "Error read flag sync\r\n" );
|
BRDC_fprintf( stderr, "Error read flag sync\r\n" );
|
}
|
}
|
close( fs );
|
close( fs );
|
|
|
return flg;
|
return flg;
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::WriteDataFile( U32 *pBuf, U32 sizew )
|
void TF_TestStrm::WriteDataFile( U32 *pBuf, U32 sizew )
|
{
|
{
|
char fname[256];
|
char fname[256];
|
sprintf( fname, "%s.bin", fnameIsvi );
|
sprintf( fname, "%s.bin", fnameIsvi );
|
int fl = open(fname, O_WRONLY|O_CREAT|O_TRUNC, 0666);
|
int fl = open(fname, O_WRONLY|O_CREAT|O_TRUNC, 0666);
|
|
|
if( fl==-1 )
|
if( fl==-1 )
|
{
|
{
|
return;
|
return;
|
}
|
}
|
|
|
|
|
int res = write( fl, pBuf, sizew*4 );
|
int res = write( fl, pBuf, sizew*4 );
|
if(res < 0) {
|
if(res < 0) {
|
BRDC_fprintf( stderr, "Error write ISVI data\r\n" );
|
BRDC_fprintf( stderr, "Error write ISVI data\r\n" );
|
}
|
}
|
|
|
res = write( fl, IsviHeaderStr, IsviHeaderLen );
|
res = write( fl, IsviHeaderStr, IsviHeaderLen );
|
if(res < 0) {
|
if(res < 0) {
|
BRDC_fprintf( stderr, "Error write ISVI header\r\n" );
|
BRDC_fprintf( stderr, "Error write ISVI header\r\n" );
|
}
|
}
|
|
|
close( fl );
|
close( fl );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
U32 TF_TestStrm::ExecuteIsvi( void )
|
U32 TF_TestStrm::ExecuteIsvi( void )
|
{
|
{
|
for( ; ; )
|
for( ; ; )
|
{
|
{
|
if( Terminate )
|
if( Terminate )
|
{
|
{
|
break;
|
break;
|
}
|
}
|
|
|
int rr;
|
int rr;
|
switch( IsviStatus )
|
switch( IsviStatus )
|
{
|
{
|
case 2: // Подготовка суффикса
|
case 2: // Подготовка суффикса
|
{
|
{
|
IsviHeaderStr[0]=0;
|
IsviHeaderStr[0]=0;
|
/*
|
/*
|
switch( IsviHeaderMode )
|
switch( IsviHeaderMode )
|
{
|
{
|
case 1: SetFileHeaderDdc( SizeBlockOfWords, IsviHeaderStr ); break;
|
case 1: SetFileHeaderDdc( SizeBlockOfWords, IsviHeaderStr ); break;
|
case 2: SetFileHeaderAdc( SizeBlockOfWords, IsviHeaderStr ); break;
|
case 2: SetFileHeaderAdc( SizeBlockOfWords, IsviHeaderStr ); break;
|
}
|
}
|
*/
|
*/
|
IsviHeaderLen = 0; //strlen( IsviHeaderStr );
|
IsviHeaderLen = 0; //strlen( IsviHeaderStr );
|
WriteFlagSinc(0,0);
|
WriteFlagSinc(0,0);
|
WriteDataFile( bufIsvi, SizeBlockOfWords );
|
WriteDataFile( bufIsvi, SizeBlockOfWords );
|
WriteFlagSinc(0xffffffff,0xffffffff);
|
WriteFlagSinc(0xffffffff,0xffffffff);
|
|
|
IsviCnt++;
|
IsviCnt++;
|
IsviStatus=3;
|
IsviStatus=3;
|
}
|
}
|
break;
|
break;
|
|
|
case 3:
|
case 3:
|
{
|
{
|
rr=ReadFlagSinc();
|
rr=ReadFlagSinc();
|
if( 0==rr )
|
if( 0==rr )
|
IsviStatus=4;
|
IsviStatus=4;
|
|
|
}
|
}
|
break;
|
break;
|
|
|
case 4:
|
case 4:
|
// Ожидание получения данных
|
// Ожидание получения данных
|
Sleep( 100 );
|
Sleep( 100 );
|
break;
|
break;
|
|
|
case 5:
|
case 5:
|
{
|
{
|
WriteDataFile( bufIsvi, SizeBlockOfWords );
|
WriteDataFile( bufIsvi, SizeBlockOfWords );
|
WriteFlagSinc(0xffffffff,0 );
|
WriteFlagSinc(0xffffffff,0 );
|
IsviStatus=3;
|
IsviStatus=3;
|
IsviCnt++;
|
IsviCnt++;
|
}
|
}
|
break;
|
break;
|
|
|
}
|
}
|
|
|
Sleep( 100 );
|
Sleep( 100 );
|
}
|
}
|
IsviStatus=100;
|
IsviStatus=100;
|
return 0;
|
return 0;
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
#define TRD_CTRL 1
|
#define TRD_CTRL 1
|
#define REG_MUX_CTRL 0x0F
|
#define REG_MUX_CTRL 0x0F
|
#define REG_GEN_CNT1 0x1A
|
#define REG_GEN_CNT1 0x1A
|
#define REG_GEN_CNT2 0x1B
|
#define REG_GEN_CNT2 0x1B
|
#define REG_GEN_CTRL 0x1E
|
#define REG_GEN_CTRL 0x1E
|
#define REG_GEN_SIZE 0x1F
|
#define REG_GEN_SIZE 0x1F
|
#define TRD_DIO_IN 6
|
#define TRD_DIO_IN 6
|
#define TRD_CTRL 1
|
#define TRD_CTRL 1
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
//! Подготовка TEST_CTRL
|
//! Подготовка TEST_CTRL
|
void TF_TestStrm::PrepareTestCtrl( void )
|
void TF_TestStrm::PrepareTestCtrl( void )
|
{
|
{
|
BRDC_fprintf( stderr, "\nPrepare trd TEST_CTRL\n" );
|
BRDC_fprintf( stderr, "\nPrepare trd TEST_CTRL\n" );
|
|
|
BlockMode = DataType <<8;
|
BlockMode = DataType <<8;
|
BlockMode |= DataFix <<7;
|
BlockMode |= DataFix <<7;
|
|
|
if( !isFifoRdy )
|
if( !isFifoRdy )
|
BlockMode |=0x1000;
|
BlockMode |=0x1000;
|
|
|
U32 block_mode=BlockMode;
|
U32 block_mode=BlockMode;
|
|
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, 1 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, 1 );
|
|
|
//U32 mode0=pBrd->RegPeekInd( TRD_DIO_IN, 0 );
|
//U32 mode0=pBrd->RegPeekInd( TRD_DIO_IN, 0 );
|
// pBrd->RegPokeInd( TRD_DIO_IN, 0, 2 );
|
// pBrd->RegPokeInd( TRD_DIO_IN, 0, 2 );
|
|
|
Sleep( 1 );
|
Sleep( 1 );
|
|
|
//pBrd->RegPokeInd( TRD_DIO_IN, 0, 0 );
|
//pBrd->RegPokeInd( TRD_DIO_IN, 0, 0 );
|
|
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, 0 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, 0 );
|
|
|
pBrd->RegPokeInd( TRD_CTRL, REG_MUX_CTRL, 1 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_MUX_CTRL, 1 );
|
|
|
U32 val=SizeBlockOfBytes/4096;
|
U32 val=SizeBlockOfBytes/4096;
|
|
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_SIZE, val );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_SIZE, val );
|
|
|
if( block_mode & 0x80 )
|
if( block_mode & 0x80 )
|
{
|
{
|
BRDC_fprintf( stderr, "Use a short test sequence\r\n" );
|
BRDC_fprintf( stderr, "Use a short test sequence\r\n" );
|
} else
|
} else
|
{
|
{
|
BRDC_fprintf( stderr, "Use a full test sequence\r\n" );
|
BRDC_fprintf( stderr, "Use a full test sequence\r\n" );
|
}
|
}
|
|
|
|
|
if( Cnt1 || Cnt2 )
|
if( Cnt1 || Cnt2 )
|
{
|
{
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT1, Cnt1 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT1, Cnt1 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT2, Cnt2 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT2, Cnt2 );
|
float sp=1907.348632812 * (Cnt1-1)/(Cnt1+Cnt2-2);
|
float sp=1907.348632812 * (Cnt1-1)/(Cnt1+Cnt2-2);
|
BRDC_fprintf( stderr, "Set limit of speed: %6.1f Mbytes/s \r\n"
|
BRDC_fprintf( stderr, "Set limit of speed: %6.1f Mbytes/s \r\n"
|
"REG_CNT1=%d REGH_CNT2=%d \r\n", sp, Cnt1, Cnt2 );
|
"REG_CNT1=%d REGH_CNT2=%d \r\n", sp, Cnt1, Cnt2 );
|
if( block_mode&0x1000 )
|
if( block_mode&0x1000 )
|
{
|
{
|
BRDC_fprintf( stderr, "Set mode without wait of FIFO ready\r\n\r\n" );
|
BRDC_fprintf( stderr, "Set mode without wait of FIFO ready\r\n\r\n" );
|
} else
|
} else
|
{
|
{
|
BRDC_fprintf( stderr, "Set mode with wait of FIFO ready \r\n\r\n" );
|
BRDC_fprintf( stderr, "Set mode with wait of FIFO ready \r\n\r\n" );
|
}
|
}
|
} else
|
} else
|
{
|
{
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT1, 0 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT1, 0 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT2, 0 );
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CNT2, 0 );
|
BRDC_fprintf( stderr, "Set max speed of data transfer: 1907 Mbytes/s \r\n"
|
BRDC_fprintf( stderr, "Set max speed of data transfer: 1907 Mbytes/s \r\n"
|
"Set mode with wait of FIFO ready \r\n\r\n" );
|
"Set mode with wait of FIFO ready \r\n\r\n" );
|
}
|
}
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
//! Запуск TestCtrl
|
//! Запуск TestCtrl
|
void TF_TestStrm::StartTestCtrl( void )
|
void TF_TestStrm::StartTestCtrl( void )
|
{
|
{
|
|
|
U32 ctrl=0x20;
|
U32 ctrl=0x20;
|
ctrl|=BlockMode;
|
ctrl|=BlockMode;
|
if( Cnt1 || Cnt2 )
|
if( Cnt1 || Cnt2 )
|
ctrl|=0x40;
|
ctrl|=0x40;
|
|
|
if( !isFifoRdy )
|
if( !isFifoRdy )
|
ctrl |=0x1000;
|
ctrl |=0x1000;
|
// ctrl&= ~0x1000;
|
// ctrl&= ~0x1000;
|
//BRDC_fprintf( stderr, "TEST_CTRL: REG_GEN_CTRL = 0x%.4X \r\n", ctrl );
|
//BRDC_fprintf( stderr, "TEST_CTRL: REG_GEN_CTRL = 0x%.4X \r\n", ctrl );
|
|
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, ctrl ); // Запуск DIO_IN
|
pBrd->RegPokeInd( TRD_CTRL, REG_GEN_CTRL, ctrl ); // Запуск DIO_IN
|
|
|
//U32 mode0=pBrd->RegPeekInd( 6, 0 );
|
//U32 mode0=pBrd->RegPeekInd( 6, 0 );
|
//mode0 |=0x30;
|
//mode0 |=0x30;
|
//pBrd->RegPokeInd( 6, 0, mode0 ); // Запуск DIO_IN
|
//pBrd->RegPokeInd( 6, 0, mode0 ); // Запуск DIO_IN
|
|
|
|
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
//! Запись регистров из файла
|
//! Запись регистров из файла
|
void TF_TestStrm::PrepareAdmReg( char* fname )
|
void TF_TestStrm::PrepareAdmReg( char* fname )
|
{
|
{
|
BRDC_fprintf( stderr, "\nSetting up ADM registers from file: %s\r\n\n", fname );
|
BRDC_fprintf( stderr, "\nSetting up ADM registers from file: %s\r\n\n", fname );
|
|
|
FILE *in = fopen( fname, "rt" );
|
FILE *in = fopen( fname, "rt" );
|
if( in==NULL )
|
if( in==NULL )
|
{
|
{
|
throw( "Error file access" );
|
throw( "Error file access" );
|
}
|
}
|
|
|
char str[256];
|
char str[256];
|
U32 trd, reg, val;
|
U32 trd, reg, val;
|
int ret;
|
int ret;
|
for( ; ; )
|
for( ; ; )
|
{
|
{
|
if( fgets( str, 200, in )==NULL )
|
if( fgets( str, 200, in )==NULL )
|
break;
|
break;
|
|
|
if( str[0]==';' )
|
if( str[0]==';' )
|
continue;
|
continue;
|
|
|
ret=sscanf( str, "%i %i %i", &trd, ®, &val );
|
ret=sscanf( str, "%i %i %i", &trd, ®, &val );
|
if( 3==ret )
|
if( 3==ret )
|
{
|
{
|
BRDC_fprintf( stderr, " TRD: %d REG[0x%.2X]=0x%.4X \n", trd, reg, val );
|
BRDC_fprintf( stderr, " TRD: %d REG[0x%.2X]=0x%.4X \n", trd, reg, val );
|
pBrd->RegPokeInd( trd, reg, val );
|
pBrd->RegPokeInd( trd, reg, val );
|
}
|
}
|
|
|
}
|
}
|
BRDC_fprintf( stderr, "\n\n" );
|
BRDC_fprintf( stderr, "\n\n" );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::RestartAdc( void )
|
void TF_TestStrm::RestartAdc( void )
|
{
|
{
|
pBrd->RegPokeInd( rd0.trd, 0, 2 );
|
pBrd->RegPokeInd( rd0.trd, 0, 2 );
|
Sleep( 100 );
|
Sleep( 100 );
|
|
|
pBrd->StreamStop( rd0.Strm );
|
pBrd->StreamStop( rd0.Strm );
|
Sleep( 100 );
|
Sleep( 100 );
|
|
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2000 );
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2000 );
|
|
|
pBrd->StreamStart( rd0.Strm );
|
pBrd->StreamStart( rd0.Strm );
|
Sleep( 100 );
|
Sleep( 100 );
|
|
|
rd0.BlockRd=0;
|
rd0.BlockRd=0;
|
cntRestart++;
|
cntRestart++;
|
|
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2038 );
|
pBrd->RegPokeInd( rd0.trd, 0, 0x2038 );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::RestartDac( void )
|
void TF_TestStrm::RestartDac( void )
|
{
|
{
|
U32 trdDac = 5;
|
U32 trdDac = 5;
|
|
|
pBrd->RegPokeInd( trdDac, 0, 2 );
|
pBrd->RegPokeInd( trdDac, 0, 2 );
|
Sleep( 100 );
|
Sleep( 100 );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|
void TF_TestStrm::PrepareDac( void )
|
void TF_TestStrm::PrepareDac( void )
|
{
|
{
|
U32 trdDac = 5;
|
U32 trdDac = 5;
|
|
|
fprintf(stderr,"%s(): Start DAC\n", __FUNCTION__);
|
fprintf(stderr,"%s(): Start DAC\n", __FUNCTION__);
|
pBrd->RegPokeInd( trdDac, 0x0, 0x0010 );
|
pBrd->RegPokeInd( trdDac, 0x0, 0x0010 );
|
Sleep( 1 );
|
Sleep( 1 );
|
pBrd->RegPokeInd( trdDac, 0x0, 0x0030 );
|
pBrd->RegPokeInd( trdDac, 0x0, 0x0030 );
|
}
|
}
|
|
|
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
|
|