#ifndef _PEXIOCTL_H_
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#ifndef _PEXIOCTL_H_
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#define _PEXIOCTL_H_
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#define _PEXIOCTL_H_
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#define PEX_DEVICE_NAME "pexdevice"
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#define PEX_DEVICE_NAME "pexdevice"
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#include <linux/types.h>
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#include <linux/types.h>
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#define MAX_STRING_LEN 255
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#define MAX_STRING_LEN 255
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#define PEX_DEVICE_TYPE 'x'
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#define PEX_DEVICE_TYPE 'x'
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#define PEX_MAKE_IOCTL(t,c) _IO((t), (c))
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#define PEX_MAKE_IOCTL(t,c) _IO((t), (c))
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// ioctl requests command code
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// ioctl requests command code
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typedef enum _PEX_NUM_FUNC {
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typedef enum _PEX_NUM_FUNC {
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PEX_BOARD_INFO = 1,
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PEX_BOARD_INFO = 1,
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PEX_MEM_ALLOC = 2,
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PEX_MEM_ALLOC = 2,
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PEX_MEM_FREE = 3,
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PEX_MEM_FREE = 3,
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PEX_STUB_ALLOC = 4,
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PEX_STUB_ALLOC = 4,
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PEX_STUB_FREE = 5,
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PEX_STUB_FREE = 5,
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PEX_MEMIO_SET = 10,
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PEX_MEMIO_SET = 10,
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PEX_MEMIO_FREE = 11,
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PEX_MEMIO_FREE = 11,
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PEX_MEMIO_START = 12,
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PEX_MEMIO_START = 12,
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PEX_MEMIO_STOP = 13,
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PEX_MEMIO_STOP = 13,
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PEX_MEMIO_STATE = 14,
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PEX_MEMIO_STATE = 14,
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PEX_WAIT_BUFFER = 15,
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PEX_WAIT_BUFFER = 15,
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PEX_WAIT_BLOCK = 16,
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PEX_WAIT_BLOCK = 16,
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PEX_SET_SRC = 17,
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PEX_SET_SRC = 17,
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PEX_SET_DIR = 18,
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PEX_SET_DIR = 18,
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PEX_SET_DRQ = 19,
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PEX_SET_DRQ = 19,
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PEX_RESET_FIFO = 20,
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PEX_RESET_FIFO = 20,
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PEX_DONE = 21,
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PEX_DONE = 21,
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PEX_ADJUST = 22
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PEX_ADJUST = 22
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} PEX_NUM_FUNC;
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} PEX_NUM_FUNC;
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// ioctl requests code
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// ioctl requests code
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#define IOCTL_PEX_BOARD_INFO \
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#define IOCTL_PEX_BOARD_INFO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_BOARD_INFO)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_BOARD_INFO)
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#define IOCTL_PEX_MEM_ALLOC \
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#define IOCTL_PEX_MEM_ALLOC \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEM_ALLOC)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEM_ALLOC)
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#define IOCTL_PEX_MEM_FREE \
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#define IOCTL_PEX_MEM_FREE \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEM_FREE)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEM_FREE)
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#define IOCTL_PEX_STUB_ALLOC \
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#define IOCTL_PEX_STUB_ALLOC \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_STUB_ALLOC)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_STUB_ALLOC)
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#define IOCTL_PEX_STUB_FREE \
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#define IOCTL_PEX_STUB_FREE \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_STUB_FREE)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_STUB_FREE)
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#define IOCTL_AMB_SET_MEMIO \
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#define IOCTL_AMB_SET_MEMIO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_SET)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_SET)
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#define IOCTL_AMB_FREE_MEMIO \
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#define IOCTL_AMB_FREE_MEMIO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_FREE)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_FREE)
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#define IOCTL_AMB_START_MEMIO \
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#define IOCTL_AMB_START_MEMIO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_START)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_START)
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#define IOCTL_AMB_STOP_MEMIO \
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#define IOCTL_AMB_STOP_MEMIO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_STOP)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_STOP)
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#define IOCTL_AMB_STATE_MEMIO \
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#define IOCTL_AMB_STATE_MEMIO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_STATE)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_MEMIO_STATE)
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#define IOCTL_AMB_WAIT_DMA_BUFFER \
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#define IOCTL_AMB_WAIT_DMA_BUFFER \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_WAIT_BUFFER)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_WAIT_BUFFER)
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#define IOCTL_AMB_WAIT_DMA_BLOCK \
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#define IOCTL_AMB_WAIT_DMA_BLOCK \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_WAIT_BLOCK)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_WAIT_BLOCK)
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#define IOCTL_AMB_SET_SRC_MEM \
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#define IOCTL_AMB_SET_SRC_MEM \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_SRC)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_SRC)
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#define IOCTL_AMB_SET_DIR_MEM \
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#define IOCTL_AMB_SET_DIR_MEM \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_DIR)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_DIR)
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#define IOCTL_AMB_SET_DRQ_MEM \
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#define IOCTL_AMB_SET_DRQ_MEM \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_DRQ)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_SET_DRQ)
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#define IOCTL_AMB_RESET_FIFO \
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#define IOCTL_AMB_RESET_FIFO \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_RESET_FIFO)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_RESET_FIFO)
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#define IOCTL_AMB_DONE \
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#define IOCTL_AMB_DONE \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_DONE)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_DONE)
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#define IOCTL_AMB_ADJUST \
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#define IOCTL_AMB_ADJUST \
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_ADJUST)
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PEX_MAKE_IOCTL(PEX_DEVICE_TYPE, PEX_ADJUST)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// memory block structure
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// memory block structure
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struct memory_block {
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struct memory_block {
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size_t phys;
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size_t phys;
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void* virt;
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void* virt;
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size_t size;
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size_t size;
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// memory block structure
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// memory block structure
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struct memory_descriptor {
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struct memory_descriptor {
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size_t dma_channel;
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size_t dma_channel;
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size_t total_blocks;
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size_t total_blocks;
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struct memory_block *blocks;
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struct memory_block *blocks;
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// stub memory structure
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// stub memory structure
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struct stub_descriptor {
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struct stub_descriptor {
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size_t dma_channel;
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size_t dma_channel;
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struct memory_block stub;
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struct memory_block stub;
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Extended FIFO Id
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// Extended FIFO Id
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#define PE_EXT_FIFO_ID 0x0018
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#define PE_EXT_FIFO_ID 0x0018
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// type of memory
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// type of memory
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enum {
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enum {
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USER_MEMORY_TYPE = 0,
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USER_MEMORY_TYPE = 0,
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SYSTEM_MEMORY_TYPE = 1
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SYSTEM_MEMORY_TYPE = 1
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// state of DMA channel
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// state of DMA channel
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enum {
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enum {
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STATE_RUN = 1,
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STATE_RUN = 1,
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STATE_STOP = 2,
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STATE_STOP = 2,
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STATE_DESTROY = 3,
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STATE_DESTROY = 3,
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STATE_BREAK = 4
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STATE_BREAK = 4
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// direction of DMA transfer
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// direction of DMA transfer
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enum {
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enum {
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TRANSFER_DIR_TO_DEVICE = 0x0, // From Host to Device
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TRANSFER_DIR_TO_DEVICE = 0x0, // From Host to Device
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TRANSFER_DIR_FROM_DEVICE = 0x1 // From Device to Host
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TRANSFER_DIR_FROM_DEVICE = 0x1 // From Device to Host
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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enum {
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enum {
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BRDstrm_DIR_IN = 0x1, // To HOST
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BRDstrm_DIR_IN = 0x1, // To HOST
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BRDstrm_DIR_OUT = 0x2, // From HOST
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BRDstrm_DIR_OUT = 0x2, // From HOST
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BRDstrm_DIR_INOUT = 0x3 // Both Directions
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BRDstrm_DIR_INOUT = 0x3 // Both Directions
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};
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};
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// returns the number of pages spanned by the size.
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// returns the number of pages spanned by the size.
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#define PAGES_SPANNED(Size) (((Size) + (PAGE_SIZE - 1)) >> PAGE_SHIFT)
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#define PAGES_SPANNED(Size) (((Size) + (PAGE_SIZE - 1)) >> PAGE_SHIFT)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Shared Memory between kernel and user mode description
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typedef struct _SHARED_MEMORY_DESCRIPTION {
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void* SystemAddress; // INOUT - system memory address
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size_t LogicalAddress; // OUT - logical memory address
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size_t dummy; // OUT - logical memory address
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} SHARED_MEMORY_DESCRIPTION, *PSHARED_MEMORY_DESCRIPTION;
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//-----------------------------------------------------------------------------
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// Stub Structure
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// Stub Structure
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typedef struct _AMB_STUB {
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typedef struct _AMB_STUB {
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u32 lastBlock; // Number of Block which was filled last Time
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u32 lastBlock; // Number of Block which was filled last Time
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u32 totalCounter; // Total Counter of all filled Block
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u32 totalCounter; // Total Counter of all filled Block
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u32 offset; // First Unfilled Byte
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u32 offset; // First Unfilled Byte
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u32 state; // CBUF local state
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u32 state; // CBUF local state
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} AMB_STUB, *PAMB_STUB;
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} AMB_STUB, *PAMB_STUB;
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Descriptor Structure (PE_EXT_FIFO)
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// Descriptor Structure (PE_EXT_FIFO)
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// PCI Address (byte 0) = 0 always
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// PCI Address (byte 0) = 0 always
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// DMA Length (byte 0) = 0 always
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// DMA Length (byte 0) = 0 always
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typedef struct _DMA_CHAINING_DESCR_EXT {
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typedef struct _DMA_CHAINING_DESCR_EXT {
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u8 AddrByte1; // PCI Address (byte 1)
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u8 AddrByte1; // PCI Address (byte 1)
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u8 AddrByte2; // PCI Address (byte 2)
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u8 AddrByte2; // PCI Address (byte 2)
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u8 AddrByte3; // PCI Address (byte 3)
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u8 AddrByte3; // PCI Address (byte 3)
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u8 AddrByte4; // PCI Address (byte 4)
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u8 AddrByte4; // PCI Address (byte 4)
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struct {
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struct {
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u8 JumpNextDescr : 1; // Jump to Next Descriptor
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u8 JumpNextDescr : 1; // Jump to Next Descriptor
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u8 JumpNextBlock : 1; // Jump to Next Block
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u8 JumpNextBlock : 1; // Jump to Next Block
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u8 JumpDescr0 : 1; // Jump to Descriptor 0
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u8 JumpDescr0 : 1; // Jump to Descriptor 0
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u8 Res0 : 1; // reserved
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u8 Res0 : 1; // reserved
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u8 EndOfTrans : 1; // End of Transfer
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u8 EndOfTrans : 1; // End of Transfer
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u8 Res : 3; // reserved
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u8 Res : 3; // reserved
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} Cmd; // Descriptor Command
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} Cmd; // Descriptor Command
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u8 SizeByte1; // DMA Length (byte 1), bit 0: 0 - TRANSFER_DIR_TO_DEVICE, 1 - TRANSFER_DIR_FROM_DEVICE
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u8 SizeByte1; // DMA Length (byte 1), bit 0: 0 - TRANSFER_DIR_TO_DEVICE, 1 - TRANSFER_DIR_FROM_DEVICE
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u8 SizeByte2; // DMA Length (byte 2)
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u8 SizeByte2; // DMA Length (byte 2)
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u8 SizeByte3; // DMA Length (byte 3)
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u8 SizeByte3; // DMA Length (byte 3)
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} DMA_CHAINING_DESCR_EXT, *PDMA_CHAINING_DESCR_EXT;
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} DMA_CHAINING_DESCR_EXT, *PDMA_CHAINING_DESCR_EXT;
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Next descriptor block
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// Next descriptor block
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typedef struct _DMA_NEXT_BLOCK {
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typedef struct _DMA_NEXT_BLOCK {
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u32 NextBlkAddr;
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u32 NextBlkAddr;
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u16 Signature; // 0x4953
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u16 Signature; // 0x4953
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u16 Crc; // control code
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u16 Crc; // control code
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} DMA_NEXT_BLOCK, *PDMA_NEXT_BLOCK;
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} DMA_NEXT_BLOCK, *PDMA_NEXT_BLOCK;
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#define DSCR_BLOCK_SIZE 64
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#define DSCR_BLOCK_SIZE 64
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#endif
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#endif
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