VHD = mips_pack alu bus_mux control mem_ctrl mult pc_next reg_bank shifter \
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VHD = mips_pack alu bus_mux control mem_ctrl mult pc_next reg_bank shifter \
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mips_cpu
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mips_cpu
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all: work/tbench/_primary.dat
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all: work/tbench/_primary.dat
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work/mips_pack/_primary.dat: mips_pack.vhd
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work/mips_pack/_primary.dat: mips_pack.vhd
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vcom -check_synthesis mips_pack.vhd
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vcom -check_synthesis mips_pack.vhd
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work/alu/_primary.dat: mips_pack.vhd alu.vhd
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work/alu/_primary.dat: mips_pack.vhd alu.vhd
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vcom -check_synthesis alu.vhd
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vcom -check_synthesis alu.vhd
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work/bus_mux/_primary.dat: mips_pack.vhd bus_mux.vhd
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work/bus_mux/_primary.dat: mips_pack.vhd bus_mux.vhd
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vcom -check_synthesis bus_mux.vhd
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vcom -check_synthesis bus_mux.vhd
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work/control/_primary.dat: mips_pack.vhd control.vhd
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work/control/_primary.dat: mips_pack.vhd control.vhd
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vcom -check_synthesis control.vhd
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vcom -check_synthesis control.vhd
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work/mem_ctrl/_primary.dat: mips_pack.vhd mem_ctrl.vhd
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work/mem_ctrl/_primary.dat: mips_pack.vhd mem_ctrl.vhd
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vcom -check_synthesis mem_ctrl.vhd
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vcom -check_synthesis mem_ctrl.vhd
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work/mult/_primary.dat: mips_pack.vhd mult.vhd
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work/mult/_primary.dat: mips_pack.vhd mult.vhd
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vcom -check_synthesis mult.vhd
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vcom -check_synthesis mult.vhd
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work/pc_next/_primary.dat: mips_pack.vhd pc_next.vhd
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work/pc_next/_primary.dat: mips_pack.vhd pc_next.vhd
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vcom -check_synthesis pc_next.vhd
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vcom -check_synthesis pc_next.vhd
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work/reg_bank/_primary.dat: mips_pack.vhd reg_bank.vhd
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work/reg_bank/_primary.dat: mips_pack.vhd reg_bank.vhd
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vcom -check_synthesis reg_bank.vhd
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vcom -check_synthesis reg_bank.vhd
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work/shifter/_primary.dat: mips_pack.vhd shifter.vhd
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work/shifter/_primary.dat: mips_pack.vhd shifter.vhd
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vcom -check_synthesis shifter.vhd
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vcom -check_synthesis shifter.vhd
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work/mips_cpu/_primary.dat: mips_cpu.vhd \
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work/mips_cpu/_primary.dat: mips_cpu.vhd \
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work/mips_pack/_primary.dat \
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work/mips_pack/_primary.dat \
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work/alu/_primary.dat \
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work/alu/_primary.dat \
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work/bus_mux/_primary.dat \
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work/bus_mux/_primary.dat \
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work/control/_primary.dat \
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work/control/_primary.dat \
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work/mem_ctrl/_primary.dat \
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work/mem_ctrl/_primary.dat \
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work/mult/_primary.dat \
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work/mult/_primary.dat \
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work/pc_next/_primary.dat \
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work/pc_next/_primary.dat \
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work/reg_bank/_primary.dat \
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work/reg_bank/_primary.dat \
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work/shifter/_primary.dat
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work/shifter/_primary.dat
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vcom -check_synthesis mips_cpu.vhd
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vcom -check_synthesis mips_cpu.vhd
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work/ram/_primary.dat: ram.vhd
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work/ram/_primary.dat: ram.vhd
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vcom -explicit ram.vhd
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vcom -explicit ram.vhd
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work/tbench/_primary.dat: tbench.vhd \
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work/tbench/_primary.dat: tbench.vhd \
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work/mips_cpu/_primary.dat \
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work/mips_cpu/_primary.dat \
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work/ram/_primary.dat
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work/ram/_primary.dat
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vcom tbench.vhd
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vcom tbench.vhd
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