---------------------------------------------------------------------
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---------------------------------------------------------------------
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-- TITLE: Controller / Opcode Decoder
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-- TITLE: Controller / Opcode Decoder
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-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
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-- AUTHOR: Steve Rhoads (rhoadss@yahoo.com)
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-- DATE CREATED: 2/8/01
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-- DATE CREATED: 2/8/01
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-- FILENAME: control.vhd
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-- FILENAME: control.vhd
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-- PROJECT: Plasma CPU core
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-- PROJECT: Plasma CPU core
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-- COPYRIGHT: Software placed into the public domain by the author.
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-- COPYRIGHT: Software placed into the public domain by the author.
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-- Software 'as is' without warranty. Author liable for nothing.
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-- Software 'as is' without warranty. Author liable for nothing.
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-- NOTE: MIPS(tm) is a registered trademark of MIPS Technologies.
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-- NOTE: MIPS(tm) is a registered trademark of MIPS Technologies.
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-- MIPS Technologies does not endorse and is not associated with
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-- MIPS Technologies does not endorse and is not associated with
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-- this project.
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-- this project.
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-- DESCRIPTION:
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-- DESCRIPTION:
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-- Controls the CPU by decoding the opcode and generating control
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-- Controls the CPU by decoding the opcode and generating control
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-- signals to the rest of the CPU.
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-- signals to the rest of the CPU.
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-- This entity decodes the MIPS(tm) opcode into a
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-- This entity decodes the MIPS(tm) opcode into a
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-- Very-Long-Word-Instruction.
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-- Very-Long-Word-Instruction.
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-- The 32-bit opcode is converted to a
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-- The 32-bit opcode is converted to a
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-- 6+6+6+16+4+2+4+3+2+2+3+2+4 = 60 bit VLWI opcode.
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-- 6+6+6+16+4+2+4+3+2+2+3+2+4 = 60 bit VLWI opcode.
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-- Based on information found in:
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-- Based on information found in:
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-- "MIPS RISC Architecture" by Gerry Kane and Joe Heinrich
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-- "MIPS RISC Architecture" by Gerry Kane and Joe Heinrich
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-- and "The Designer's Guide to VHDL" by Peter J. Ashenden
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-- and "The Designer's Guide to VHDL" by Peter J. Ashenden
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---------------------------------------------------------------------
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---------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.mlite_pack.all;
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use work.mlite_pack.all;
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entity control is
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entity control is
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port(opcode : in std_logic_vector(31 downto 0);
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port(opcode : in std_logic_vector(31 downto 0);
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intr_signal : in std_logic;
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intr_signal : in std_logic;
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rs_index : out std_logic_vector(5 downto 0);
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rs_index : out std_logic_vector(5 downto 0);
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rt_index : out std_logic_vector(5 downto 0);
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rt_index : out std_logic_vector(5 downto 0);
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rd_index : out std_logic_vector(5 downto 0);
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rd_index : out std_logic_vector(5 downto 0);
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imm_out : out std_logic_vector(15 downto 0);
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imm_out : out std_logic_vector(15 downto 0);
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alu_func : out alu_function_type;
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alu_func : out alu_function_type;
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shift_func : out shift_function_type;
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shift_func : out shift_function_type;
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mult_func : out mult_function_type;
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mult_func : out mult_function_type;
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branch_func : out branch_function_type;
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branch_func : out branch_function_type;
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a_source_out : out a_source_type;
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a_source_out : out a_source_type;
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b_source_out : out b_source_type;
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b_source_out : out b_source_type;
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c_source_out : out c_source_type;
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c_source_out : out c_source_type;
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pc_source_out: out pc_source_type;
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pc_source_out: out pc_source_type;
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mem_source_out:out mem_source_type;
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mem_source_out:out mem_source_type;
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exception_out: out std_logic);
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exception_out: out std_logic);
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end; --entity control
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end; --entity control
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architecture logic of control is
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architecture logic of control is
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begin
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begin
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control_proc: process(opcode, intr_signal)
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control_proc: process(opcode, intr_signal)
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variable op, func : std_logic_vector(5 downto 0);
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variable op, func : std_logic_vector(5 downto 0);
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variable rs, rt, rd : std_logic_vector(5 downto 0);
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variable rs, rt, rd : std_logic_vector(5 downto 0);
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variable rtx : std_logic_vector(4 downto 0);
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variable rtx : std_logic_vector(4 downto 0);
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variable imm : std_logic_vector(15 downto 0);
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variable imm : std_logic_vector(15 downto 0);
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variable alu_function : alu_function_type;
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variable alu_function : alu_function_type;
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variable shift_function : shift_function_type;
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variable shift_function : shift_function_type;
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variable mult_function : mult_function_type;
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variable mult_function : mult_function_type;
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variable a_source : a_source_type;
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variable a_source : a_source_type;
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variable b_source : b_source_type;
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variable b_source : b_source_type;
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variable c_source : c_source_type;
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variable c_source : c_source_type;
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variable pc_source : pc_source_type;
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variable pc_source : pc_source_type;
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variable branch_function: branch_function_type;
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variable branch_function: branch_function_type;
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variable mem_source : mem_source_type;
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variable mem_source : mem_source_type;
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variable is_syscall : std_logic;
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variable is_syscall : std_logic;
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begin
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begin
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alu_function := ALU_NOTHING;
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alu_function := ALU_NOTHING;
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shift_function := SHIFT_NOTHING;
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shift_function := SHIFT_NOTHING;
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mult_function := MULT_NOTHING;
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mult_function := MULT_NOTHING;
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a_source := A_FROM_REG_SOURCE;
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a_source := A_FROM_REG_SOURCE;
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b_source := B_FROM_REG_TARGET;
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b_source := B_FROM_REG_TARGET;
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c_source := C_FROM_NULL;
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c_source := C_FROM_NULL;
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pc_source := FROM_INC4;
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pc_source := FROM_INC4;
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branch_function := BRANCH_EQ;
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branch_function := BRANCH_EQ;
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mem_source := MEM_FETCH;
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mem_source := MEM_FETCH;
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op := opcode(31 downto 26);
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op := opcode(31 downto 26);
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rs := '0' & opcode(25 downto 21);
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rs := '0' & opcode(25 downto 21);
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rt := '0' & opcode(20 downto 16);
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rt := '0' & opcode(20 downto 16);
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rtx := opcode(20 downto 16);
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rtx := opcode(20 downto 16);
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rd := '0' & opcode(15 downto 11);
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rd := '0' & opcode(15 downto 11);
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func := opcode(5 downto 0);
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func := opcode(5 downto 0);
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imm := opcode(15 downto 0);
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imm := opcode(15 downto 0);
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is_syscall := '0';
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is_syscall := '0';
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case op is
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case op is
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when "000000" => --SPECIAL
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when "000000" => --SPECIAL
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case func is
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case func is
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when "000000" => --SLL r[rd]=r[rt]<<re;
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when "000000" => --SLL r[rd]=r[rt]<<re;
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a_source := A_FROM_IMM10_6;
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a_source := A_FROM_IMM10_6;
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c_source := C_FROM_SHIFT;
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c_source := C_FROM_SHIFT;
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shift_function := SHIFT_LEFT_UNSIGNED;
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shift_function := SHIFT_LEFT_UNSIGNED;
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when "000010" => --SRL r[rd]=u[rt]>>re;
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when "000010" => --SRL r[rd]=u[rt]>>re;
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a_source := A_FROM_IMM10_6;
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a_source := A_FROM_IMM10_6;
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c_source := C_FROM_shift;
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c_source := C_FROM_shift;
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shift_function := SHIFT_RIGHT_UNSIGNED;
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shift_function := SHIFT_RIGHT_UNSIGNED;
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when "000011" => --SRA r[rd]=r[rt]>>re;
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when "000011" => --SRA r[rd]=r[rt]>>re;
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a_source := A_FROM_IMM10_6;
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a_source := A_FROM_IMM10_6;
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c_source := C_FROM_SHIFT;
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c_source := C_FROM_SHIFT;
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shift_function := SHIFT_RIGHT_SIGNED;
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shift_function := SHIFT_RIGHT_SIGNED;
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when "000100" => --SLLV r[rd]=r[rt]<<r[rs];
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when "000100" => --SLLV r[rd]=r[rt]<<r[rs];
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c_source := C_FROM_SHIFT;
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c_source := C_FROM_SHIFT;
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shift_function := SHIFT_LEFT_UNSIGNED;
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shift_function := SHIFT_LEFT_UNSIGNED;
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when "000110" => --SRLV r[rd]=u[rt]>>r[rs];
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when "000110" => --SRLV r[rd]=u[rt]>>r[rs];
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c_source := C_FROM_SHIFT;
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c_source := C_FROM_SHIFT;
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shift_function := SHIFT_RIGHT_UNSIGNED;
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shift_function := SHIFT_RIGHT_UNSIGNED;
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when "000111" => --SRAV r[rd]=r[rt]>>r[rs];
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when "000111" => --SRAV r[rd]=r[rt]>>r[rs];
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c_source := C_FROM_SHIFT;
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c_source := C_FROM_SHIFT;
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shift_function := SHIFT_RIGHT_SIGNED;
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shift_function := SHIFT_RIGHT_SIGNED;
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when "001000" => --JR s->pc_next=r[rs];
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when "001000" => --JR s->pc_next=r[rs];
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pc_source := FROM_BRANCH;
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pc_source := FROM_BRANCH;
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alu_function := ALU_ADD;
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alu_function := ALU_ADD;
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branch_function := BRANCH_YES;
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branch_function := BRANCH_YES;
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when "001001" => --JALR r[rd]=s->pc_next; s->pc_next=r[rs];
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when "001001" => --JALR r[rd]=s->pc_next; s->pc_next=r[rs];
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c_source := C_FROM_PC_PLUS4;
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c_source := C_FROM_PC_PLUS4;
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pc_source := FROM_BRANCH;
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pc_source := FROM_BRANCH;
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alu_function := ALU_ADD;
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alu_function := ALU_ADD;
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branch_function := BRANCH_YES;
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branch_function := BRANCH_YES;
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--when "001010" => --MOVZ if(!r[rt]) r[rd]=r[rs]; /*IV*/
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--when "001010" => --MOVZ if(!r[rt]) r[rd]=r[rs]; /*IV*/
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--when "001011" => --MOVN if(r[rt]) r[rd]=r[rs]; /*IV*/
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--when "001011" => --MOVN if(r[rt]) r[rd]=r[rs]; /*IV*/
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when "001100" => --SYSCALL
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when "001100" => --SYSCALL
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is_syscall := '1';
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is_syscall := '1';
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when "001101" => --BREAK s->wakeup=1;
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when "001101" => --BREAK s->wakeup=1;
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is_syscall := '1';
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is_syscall := '1';
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--when "001111" => --SYNC s->wakeup=1;
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--when "001111" => --SYNC s->wakeup=1;
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when "010000" => --MFHI r[rd]=s->hi;
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when "010000" => --MFHI r[rd]=s->hi;
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c_source := C_FROM_MULT;
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c_source := C_FROM_MULT;
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mult_function := MULT_READ_HI;
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mult_function := MULT_READ_HI;
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when "010001" => --FTHI s->hi=r[rs];
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when "010001" => --FTHI s->hi=r[rs];
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mult_function := MULT_WRITE_HI;
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mult_function := MULT_WRITE_HI;
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when "010010" => --MFLO r[rd]=s->lo;
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when "010010" => --MFLO r[rd]=s->lo;
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c_source := C_FROM_MULT;
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c_source := C_FROM_MULT;
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mult_function := MULT_READ_LO;
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mult_function := MULT_READ_LO;
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when "010011" => --MTLO s->lo=r[rs];
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when "010011" => --MTLO s->lo=r[rs];
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mult_function := MULT_WRITE_LO;
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mult_function := MULT_WRITE_LO;
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when "011000" => --MULT s->lo=r[rs]*r[rt]; s->hi=0;
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when "011000" => --MULT s->lo=r[rs]*r[rt]; s->hi=0;
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mult_function := MULT_SIGNED_MULT;
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mult_function := MULT_SIGNED_MULT;
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when "011001" => --MULTU s->lo=r[rs]*r[rt]; s->hi=0;
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when "011001" => --MULTU s->lo=r[rs]*r[rt]; s->hi=0;
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mult_function := MULT_MULT;
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mult_function := MULT_MULT;
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when "011010" => --DIV s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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when "011010" => --DIV s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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mult_function := MULT_SIGNED_DIVIDE;
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mult_function := MULT_SIGNED_DIVIDE;
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when "011011" => --DIVU s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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when "011011" => --DIVU s->lo=r[rs]/r[rt]; s->hi=r[rs]%r[rt];
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mult_function := MULT_DIVIDE;
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mult_function := MULT_DIVIDE;
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when "100000" => --ADD r[rd]=r[rs]+r[rt];
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when "100000" => --ADD r[rd]=r[rs]+r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_ADD;
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alu_function := ALU_ADD;
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when "100001" => --ADDU r[rd]=r[rs]+r[rt];
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when "100001" => --ADDU r[rd]=r[rs]+r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_ADD;
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alu_function := ALU_ADD;
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when "100010" => --SUB r[rd]=r[rs]-r[rt];
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when "100010" => --SUB r[rd]=r[rs]-r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_SUBTRACT;
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alu_function := ALU_SUBTRACT;
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when "100011" => --SUBU r[rd]=r[rs]-r[rt];
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when "100011" => --SUBU r[rd]=r[rs]-r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_SUBTRACT;
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alu_function := ALU_SUBTRACT;
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|
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when "100100" => --AND r[rd]=r[rs]&r[rt];
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when "100100" => --AND r[rd]=r[rs]&r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_AND;
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alu_function := ALU_AND;
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|
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when "100101" => --OR r[rd]=r[rs]|r[rt];
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when "100101" => --OR r[rd]=r[rs]|r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_OR;
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alu_function := ALU_OR;
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when "100110" => --XOR r[rd]=r[rs]^r[rt];
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when "100110" => --XOR r[rd]=r[rs]^r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_XOR;
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alu_function := ALU_XOR;
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|
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when "100111" => --NOR r[rd]=~(r[rs]|r[rt]);
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when "100111" => --NOR r[rd]=~(r[rs]|r[rt]);
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_NOR;
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alu_function := ALU_NOR;
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|
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when "101010" => --SLT r[rd]=r[rs]<r[rt];
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when "101010" => --SLT r[rd]=r[rs]<r[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_LESS_THAN_SIGNED;
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alu_function := ALU_LESS_THAN_SIGNED;
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|
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when "101011" => --SLTU r[rd]=u[rs]<u[rt];
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when "101011" => --SLTU r[rd]=u[rs]<u[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_LESS_THAN;
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alu_function := ALU_LESS_THAN;
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|
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when "101101" => --DADDU r[rd]=r[rs]+u[rt];
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when "101101" => --DADDU r[rd]=r[rs]+u[rt];
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c_source := C_FROM_ALU;
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c_source := C_FROM_ALU;
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alu_function := ALU_ADD;
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alu_function := ALU_ADD;
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|
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--when "110001" => --TGEU
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--when "110001" => --TGEU
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--when "110010" => --TLT
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--when "110010" => --TLT
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--when "110011" => --TLTU
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--when "110011" => --TLTU
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--when "110100" => --TEQ
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--when "110100" => --TEQ
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--when "110110" => --TNE
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--when "110110" => --TNE
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when others =>
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when others =>
|
end case;
|
end case;
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|
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when "000001" => --REGIMM
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when "000001" => --REGIMM
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rt := "000000";
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rt := "000000";
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rd := "011111";
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rd := "011111";
|
a_source := A_FROM_PC;
|
a_source := A_FROM_PC;
|
b_source := B_FROM_IMMX4;
|
b_source := B_FROM_IMMX4;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
pc_source := FROM_BRANCH;
|
pc_source := FROM_BRANCH;
|
branch_function := BRANCH_GTZ;
|
branch_function := BRANCH_GTZ;
|
--if(test) pc=pc+imm*4
|
--if(test) pc=pc+imm*4
|
|
|
case rtx is
|
case rtx is
|
when "10000" => --BLTZAL r[31]=s->pc_next; branch=r[rs]<0;
|
when "10000" => --BLTZAL r[31]=s->pc_next; branch=r[rs]<0;
|
c_source := C_FROM_PC_PLUS4;
|
c_source := C_FROM_PC_PLUS4;
|
branch_function := BRANCH_LTZ;
|
branch_function := BRANCH_LTZ;
|
|
|
when "00000" => --BLTZ branch=r[rs]<0;
|
when "00000" => --BLTZ branch=r[rs]<0;
|
branch_function := BRANCH_LTZ;
|
branch_function := BRANCH_LTZ;
|
|
|
when "10001" => --BGEZAL r[31]=s->pc_next; branch=r[rs]>=0;
|
when "10001" => --BGEZAL r[31]=s->pc_next; branch=r[rs]>=0;
|
c_source := C_FROM_PC_PLUS4;
|
c_source := C_FROM_PC_PLUS4;
|
branch_function := BRANCH_GEZ;
|
branch_function := BRANCH_GEZ;
|
|
|
when "00001" => --BGEZ branch=r[rs]>=0;
|
when "00001" => --BGEZ branch=r[rs]>=0;
|
branch_function := BRANCH_GEZ;
|
branch_function := BRANCH_GEZ;
|
|
|
--when "10010" => --BLTZALL r[31]=s->pc_next; lbranch=r[rs]<0;
|
--when "10010" => --BLTZALL r[31]=s->pc_next; lbranch=r[rs]<0;
|
--when "00010" => --BLTZL lbranch=r[rs]<0;
|
--when "00010" => --BLTZL lbranch=r[rs]<0;
|
--when "10011" => --BGEZALL r[31]=s->pc_next; lbranch=r[rs]>=0;
|
--when "10011" => --BGEZALL r[31]=s->pc_next; lbranch=r[rs]>=0;
|
--when "00011" => --BGEZL lbranch=r[rs]>=0;
|
--when "00011" => --BGEZL lbranch=r[rs]>=0;
|
|
|
when others =>
|
when others =>
|
end case;
|
end case;
|
|
|
when "000011" => --JAL r[31]=s->pc_next; s->pc_next=(s->pc&0xf0000000)|target;
|
when "000011" => --JAL r[31]=s->pc_next; s->pc_next=(s->pc&0xf0000000)|target;
|
c_source := C_FROM_PC_PLUS4;
|
c_source := C_FROM_PC_PLUS4;
|
rd := "011111";
|
rd := "011111";
|
pc_source := FROM_OPCODE25_0;
|
pc_source := FROM_OPCODE25_0;
|
|
|
when "000010" => --J s->pc_next=(s->pc&0xf0000000)|target;
|
when "000010" => --J s->pc_next=(s->pc&0xf0000000)|target;
|
pc_source := FROM_OPCODE25_0;
|
pc_source := FROM_OPCODE25_0;
|
|
|
when "000100" => --BEQ branch=r[rs]==r[rt];
|
when "000100" => --BEQ branch=r[rs]==r[rt];
|
a_source := A_FROM_PC;
|
a_source := A_FROM_PC;
|
b_source := B_FROM_IMMX4;
|
b_source := B_FROM_IMMX4;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
pc_source := FROM_BRANCH;
|
pc_source := FROM_BRANCH;
|
branch_function := BRANCH_EQ;
|
branch_function := BRANCH_EQ;
|
|
|
when "000101" => --BNE branch=r[rs]!=r[rt];
|
when "000101" => --BNE branch=r[rs]!=r[rt];
|
a_source := A_FROM_PC;
|
a_source := A_FROM_PC;
|
b_source := B_FROM_IMMX4;
|
b_source := B_FROM_IMMX4;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
pc_source := FROM_BRANCH;
|
pc_source := FROM_BRANCH;
|
branch_function := BRANCH_NE;
|
branch_function := BRANCH_NE;
|
|
|
when "000110" => --BLEZ branch=r[rs]<=0;
|
when "000110" => --BLEZ branch=r[rs]<=0;
|
a_source := A_FROM_PC;
|
a_source := A_FROM_PC;
|
b_source := b_FROM_IMMX4;
|
b_source := b_FROM_IMMX4;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
pc_source := FROM_BRANCH;
|
pc_source := FROM_BRANCH;
|
branch_function := BRANCH_LEZ;
|
branch_function := BRANCH_LEZ;
|
|
|
when "000111" => --BGTZ branch=r[rs]>0;
|
when "000111" => --BGTZ branch=r[rs]>0;
|
a_source := A_FROM_PC;
|
a_source := A_FROM_PC;
|
b_source := B_FROM_IMMX4;
|
b_source := B_FROM_IMMX4;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
pc_source := FROM_BRANCH;
|
pc_source := FROM_BRANCH;
|
branch_function := BRANCH_GTZ;
|
branch_function := BRANCH_GTZ;
|
|
|
when "001000" => --ADDI r[rt]=r[rs]+(short)imm;
|
when "001000" => --ADDI r[rt]=r[rs]+(short)imm;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
|
|
when "001001" => --ADDIU u[rt]=u[rs]+(short)imm;
|
when "001001" => --ADDIU u[rt]=u[rs]+(short)imm;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
|
|
when "001010" => --SLTI r[rt]=r[rs]<(short)imm;
|
when "001010" => --SLTI r[rt]=r[rs]<(short)imm;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_LESS_THAN_SIGNED;
|
alu_function := ALU_LESS_THAN_SIGNED;
|
|
|
when "001011" => --SLTIU u[rt]=u[rs]<(unsigned long)(short)imm;
|
when "001011" => --SLTIU u[rt]=u[rs]<(unsigned long)(short)imm;
|
b_source := B_FROM_IMM;
|
b_source := B_FROM_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_LESS_THAN;
|
alu_function := ALU_LESS_THAN;
|
|
|
when "001100" => --ANDI r[rt]=r[rs]&imm;
|
when "001100" => --ANDI r[rt]=r[rs]&imm;
|
b_source := B_FROM_IMM;
|
b_source := B_FROM_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_AND;
|
alu_function := ALU_AND;
|
|
|
when "001101" => --ORI r[rt]=r[rs]|imm;
|
when "001101" => --ORI r[rt]=r[rs]|imm;
|
b_source := B_FROM_IMM;
|
b_source := B_FROM_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_OR;
|
alu_function := ALU_OR;
|
|
|
when "001110" => --XORI r[rt]=r[rs]^imm;
|
when "001110" => --XORI r[rt]=r[rs]^imm;
|
b_source := B_FROM_IMM;
|
b_source := B_FROM_IMM;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
rd := rt;
|
rd := rt;
|
alu_function := ALU_XOR;
|
alu_function := ALU_XOR;
|
|
|
when "001111" => --LUI r[rt]=(imm<<16);
|
when "001111" => --LUI r[rt]=(imm<<16);
|
c_source := C_FROM_IMM_SHIFT16;
|
c_source := C_FROM_IMM_SHIFT16;
|
rd := rt;
|
rd := rt;
|
|
|
when "010000" => --COP0
|
when "010000" => --COP0
|
alu_function := ALU_OR;
|
alu_function := ALU_OR;
|
c_source := C_FROM_ALU;
|
c_source := C_FROM_ALU;
|
if opcode(23) = '0' then --move from CP0
|
if opcode(23) = '0' then --move from CP0
|
rs := '1' & opcode(15 downto 11);
|
rs := '1' & opcode(15 downto 11);
|
rt := "000000";
|
rt := "000000";
|
rd := '0' & opcode(20 downto 16);
|
rd := '0' & opcode(20 downto 16);
|
else --move to CP0
|
else --move to CP0
|
rs := "000000";
|
rs := "000000";
|
rd(5) := '1';
|
rd(5) := '1';
|
pc_source := FROM_BRANCH; --delay possible interrupt
|
pc_source := FROM_BRANCH; --delay possible interrupt
|
branch_function := BRANCH_NO;
|
branch_function := BRANCH_NO;
|
end if;
|
end if;
|
|
|
--when "010001" => --COP1
|
--when "010001" => --COP1
|
--when "010010" => --COP2
|
--when "010010" => --COP2
|
--when "010011" => --COP3
|
--when "010011" => --COP3
|
--when "010100" => --BEQL lbranch=r[rs]==r[rt];
|
--when "010100" => --BEQL lbranch=r[rs]==r[rt];
|
--when "010101" => --BNEL lbranch=r[rs]!=r[rt];
|
--when "010101" => --BNEL lbranch=r[rs]!=r[rt];
|
--when "010110" => --BLEZL lbranch=r[rs]<=0;
|
--when "010110" => --BLEZL lbranch=r[rs]<=0;
|
--when "010111" => --BGTZL lbranch=r[rs]>0;
|
--when "010111" => --BGTZL lbranch=r[rs]>0;
|
|
|
when "100000" => --LB r[rt]=*(signed char*)ptr;
|
when "100000" => --LB r[rt]=*(signed char*)ptr;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ8S; --address=(short)imm+r[rs];
|
mem_source := MEM_READ8S; --address=(short)imm+r[rs];
|
|
|
when "100001" => --LH r[rt]=*(signed short*)ptr;
|
when "100001" => --LH r[rt]=*(signed short*)ptr;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ16S; --address=(short)imm+r[rs];
|
mem_source := MEM_READ16S; --address=(short)imm+r[rs];
|
|
|
when "100010" => --LWL //Not Implemented
|
when "100010" => --LWL //Not Implemented
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ32;
|
mem_source := MEM_READ32;
|
|
|
when "100011" => --LW r[rt]=*(long*)ptr;
|
when "100011" => --LW r[rt]=*(long*)ptr;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ32;
|
mem_source := MEM_READ32;
|
|
|
when "100100" => --LBU r[rt]=*(unsigned char*)ptr;
|
when "100100" => --LBU r[rt]=*(unsigned char*)ptr;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ8; --address=(short)imm+r[rs];
|
mem_source := MEM_READ8; --address=(short)imm+r[rs];
|
|
|
when "100101" => --LHU r[rt]=*(unsigned short*)ptr;
|
when "100101" => --LHU r[rt]=*(unsigned short*)ptr;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
rd := rt;
|
rd := rt;
|
c_source := C_FROM_MEMORY;
|
c_source := C_FROM_MEMORY;
|
mem_source := MEM_READ16; --address=(short)imm+r[rs];
|
mem_source := MEM_READ16; --address=(short)imm+r[rs];
|
|
|
--when "100110" => --LWR //Not Implemented
|
--when "100110" => --LWR //Not Implemented
|
|
|
when "101000" => --SB *(char*)ptr=(char)r[rt];
|
when "101000" => --SB *(char*)ptr=(char)r[rt];
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
mem_source := MEM_WRITE8; --address=(short)imm+r[rs];
|
mem_source := MEM_WRITE8; --address=(short)imm+r[rs];
|
|
|
when "101001" => --SH *(short*)ptr=(short)r[rt];
|
when "101001" => --SH *(short*)ptr=(short)r[rt];
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
mem_source := MEM_WRITE16;
|
mem_source := MEM_WRITE16;
|
|
|
when "101010" => --SWL //Not Implemented
|
when "101010" => --SWL //Not Implemented
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
mem_source := MEM_WRITE32; --address=(short)imm+r[rs];
|
mem_source := MEM_WRITE32; --address=(short)imm+r[rs];
|
|
|
when "101011" => --SW *(long*)ptr=r[rt];
|
when "101011" => --SW *(long*)ptr=r[rt];
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_SIGNED_IMM;
|
b_source := B_FROM_SIGNED_IMM;
|
alu_function := ALU_ADD;
|
alu_function := ALU_ADD;
|
mem_source := MEM_WRITE32; --address=(short)imm+r[rs];
|
mem_source := MEM_WRITE32; --address=(short)imm+r[rs];
|
|
|
--when "101110" => --SWR //Not Implemented
|
--when "101110" => --SWR //Not Implemented
|
--when "101111" => --CACHE
|
--when "101111" => --CACHE
|
--when "110000" => --LL r[rt]=*(long*)ptr;
|
--when "110000" => --LL r[rt]=*(long*)ptr;
|
--when "110001" => --LWC1
|
--when "110001" => --LWC1
|
--when "110010" => --LWC2
|
--when "110010" => --LWC2
|
--when "110011" => --LWC3
|
--when "110011" => --LWC3
|
--when "110101" => --LDC1
|
--when "110101" => --LDC1
|
--when "110110" => --LDC2
|
--when "110110" => --LDC2
|
--when "110111" => --LDC3
|
--when "110111" => --LDC3
|
--when "111000" => --SC *(long*)ptr=r[rt]; r[rt]=1;
|
--when "111000" => --SC *(long*)ptr=r[rt]; r[rt]=1;
|
--when "111001" => --SWC1
|
--when "111001" => --SWC1
|
--when "111010" => --SWC2
|
--when "111010" => --SWC2
|
--when "111011" => --SWC3
|
--when "111011" => --SWC3
|
--when "111101" => --SDC1
|
--when "111101" => --SDC1
|
--when "111110" => --SDC2
|
--when "111110" => --SDC2
|
--when "111111" => --SDC3
|
--when "111111" => --SDC3
|
when others =>
|
when others =>
|
end case;
|
end case;
|
|
|
if c_source = C_FROM_NULL then
|
if c_source = C_FROM_NULL then
|
rd := "000000";
|
rd := "000000";
|
end if;
|
end if;
|
|
|
if intr_signal = '1' or is_syscall = '1' then
|
if intr_signal = '1' or is_syscall = '1' then
|
rs := "111111"; --interrupt vector
|
rs := "111111"; --interrupt vector
|
rt := "000000";
|
rt := "000000";
|
rd := "101110"; --save PC in EPC
|
rd := "101110"; --save PC in EPC
|
alu_function := ALU_OR;
|
alu_function := ALU_OR;
|
shift_function := SHIFT_NOTHING;
|
shift_function := SHIFT_NOTHING;
|
mult_function := MULT_NOTHING;
|
mult_function := MULT_NOTHING;
|
branch_function := BRANCH_YES;
|
branch_function := BRANCH_YES;
|
a_source := A_FROM_REG_SOURCE;
|
a_source := A_FROM_REG_SOURCE;
|
b_source := B_FROM_REG_TARGET;
|
b_source := B_FROM_REG_TARGET;
|
c_source := C_FROM_PC;
|
c_source := C_FROM_PC;
|
pc_source := FROM_LBRANCH;
|
pc_source := FROM_LBRANCH;
|
mem_source := MEM_FETCH;
|
mem_source := MEM_FETCH;
|
exception_out <= '1';
|
exception_out <= '1';
|
else
|
else
|
exception_out <= '0';
|
exception_out <= '0';
|
end if;
|
end if;
|
|
|
rs_index <= rs;
|
rs_index <= rs;
|
rt_index <= rt;
|
rt_index <= rt;
|
rd_index <= rd;
|
rd_index <= rd;
|
imm_out <= imm;
|
imm_out <= imm;
|
alu_func <= alu_function;
|
alu_func <= alu_function;
|
shift_func <= shift_function;
|
shift_func <= shift_function;
|
mult_func <= mult_function;
|
mult_func <= mult_function;
|
branch_func <= branch_function;
|
branch_func <= branch_function;
|
a_source_out <= a_source;
|
a_source_out <= a_source;
|
b_source_out <= b_source;
|
b_source_out <= b_source;
|
c_source_out <= c_source;
|
c_source_out <= c_source;
|
pc_source_out <= pc_source;
|
pc_source_out <= pc_source;
|
mem_source_out <= mem_source;
|
mem_source_out <= mem_source;
|
|
|
end process;
|
end process;
|
|
|
end; --logic
|
end; --logic
|
|
|
