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https://opencores.org/ocsvn/plasma/plasma/trunk
[/] [plasma/] [trunk/] [vhdl/] [plasma_S3E.npl] - Diff between revs 350 and 352
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| Rev 350 |
Rev 352 |
JDF G
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JDF G
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// Created by Project Navigator ver 1.0
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// Created by Project Navigator ver 1.0
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PROJECT jop
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PROJECT jop
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DESIGN jop
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DESIGN jop
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DEVFAM spartan3e
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DEVFAM spartan3e
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DEVFAMTIME 0
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DEVFAMTIME 0
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DEVICE xc3s500e
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DEVICE xc3s500e
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DEVICETIME 0
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DEVICETIME 0
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DEVPKG fg320
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DEVPKG fg320
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DEVPKGTIME 0
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DEVPKGTIME 0
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DEVSPEED -4
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DEVSPEED -4
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DEVTOPLEVELMODULETYPE HDL
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DEVTOPLEVELMODULETYPE HDL
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TOPLEVELMODULETYPETIME 0
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TOPLEVELMODULETYPETIME 0
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DEVSYNTHESISTOOL XST (VHDL/Verilog)
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DEVSYNTHESISTOOL XST (VHDL/Verilog)
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SYNTHESISTOOLTIME 0
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SYNTHESISTOOLTIME 0
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DEVSIMULATOR Modelsim
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DEVSIMULATOR Modelsim
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SIMULATORTIME 0
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SIMULATORTIME 0
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DEVGENERATEDSIMULATIONMODEL VHDL
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DEVGENERATEDSIMULATIONMODEL VHDL
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GENERATEDSIMULATIONMODELTIME 0
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GENERATEDSIMULATIONMODELTIME 0
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SOURCE mlite_pack.vhd
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SOURCE mlite_pack.vhd
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SOURCE plasma_3e.vhd
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SOURCE plasma_3e.vhd
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SOURCE ddr_ctrl.vhd
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SOURCE ddr_ctrl.vhd
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SOURCE plasma.vhd
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SOURCE plasma.vhd
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SOURCE ram_image.vhd
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SOURCE ram_image.vhd
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SOURCE uart.vhd
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SOURCE uart.vhd
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SOURCE eth_dma.vhd
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SOURCE eth_dma.vhd
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SOURCE mlite_cpu.vhd
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SOURCE mlite_cpu.vhd
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SOURCE alu.vhd
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SOURCE alu.vhd
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SOURCE bus_mux.vhd
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SOURCE bus_mux.vhd
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SOURCE control.vhd
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SOURCE control.vhd
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SOURCE mem_ctrl.vhd
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SOURCE mem_ctrl.vhd
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SOURCE mult.vhd
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SOURCE mult.vhd
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SOURCE pipeline.vhd
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SOURCE pipeline.vhd
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SOURCE pc_next.vhd
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SOURCE pc_next.vhd
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SOURCE reg_bank.vhd
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SOURCE reg_bank.vhd
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SOURCE shifter.vhd
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SOURCE shifter.vhd
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SOURCE cache.vhd
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SOURCE cache.vhd
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DEPASSOC spartan3e spartan3e.ucf
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DEPASSOC spartan3e spartan3e.ucf
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