URL https://opencores.org/ocsvn/potato/potato/trunk

Subversion Repositories potato

[/] [potato/] [trunk/] [tests/] [sw-jal.S] - Diff between revs 45 and 58

Rev 45	Rev 58
`# The Potato Processor - A simple RISC-V based processor for FPGAs`	`# The Potato Processor - A simple RISC-V based processor for FPGAs`
`# (c) Kristian Klomsten Skordal 2014 - 2015`	`# (c) Kristian Klomsten Skordal 2014 - 2015`
`# Report bugs and issues on`	`# Report bugs and issues on`

`#include "riscv_test.h"`	`#include "riscv_test.h"`
`#include "test_macros.h"`	`#include "test_macros.h"`

`.section .text`	`.section .text`
`RVTEST_RV32U`	`RVTEST_RV32M`
`RVTEST_CODE_BEGIN`	`RVTEST_CODE_BEGIN`

`test_1:`	`test_1:`
`li TESTNUM, 1`	`li TESTNUM, 1`

`la ra, test_failed`	`la ra, test_failed`
`la sp, temp`	`la sp, temp`
`sw ra, 0(sp)`	`sw ra, 0(sp)`
`jal ra, test_cmp`	`jal ra, test_cmp`

`1:`	`1:`
`j fail`	`j fail`
`j pass`	`j pass`

`test_cmp:`	`test_cmp:`
`la t0, 1b`	`la t0, 1b`
`bne ra, t0, fail`	`bne ra, t0, fail`
`addi ra, ra, 4`	`addi ra, ra, 4`
`ret`	`ret`

`TEST_PASSFAIL`	`TEST_PASSFAIL`
`RVTEST_CODE_END`	`RVTEST_CODE_END`

`test_failed:`	`test_failed:`
`RVTEST_FAIL`	`RVTEST_FAIL`

`# Allocate a 32-bit word to store some data into`
`.section .data`	`.section .data`
	`RVTEST_DATA_BEGIN`
	`TEST_DATA`

	`# Allocate a 32-bit word to store some data into`
	`#.section .data`
`temp:`	`temp:`
`.word 0x00000000`	`.word 0x00000000`

	`RVTEST_DATA_END`