`include "Raptor64_opcodes.v"
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`include "Raptor64_opcodes.v"
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`timescale 1ns / 1ps
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`timescale 1ns / 1ps
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//=============================================================================
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//=============================================================================
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// __
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// __
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// \\__/ o\ (C) 2012 Robert Finch
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// \\__/ o\ (C) 2012 Robert Finch
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// \ __ / All rights reserved.
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// \ __ / All rights reserved.
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// \/_// robfinch<remove>@opencores.org
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// \/_// robfinch<remove>@opencores.org
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// ||
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// ||
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//
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//
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// Raptor64_set.v
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// Raptor64_set.v
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// - set datapath operations
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// - set datapath operations
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//
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//
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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// (at your option) any later version.
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//
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//
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// This source file is distributed in the hope that it will be useful,
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// GNU General Public License for more details.
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//
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//
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// You should have received a copy of the GNU General Public License
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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//
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//
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//=============================================================================
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//=============================================================================
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//
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//
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module Raptor64_set(xIR, a, b, imm, o);
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module Raptor64_set(xIR, a, b, imm, o);
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input [41:0] xIR;
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input [31:0] xIR;
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input [63:0] a;
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input [63:0] a;
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input [63:0] b;
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input [63:0] b;
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input [63:0] imm;
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input [63:0] imm;
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output [63:0] o;
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output [63:0] o;
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reg [63:0] o;
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reg [63:0] o;
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wire [6:0] xOpcode = xIR[41:35];
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wire [6:0] xOpcode = xIR[31:25];
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wire [6:0] xFunc = xIR[6:0];
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wire [5:0] xFunc = xIR[5:0];
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wire eqi = a==imm;
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wire eqi = a==imm;
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wire lti = $signed(a) < $signed(imm);
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wire lti = $signed(a) < $signed(imm);
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wire ltui = a < imm;
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wire ltui = a < imm;
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wire eq = a==b;
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wire eq = a==b;
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wire lt = $signed(a) < $signed(b);
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wire lt = $signed(a) < $signed(b);
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wire ltu = a < b;
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wire ltu = a < b;
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always @(xOpcode,xFunc,eq,lt,ltu,eqi,lti,ltui)
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always @(xOpcode,xFunc,eq,lt,ltu,eqi,lti,ltui)
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case (xOpcode)
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case (xOpcode)
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`RR:
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`RR:
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case(xFunc)
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case(xFunc)
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`SEQ: o = eq;
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`SEQ: o = eq;
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`SNE: o = !eq;
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`SNE: o = !eq;
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`SLT: o = lt;
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`SLT: o = lt;
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`SLE: o = lt|eq;
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`SLE: o = lt|eq;
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`SGT: o = !(lt|eq);
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`SGT: o = !(lt|eq);
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`SGE: o = !lt;
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`SGE: o = !lt;
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`SLTU: o = ltu;
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`SLTU: o = ltu;
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`SLEU: o = ltu|eq;
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`SLEU: o = ltu|eq;
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`SGTU: o = !(ltu|eq);
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`SGTU: o = !(ltu|eq);
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`SGEU: o = !ltu;
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`SGEU: o = !ltu;
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default: o = 64'd0;
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default: o = 64'd0;
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endcase
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endcase
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`SEQI: o = eqi;
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`SEQI: o = eqi;
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`SNEI: o = !eqi;
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`SNEI: o = !eqi;
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`SLTI: o = lti;
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`SLTI: o = lti;
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`SLEI: o = lti|eqi;
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`SLEI: o = lti|eqi;
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`SGTI: o = !(lti|eqi);
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`SGTI: o = !(lti|eqi);
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`SGEI: o = !lti;
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`SGEI: o = !lti;
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`SLTUI: o = ltui;
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`SLTUI: o = ltui;
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`SLEUI: o = ltui|eqi;
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`SLEUI: o = ltui|eqi;
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`SGTUI: o = !(ltui|eqi);
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`SGTUI: o = !(ltui|eqi);
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`SGEUI: o = !ltui;
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`SGEUI: o = !ltui;
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default: o = 64'd0;
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default: o = 64'd0;
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endcase
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endcase
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endmodule
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endmodule
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