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--! @file shifter2xstage.vhd
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--! @file shifter2xstage.vhd
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--! @brief RayTrac Arithmetic Shifter
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--! @brief RayTrac Arithmetic Shifter
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--! @author Julián Andrés Guarín Reyes
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--! @author Julián Andrés Guarín Reyes
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--------------------------------------------------
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--------------------------------------------------
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-- RAYTRAC
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-- RAYTRAC
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-- Author Julian Andres Guarin
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-- Author Julian Andres Guarin
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-- shifter2xstage.vhd
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-- shifter2xstage.vhd
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-- This file is part of raytrac.
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-- This file is part of raytrac.
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--
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--
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-- raytrac is free software: you can redistribute it and/or modify
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-- raytrac is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- (at your option) any later version.
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--
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--
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-- raytrac is distributed in the hope that it will be useful,
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-- raytrac is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- You should have received a copy of the GNU General Public License
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>
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-- along with raytrac. If not, see <http://www.gnu.org/licenses/>
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.math_real.all;
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use ieee.math_real.all;
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use work.arithpack.all;
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use work.arithpack.all;
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entity shifter2xstage is
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entity shifter2xstage is
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generic (
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generic (
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address_width : integer := 9;
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address_width : integer := 9;
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width : integer := 32
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width : integer := 32
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);
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);
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port (
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port (
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data : in std_logic_vector (width-1 downto 0);
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data : in std_logic_vector (width-1 downto 0);
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exp : out std_logic_vector (2*integer(ceil(log(real(width),2.0)))-1 downto 0);
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exp : out std_logic_vector (2*integer(ceil(log(real(width),2.0)))-1 downto 0);
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add : out std_logic_vector (2*address_width-1 downto 0);
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add : out std_logic_vector (2*address_width-1 downto 0);
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zero : out std_logic
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zero : out std_logic
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);
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);
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end shifter2xstage;
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end shifter2xstage;
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architecture shifter2xstage_arch of shifter2xstage is
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architecture shifter2xstage_arch of shifter2xstage is
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signal exp0 : std_logic_vector (integer(ceil(log(real(width),2.0)))-1 downto 0);
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signal exp0 : std_logic_vector (integer(ceil(log(real(width),2.0)))-1 downto 0);
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signal exp1 : std_logic_vector (integer(ceil(log(real(width),2.0)))-1 downto 0);
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signal exp1 : std_logic_vector (integer(ceil(log(real(width),2.0)))-1 downto 0);
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signal add0 : std_logic_vector (address_width-1 downto 0);
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signal add0 : std_logic_vector (address_width-1 downto 0);
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signal add1 : std_logic_vector (address_width-1 downto 0);
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signal add1 : std_logic_vector (address_width-1 downto 0);
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signal szero: std_logic_vector (1 downto 0);
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signal szero: std_logic_vector (1 downto 0);
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function exp0StringParam()return string is
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function exp0StringParam return string is
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begin
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begin
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if width rem 2 = 0 then
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if width rem 2 = 0 then
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return "NO";
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return "NO";
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else
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else
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return "YES";
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return "YES";
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end if;
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end if;
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end exp0StringParam;
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end exp0StringParam;
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function exp1StringParam()return string is
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function exp1StringParam return string is
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begin
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begin
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if width rem 2 = 0 then
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if width rem 2 = 0 then
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return "YES";
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return "YES";
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else
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else
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return "NO";
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return "NO";
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end if;
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end if;
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end exp1StringParam;
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end exp1StringParam;
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begin
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begin
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zero <= szero(1) and szero(0);
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zero <= szero(1) and szero(0);
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evenS:shifter
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evenS:shifter
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generic map (address_width,width,exp0StringParam())
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generic map (address_width,width,exp0StringParam)
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port map (data,exp0,add0,szero(0));
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port map (data,exp0,add0,szero(0));
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oddS:shifter
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oddS:shifter
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generic map (address_width,width,exp1StringParam())
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generic map (address_width,width,exp1StringParam)
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port map (data,exp1,add1,szero(1));
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port map (data,exp1,add1,szero(1));
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exp(integer(ceil(log(real(width),2.0)))-1 downto 0)<=exp0;
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exp(integer(ceil(log(real(width),2.0)))-1 downto 0)<=exp0;
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exp(2*integer(ceil(log(real(width),2.0)))-1 downto integer(ceil(log(real(width),2.0))))<=exp1;
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exp(2*integer(ceil(log(real(width),2.0)))-1 downto integer(ceil(log(real(width),2.0))))<=exp1;
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add(address_width-1 downto 0)<=add0;
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add(address_width-1 downto 0)<=add0;
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add(2*address_width-1 downto address_width)<=add1;
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add(2*address_width-1 downto address_width)<=add1;
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end shifter2xstage_arch;
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end shifter2xstage_arch;
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