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<##//////////////////////////////////////////////////////////////////
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//// ////
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//// Author: Eyal Hochberg ////
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//// eyal@provartec.com ////
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//// ////
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//// Downloaded from: http://www.opencores.org ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// www.provartec.com ////
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//// info@provartec.com ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation.////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// ////
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//////////////////////////////////////////////////////////////////##>
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OUTFILE fir_MAC_NUMserial_TOPO.v
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OUTFILE fir_MAC_NUMserial_TOPO.v
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ITER CX COEFF_NUM
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ITER CX COEFF_NUM
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ITER MX MAC_NUM
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ITER MX MAC_NUM
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ITER DX SON_DELAY
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ITER DX SON_DELAY
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// Built In Parameters:
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// Built In Parameters:
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//
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//
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// Filter Order = ORDER
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// Filter Order = ORDER
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// Input Precision = DIN_BITS
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// Input Precision = DIN_BITS
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// Coefficient Precision = COEFF_BITS
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// Coefficient Precision = COEFF_BITS
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// Sum of Products Latency = LATENCY
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// Sum of Products Latency = LATENCY
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// Number of serial FIR sons = MAC_NUM
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// Number of serial FIR sons = MAC_NUM
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// Number of multiplayers = MAC_NUM
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// Number of multiplayers = MAC_NUM
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module fir_MAC_NUMserial_TOPO (PORTS);
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module fir_MAC_NUMserial_TOPO (PORTS);
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input clk;
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input clk;
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input reset;
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input reset;
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input clken;
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input clken;
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input [EXPR(COEFF_BITS-1):0] kCX;
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input [EXPR(COEFF_BITS-1):0] kCX;
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input [EXPR(DIN_BITS-1):0] data_in;
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input [EXPR(DIN_BITS-1):0] data_in;
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output [EXPR(DOUT_BITS-1):0] data_out;
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output [EXPR(DOUT_BITS-1):0] data_out;
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output valid;
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output valid;
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wire [EXPR(DIN_BITS-1):0] data_inMX;
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wire [EXPR(DIN_BITS-1):0] data_inMX;
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wire [EXPR(SON_DOUT-1):0] data_outMX;
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wire [EXPR(SON_DOUT-1):0] data_outMX;
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wire validMX;
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wire validMX;
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wire null;
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wire null;
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//delay inputs per son
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//delay inputs per son
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assign data_in0 = data_in;
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assign data_in0 = data_in;
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CREATE prgen_delayN.v DEFCMD(SWAP CONST(DELAY) SON_DELAY) DEFCMD(DEFINE CLKEN)
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CREATE prgen_delayN.v DEFCMD(SWAP CONST(DELAY) SON_DELAY) DEFCMD(DEFINE CLKEN)
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prgen_delaySON_DELAY_en #(DIN_BITS) delay_dinMX (clk, reset, clken, data_inMX, data_inEXPR(MX+1));
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prgen_delaySON_DELAY_en #(DIN_BITS) delay_dinMX (clk, reset, clken, data_inMX, data_inEXPR(MX+1));
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STOMP LINE
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STOMP LINE
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//the FIR sons
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//the FIR sons
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LOOP MX MAC_NUM
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LOOP MX MAC_NUM
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CREATE fir_serial.v def_fir_basic.txt DEFCMD(SWAP CONST(ORDER) EXPR(SON_DELAY-1)) DEFCMD(SWAP CONST(COEFF_BITS) COEFF_BITS) DEFCMD(SWAP CONST(DIN_BITS) DIN_BITS)
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CREATE fir_serial.v def_fir_basic.txt DEFCMD(SWAP CONST(ORDER) EXPR(SON_DELAY-1)) DEFCMD(SWAP CONST(COEFF_BITS) COEFF_BITS) DEFCMD(SWAP CONST(DIN_BITS) DIN_BITS)
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fir_serial_EXPR(SON_DELAY-1)_INPUT_BITS firMX
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fir_serial_EXPR(SON_DELAY-1)_INPUT_BITS firMX
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(
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(
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.clken(clken),
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.clken(clken),
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.kDX(kEXPR((MX*SON_DELAY)+DX)) ,
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.kDX(kEXPR((MX*SON_DELAY)+DX)) ,
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.data_in(data_inMX),
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.data_in(data_inMX),
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.data_out(data_outMX),
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.data_out(data_outMX),
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.valid(validMX)
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.valid(validMX)
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);
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);
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ENDLOOP MX
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ENDLOOP MX
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//Pipline the output additions
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//Pipline the output additions
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CREATE bintree_adder.v DEFCMD(SWAP INPUT_NUM MAC_NUM)
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CREATE bintree_adder.v DEFCMD(SWAP INPUT_NUM MAC_NUM)
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bintree_adder_MAC_NUM #(SON_DOUT) bintree_adder
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bintree_adder_MAC_NUM #(SON_DOUT) bintree_adder
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(
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(
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.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.data_inMX(data_outMX),
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.data_inMX(data_outMX),
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IF TRUE(ADD_DOUT!=DOUT_BITS) .data_out({null, data_out}),
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IF TRUE(ADD_DOUT!=DOUT_BITS) .data_out({null, data_out}),
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IF TRUE(ADD_DOUT==DOUT_BITS) .data_out(data_out),
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IF TRUE(ADD_DOUT==DOUT_BITS) .data_out(data_out),
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.valid_in(valid0),
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.valid_in(valid0),
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.valid_out(valid)
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.valid_out(valid)
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);
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);
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endmodule
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endmodule
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