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//// ////
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//// ////
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//// Author: Eyal Hochberg ////
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//// Author: Eyal Hochberg ////
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//// eyal@provartec.com ////
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//// eyal@provartec.com ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org ////
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//// Downloaded from: http://www.opencores.org ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// Copyright (C) 2010 Provartec LTD ////
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//// www.provartec.com ////
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//// www.provartec.com ////
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//// info@provartec.com ////
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//// info@provartec.com ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation.////
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//// Public License as published by the Free Software Foundation.////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more////
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//// PURPOSE. See the GNU Lesser General Public License for more////
|
//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// details. http://www.gnu.org/licenses/lgpl.html ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////##>
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//////////////////////////////////////////////////////////////////##>
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REQUIRE(1.4)
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REQUIRE(1.5)
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STARTUSER
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PARAM COUNT 0
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INCLUDE def_regs.txt
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INCLUDE def_regs.txt
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SWAP.GLOBAL MODEL_NAME regfile
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SWAP.GLOBAL MODEL_NAME PREFIX configuration registers
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SWAP FFD 1 ##flip-flop delay
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SWAP FFD 1 ##flip-flop delay
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## Types:
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## Types:
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## RW - read / write (output from block)
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## RW - read / write (output from block)
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## RO - read only (input to block)
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## RO - read only (input to block)
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## WO - write only (output to block)
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## WO - write only (output to block)
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## IW - internal write (output to block - logic is added especially)
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## IW - internal write (output to block - logic is added especially)
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## IR - internal read (no port - logic is added especially)
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## IR - internal read (no port - logic is added especially)
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ENUM TYPE_RW TYPE_RO TYPE_WO TYPE_IW TYPE_IR
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ENUM TYPE_RW TYPE_RO TYPE_WO TYPE_IW TYPE_IR
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SWAP TYPE_TYPE_RW Read and Write
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SWAP TYPE_TYPE_RW Read and Write
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SWAP TYPE_TYPE_RO Read only
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SWAP TYPE_TYPE_RO Read only
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SWAP TYPE_TYPE_WO Write only
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SWAP TYPE_TYPE_WO Write only
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GROUP APB is {
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GROUP APB is {
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pclken 1 input
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pclken 1 input
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psel 1 input
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psel 1 input
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penable 1 input
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penable 1 input
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paddr ADDR_BITS input
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paddr ADDR_BITS input
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pwrite 1 input
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pwrite 1 input
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pwdata 32 input
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pwdata 32 input
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prdata 32 output
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prdata 32 output
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pslverr 1 output
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pslverr 1 output
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pready 1 output
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pready 1 output
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}
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}
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SWAP.USER ADD_REG(NAME, ADDR, TYPE, DESC) PARAM REG_NAME COUNT +NEWLINE PARAM COUNT +1 +NEWLINE GROUP.USER REGS extends { +NEWLINE NAME SON(CONST(ADDR) ADDR) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE } ##Registers:
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SWAP.USER ADD_FIELD(REGNAME, NAME, BITS, FIRST_BIT, DEFAULT, TYPE, DESC) GROUP.USER REGREG_REGNAME extends { +NEWLINE NAME BITS SON(CONST(FIRST_BIT) FIRST_BIT) SON(CONST(DEFAULT) DEFAULT) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE } ##Fields:
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SWAP ADD_REG(NAME, ADDR, TYPE, DESC) GROUP REGS extends { +NEWLINE NAME SON(CONST(ADDR) ADDR) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE }
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SWAP ADD_FIELD(REGNUM, NAME, BITS, START_BIT, DEFAULT, TYPE, DESC) GROUP REGREGNUM extends { +NEWLINE NAME BITS SON(START START_BIT) SON(CONST(DEFAULT) DEFAULT) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE }
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