URL
https://opencores.org/ocsvn/rs232_interface/rs232_interface/trunk
[/] [rs232_interface/] [trunk/] [README] - Diff between revs 10 and 12
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Rev 12 |
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About this project:
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About this project:
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This is a small UART to uPC interface. Ideal to use with soft/hard processors in a FPGA project.
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This is a small UART to uPC interface. Ideal to use with soft/hard processors in a FPGA project.
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Recommended Tools:
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Recommended Tools:
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Text Editor (use TAB of 4 SPACES and monospaced font):
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Text Editor (use TAB of 4 SPACES and monospaced font):
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- Notepad++
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- Notepad++
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- gvim
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- gvim
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Simulation Tool:
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Simulation Tool:
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- iSim
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- iSim
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- Modelsim
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- Modelsim
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Change Log:
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Change Log:
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2011/01/15:
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- Fixed bugs from RX of revision 10 of uart.vhd.
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- Tested parity verification on RX.
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- Tested parity generation on TX.
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2011/01/08:
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2011/01/08:
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- Implemented asynchronous clocks.
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- Implemented asynchronous clocks.
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- Implemented RX clock regenaration.
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- Implemented RX clock regenaration.
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2010/11/30:
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2010/11/30:
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- Implemented PARITY (not tested!).
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- Implemented PARITY (not tested!).
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2010/11/21:
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2010/11/21:
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- Included main file.
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- Included main file.
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2020/09/25:
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2020/09/25:
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- Initial Commit.
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- Initial Commit.
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