//============================================================================
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//============================================================================
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// BRANCH.v
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// BRANCH.v
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// Jcc disp8
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// Jcc disp8
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// - conditional branches
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// - conditional branches
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// - fetch an 8 bit displacement and add into IP
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// - fetch an 8 bit displacement and add into IP
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//
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//
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//
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//
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// (C) 2009-2012 Robert Finch
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// (C) 2009-2012 Robert Finch
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// Stratford
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// Stratford
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// robfinch<remove>@opencores.org
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// robfinch<remove>@finitron.ca
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//
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//
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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// (at your option) any later version.
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//
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//
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// This source file is distributed in the hope that it will be useful,
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// GNU General Public License for more details.
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//
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//
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// You should have received a copy of the GNU General Public License
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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//
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//
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//=============================================================================
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//=============================================================================
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//
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//
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// Fetch branch displacement if taking branch, otherwise skip
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// Fetch branch displacement if taking branch, otherwise skip
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//
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//
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BRANCH1:
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BRANCH1:
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if (take_br) begin
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if (take_br) begin
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`INITIATE_CODE_READ
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code_read();
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state <= BRANCH2;
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state <= BRANCH2;
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end
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end
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else begin
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else begin
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ip <= ip_inc;
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ip <= ip_inc;
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state <= IFETCH;
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state <= IFETCH;
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end
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end
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BRANCH2:
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BRANCH2:
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if (ack_i) begin
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if (ack_i) begin
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`TERMINATE_CODE_READ
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term_code_read();
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disp16 <= {{8{dat_i[7]}},dat_i};
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disp16 <= {{8{dat_i[7]}},dat_i};
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state <= BRANCH3;
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state <= BRANCH3;
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end
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end
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BRANCH3:
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BRANCH3:
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begin
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begin
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ip <= ip + disp16;
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ip <= ip + disp16;
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state <= IFETCH;
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state <= IFETCH;
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end
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end
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