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-- This file is part of Salsa20IpCore.
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-- Salsa20IpCore is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU Lesser General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- Salsa20IpCore is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU Lesser General Public License for more details.
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-- You should have received a copy of the GNU Lesser General Public License
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-- along with Salsa20IpCore. If not, see <http://www.gnu.org/licenses/>.
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LIBRARY ieee ;
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LIBRARY ieee ;
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LIBRARY std ;
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LIBRARY std ;
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library modelsim_lib;
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library modelsim_lib;
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USE ieee.numeric_std.all ;
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USE ieee.numeric_std.all ;
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USE ieee.std_logic_1164.all ;
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USE ieee.std_logic_1164.all ;
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USE ieee.std_logic_textio.all ;
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USE ieee.std_logic_textio.all ;
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USE ieee.std_logic_unsigned.all ;
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USE ieee.std_logic_unsigned.all ;
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USE std.textio.all ;
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USE std.textio.all ;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use modelsim_lib.util.all;
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use modelsim_lib.util.all;
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ENTITY \tb_salsaa.vhd\ IS
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ENTITY \tb_salsaa.vhd\ IS
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generic (
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generic (
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log_file_name : string := "log.txt"
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log_file_name : string := "log.txt"
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);
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);
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END ;
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END ;
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ARCHITECTURE \tb_salsaa.vhd_arch\ OF \tb_salsaa.vhd\ IS
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ARCHITECTURE \tb_salsaa.vhd_arch\ OF \tb_salsaa.vhd\ IS
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SIGNAL data_req : std_logic ;
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SIGNAL data_req : std_logic ;
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SIGNAL key : std_logic_vector (255 downto 0) ;
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SIGNAL key : std_logic_vector (255 downto 0) ;
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SIGNAL data : std_logic_vector (31 downto 0) ;
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SIGNAL data : std_logic_vector (31 downto 0) ;
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SIGNAL start : std_logic ;
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SIGNAL start : std_logic ;
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SIGNAL clk : std_logic ;
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SIGNAL clk : std_logic ;
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SIGNAL data_valid : std_logic ;
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SIGNAL data_valid : std_logic ;
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SIGNAL nonce : std_logic_vector (63 downto 0) ;
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SIGNAL nonce : std_logic_vector (63 downto 0) ;
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SIGNAL reset : std_logic ;
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SIGNAL reset : std_logic ;
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COMPONENT salsaa
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COMPONENT salsaa
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PORT (
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PORT (
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data_req : in std_logic ;
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data_req : in std_logic ;
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key : in std_logic_vector (255 downto 0) ;
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key : in std_logic_vector (255 downto 0) ;
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data : out std_logic_vector (31 downto 0) ;
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data : out std_logic_vector (31 downto 0) ;
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start : in std_logic ;
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start : in std_logic ;
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clk : in std_logic ;
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clk : in std_logic ;
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data_valid : out std_logic ;
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data_valid : out std_logic ;
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nonce : in std_logic_vector (63 downto 0) ;
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nonce : in std_logic_vector (63 downto 0) ;
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reset : in std_logic );
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reset : in std_logic );
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END COMPONENT ;
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END COMPONENT ;
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file log_file : TEXT open write_mode is log_file_name;
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file log_file : TEXT open write_mode is log_file_name;
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variable l : string;
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variable l : string;
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BEGIN
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BEGIN
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DUT : salsaa
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DUT : salsaa
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PORT MAP (
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PORT MAP (
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data_req => data_req ,
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data_req => data_req ,
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key => key ,
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key => key ,
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data => data ,
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data => data ,
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start => start ,
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start => start ,
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clk => clk ,
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clk => clk ,
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data_valid => data_valid ,
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data_valid => data_valid ,
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nonce => nonce ,
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nonce => nonce ,
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reset => reset ) ;
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reset => reset ) ;
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key <= x"201f1e1d1c1b1a191817161514131211100f0e0d0c0b0a090807060504030201" ;
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key <= x"201f1e1d1c1b1a191817161514131211100f0e0d0c0b0a090807060504030201" ;
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nonce <= x"0000000000000000" ;
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nonce <= x"0000000000000000" ;
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-- "Clock Pattern" : dutyCycle = 50
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-- "Clock Pattern" : dutyCycle = 50
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-- Start Time = 0 ps, End Time = 1 us, Period = 6666 ps
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-- Start Time = 0 ps, End Time = 1 us, Period = 6666 ps
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Process
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Process
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Begin
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Begin
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clk <= '0' ;
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clk <= '0' ;
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wait for 3333 ps ;
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wait for 3333 ps ;
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-- 3333 ps, single loop till start period.
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-- 3333 ps, single loop till start period.
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for Z in 1 to 3000
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for Z in 1 to 3000
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loop
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loop
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clk <= '1' ;
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clk <= '1' ;
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wait for 3333 ps ;
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wait for 3333 ps ;
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clk <= '0' ;
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clk <= '0' ;
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wait for 3333 ps ;
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wait for 3333 ps ;
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-- 996567 ps, repeat pattern in loop.
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-- 996567 ps, repeat pattern in loop.
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end loop;
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end loop;
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clk <= '1' ;
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clk <= '1' ;
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wait for 3333 ps ;
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wait for 3333 ps ;
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clk <= '0' ;
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clk <= '0' ;
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wait for 100 ps ;
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wait for 100 ps ;
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-- dumped values till 1 us
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-- dumped values till 1 us
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wait;
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wait;
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End Process;
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End Process;
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-- "Constant Pattern"
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-- "Constant Pattern"
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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Process
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Process
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Begin
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Begin
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reset <= '0' ;
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reset <= '0' ;
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wait for 15879 ps ;
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wait for 15879 ps ;
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reset <= '1' ;
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reset <= '1' ;
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wait for 17864 ps ;
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wait for 17864 ps ;
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reset <= '0' ;
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reset <= '0' ;
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wait for 4000000 ps ;
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wait for 4000000 ps ;
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-- dumped values till 1 us
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-- dumped values till 1 us
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wait;
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wait;
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End Process;
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End Process;
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-- "Constant Pattern"
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-- "Constant Pattern"
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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Process
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Process
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Begin
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Begin
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start <= '0' ;
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start <= '0' ;
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wait for 33330 ps ;
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wait for 33330 ps ;
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start <= '1' ;
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start <= '1' ;
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wait for 33330 ps +3333 ps ;
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wait for 33330 ps +3333 ps ;
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start <= '0' ;
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start <= '0' ;
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wait for 33330 ps+6666 ps;
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wait for 33330 ps+6666 ps;
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-- dumped values till 1 us
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-- dumped values till 1 us
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wait;
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wait;
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End Process;
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End Process;
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-- "Constant Pattern"
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-- "Constant Pattern"
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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-- Start Time = 0 ps, End Time = 1 us, Period = 0 ps
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Process
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Process
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Begin
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Begin
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data_req <= '0' ;
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data_req <= '0' ;
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wait for 589941 ps ;
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wait for 589941 ps ;
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data_req <= '1' ;
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data_req <= '1' ;
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wait for 6666 ps ;
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wait for 6666 ps ;
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data_req <= '0' ;
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data_req <= '0' ;
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wait for 6666 ps ;
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wait for 6666 ps ;
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for Z in 1 to 300
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for Z in 1 to 300
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loop
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loop
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data_req <= '1' ;
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data_req <= '1' ;
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wait for 6666 ps ;
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wait for 6666 ps ;
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data_req <= '0' ;
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data_req <= '0' ;
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wait for 6666 ps ;
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wait for 6666 ps ;
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end loop;
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end loop;
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data_req <= '1' ;
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data_req <= '1' ;
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wait for 6666 ps ;
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wait for 6666 ps ;
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data_req <= '0' ;
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data_req <= '0' ;
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wait for 4000000 ps ;
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wait for 4000000 ps ;
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-- dumped values till 1 us
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-- dumped values till 1 us
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wait;
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wait;
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End Process;
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End Process;
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-- results to file
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-- results to file
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process
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process
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begin
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begin
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for Z in 1 to 3000 loop
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for Z in 1 to 3000 loop
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wait until clk = '1';
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wait until clk = '1';
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if data_valid = '1' then
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if data_valid = '1' then
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write(l,hstr(data));
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write(l,hstr(data));
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writeline(log_file,l);
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writeline(log_file,l);
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end if;
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end if;
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wait until clk = '0';
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wait until clk = '0';
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end loop;
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end loop;
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end process;
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end process;
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END;
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END;
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