/****************************************************************************
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/****************************************************************************
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sbd_adsu
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sbd_adsu
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- ADSU
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- ADSU
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Copyright (C) 2005 Samuel Brown
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Copyright (C) 2005 Samuel Brown
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sam.brown@sbdesign.org
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sam.brown@sbdesign.org
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This library is free software; you can redistribute it and/or
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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****************************************************************************/
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****************************************************************************/
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module sbd_adsu(A,B,ADD,C_IN,C_OUT,S);
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module sbd_adsu(A,B,ADD,C_IN,C_OUT,S);
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parameter bitlength=8;
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parameter bitlength=8;
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input [bitlength-1:0] A;
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input [bitlength-1:0] A;
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input [bitlength-1:0] B;
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input [bitlength-1:0] B;
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input ADD;
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input ADD;
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input C_IN;
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input C_IN;
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output wire C_OUT;
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output wire C_OUT;
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output wire [bitlength-1:0] S;
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output wire [bitlength-1:0] S;
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wire [bitlength-1:0] Bx;
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wire [bitlength-1:0] Bx;
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wire [bitlength:0] tmp;
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wire [bitlength:0] tmp;
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assign Bx = B ^ {bitlength{~ADD}};
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assign Bx = B ^ {bitlength{~ADD}};
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assign tmp = A + Bx + C_IN;
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assign tmp = A + Bx + C_IN;
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assign S = tmp[bitlength-1:0];
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assign S = tmp[bitlength-1:0];
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assign C_OUT = tmp[bitlength];
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assign C_OUT = tmp[bitlength];
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endmodule
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endmodule
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