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https://opencores.org/ocsvn/sc2v/sc2v/trunk
[/] [sc2v/] [trunk/] [examples/] [dummy2.cpp] - Diff between revs 25 and 33
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| Rev 25 |
Rev 33 |
#include "systemc.h"
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#include "systemc.h"
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void
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void
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fsm::regs ()
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fsm::regs ()
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{
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{
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if (rst.read ())
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if (rst.read ())
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{
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{
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state.write (0);
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state.write (0);
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}
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}
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else
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else
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state.write (next_state);
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state.write (next_state);
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}
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}
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void
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void
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fsm::fsm_proc ()
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fsm::fsm_proc ()
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{
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{
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struct {
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sc_uint<16> addr;
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sc_uint<32> data;
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} st;
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struct {
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sc_int<26> data1;
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} st1;
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sc_uint <2> c[4];
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sc_uint <2> c[4];
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sc_uint <4> f;
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sc_uint <4> f;
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next_state.write (state.read ());
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next_state.write (state.read ());
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array[0].write(1);
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array[0].write(1);
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c[1]=0;
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c[1]=0;
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switch ((int) state.read ())
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switch ((int) state.read ())
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{
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{
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case 0x1a:
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case 0x1a:
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if (input1.read ())
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if (input1.read ())
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{
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{
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next_state.write (sc_uint<4>(0x1b1));
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next_state.write (sc_uint<4>(0x1b1));
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a.write (true);
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a.write (true);
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st1.data1=8;
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}
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}
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else if (input2.read () < input1.read())
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else if (input2.read () < input1.read())
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{
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{
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next_state.write (2);
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next_state.write (2);
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a.write (false);
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a.write (false);
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}
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}
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else
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else
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{
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{
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next_state.write (1);
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next_state.write (1);
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a.write (1);
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a.write (1);
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}
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}
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break;
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break;
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case 0xfaf67:
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case 0xfaf67:
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//hola
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//hola
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switch(input1.read()){
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switch(input1.read()){
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case 0x1:
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case 0x1:
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case 0x2:
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case 0x2:
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switch(input1.read()){
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switch(input1.read()){
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case 0x1:
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case 0x1:
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b.write(0);
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b.write(0);
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break;
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break;
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case 0x3:
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case 0x3:
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b.write(1);
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b.write(1);
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break;
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break;
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}
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}
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b.write(0);
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b.write(0);
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break;
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break;
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case 0x3:
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case 0x3:
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b.write(1);
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b.write(1);
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break;
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break;
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}
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}
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if (input2.read ())
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if (input2.read ())
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{
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{
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next_state.write (2);
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next_state.write (2);
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b.write (1);
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b.write (1);
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}
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}
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break;
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break;
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case 35:
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case 35:
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next_state.write (0);
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next_state.write (0);
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break;
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break;
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}
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}
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}
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}
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void fsm::dummy_proc(){
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void fsm::dummy_proc(){
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struct {
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sc_int<26> data1;
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sc_uint<32> data2;
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} st2;
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st2.data1=6;
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st2.data2=8;
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w.write(sc_uint<1>(2));
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w.write(sc_uint<1>(2));
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}
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}
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