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No newline at end of file
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No newline at end of file
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/*$$HEADER*/
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/******************************************************************************/
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/* */
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/* H E A D E R I N F O R M A T I O N */
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/* */
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/******************************************************************************/
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// Project Name : Development Board Debugger Example
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// File Name : main.c
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// Prepared By : jb
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// Project Start : 2009-01-01
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/*$$COPYRIGHT NOTICE*/
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/******************************************************************************/
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/* */
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/* C O P Y R I G H T N O T I C E */
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/* */
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/******************************************************************************/
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// Copyright (c) ORSoC 2009 All rights reserved.
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// The information in this document is the property of ORSoC.
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// Except as specifically authorized in writing by ORSoC, the receiver of
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// this document shall keep the information contained herein confidential and
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// shall protect the same in whole or in part thereof from disclosure and
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// dissemination to third parties. Disclosure and disseminations to the receiver's
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// employees shall only be made on a strict need to know basis.
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/*$$DESCRIPTION*/
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/******************************************************************************/
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/* */
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/* D E S C R I P T I O N */
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/* */
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/******************************************************************************/
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// Perform some simple functions, used as an example when first using the
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// debug cable and proxy with GDB.
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/*$$CHANGE HISTORY*/
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/******************************************************************************/
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/* */
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/* C H A N G E H I S T O R Y */
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/* */
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/******************************************************************************/
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// Date Version Description
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//------------------------------------------------------------------------
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// 090101 1.0 First version jb
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/*$$INCLUDE FILES*/
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/******************************************************************************/
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/* */
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/* I N C L U D E F I L E S */
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/* */
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/******************************************************************************/
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#define INCLUDED_FROM_C_FILE
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#include "orsocdef.h"
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#include "board.h"
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#include "uart.h"
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#include "sd_controller.h"
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/*$$PRIVATE MACROS*/
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/******************************************************************************/
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/* */
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/* P R I V A T E M A C R O S */
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/* */
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/******************************************************************************/
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/*$$GLOBAL VARIABLES*/
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/******************************************************************************/
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/* */
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/* G L O B A L V A R I A B L E S */
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/* */
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/******************************************************************************/
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/*$$PRIVATE VARIABLES*/
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/******************************************************************************/
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/* */
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/* P R I V A T E V A R I A B L E S */
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/* */
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/******************************************************************************/
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/*$$FUNCTIONS*/
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/******************************************************************************/
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/* */
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/* F U N C T I O N S */
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/* */
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/******************************************************************************/
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/******************************************************************************/
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/* W R I T E T O EXTERNAL SDRAM 1 */
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/******************************************************************************/
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// Write to External SDRAM
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void Write_External_SDRAM_1(void)
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{
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uint32 i;
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uint32 read;
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uint32 range;
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uint32 adr_offset;
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range = 0x7ff; // Max range: 0x7fffff
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adr_offset = 0x00000000; // External memory offset
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for (i=0x0; i < range; i=i+4) {
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REG32(adr_offset + i) = (adr_offset + i);
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}
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for (i=0x0; i < range; i=i+4) {
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read = REG32(adr_offset + i);
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if (read != (adr_offset + i)) {
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while(TRUE){ //ERROR=HALT PROCESSOR
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}
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}
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}
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}
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/*$$EXTERNAL EXEPTIONS*/
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/******************************************************************************/
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/* E X T E R N A L E X E P T I O N S */
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/******************************************************************************/
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void external_exeption()
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{
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REG uint8 i;
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REG uint32 PicSr,sr;
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}
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/*$$MAIN*/
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/******************************************************************************/
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/* */
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/* M A I N P R O G R A M */
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/* */
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/******************************************************************************/
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struct sd_card_csr {
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unsigned int PAD:18;
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unsigned int CMDI:6;
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unsigned int CMDT:2;
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unsigned int DPS:1;
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unsigned int CICE_s:1;
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unsigned int CRCE_s:1;
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unsigned int RSVD:1;
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unsigned int RTS:2;
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} ;
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void Start()
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{
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struct sd_card_csr *sd_set_reg = (struct sd_card_csr *) (SD_CONTROLLER_BASE+SD_COMMAND);
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volatile unsigned long rtn_reg=0;
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volatile unsigned long rtn_reg1=0;
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int i;
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unsigned char block[512];
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unsigned char blocka[512];
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unsigned char blockb[512];
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unsigned char rec_block[512];
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unsigned char rec_blocka[512];
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unsigned char rec_blockb[512];
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//Generate som data to be writen
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for (i =0; i<512;i++)
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block[i]=i;
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for (i =0; i<512;i++)
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blocka[i]=i+8;
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for (i =0; i<512;i++)
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blockb[i]=0xb6;
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unsigned long b=0x0001;
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sd_card sd_card_0;
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uart_init();
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sd_card_0 = sd_controller_init();
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if (sd_card_0.Active==1)
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{
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uart_print_str("Init 2 succes!\n");
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uart_print_str("\nvoltage_windows:\n");
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uart_print_long(sd_card_0.Voltage_window);
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uart_print_str("\nRCA_Nr:\n");
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uart_print_long(sd_card_0.rca);
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uart_print_str("\nphys_spec_2_0 Y/N 1/0? :\n");
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uart_print_long(sd_card_0.phys_spec_2_0);
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uart_print_str("\nHCS? :\n");
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uart_print_long(sd_card_0.phys_spec_2_0);
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uart_print_str(":\n");
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}
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else
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uart_print_str("Init2 failed :/!\n");
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SD_REG(SD_COMMAND) = CMD9 |WORD_0| CICE | CRCE | RSP_146;
|
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SD_REG(SD_ARG)=sd_card_0.rca | 0xf0f0;
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if (!sd_wait_rsp())
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uart_print_str(" send failed :/!\n");
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else{
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uart_print_str("CSD 0 \n");
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uart_print_long( SD_REG(SD_RESP1) ) ;
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uart_print_str(" \n");
|
|
}
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uart_print_str("error? \n");
|
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uart_print_long( SD_REG( SD_ERROR_INT_STATUS) ) ;
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//Put in transfer state
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SD_REG(SD_COMMAND) = CMD7 | CICE | CRCE | RSP_48;
|
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SD_REG(SD_ARG)=sd_card_0.rca | 0xf0f0;
|
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if (!sd_wait_rsp())
|
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uart_print_str("Go send failed :/!\n");
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|
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else if ( SD_REG(SD_RESP1) == (CARD_STATUS_STB | READY_FOR_DATA ) )
|
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uart_print_str("Ready to transfer data!\n");
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|
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//Set block size
|
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|
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SD_REG(SD_COMMAND) = CMD16 | CICE | CRCE | RSP_48;
|
|
SD_REG(SD_ARG)=512;
|
|
if (!sd_wait_rsp())
|
|
uart_print_str("Go send failed :/!\n");
|
|
uart_print_str("Card Status reg CMD16: \n");
|
|
uart_print_long( SD_REG(SD_RESP1) ) ;
|
|
|
|
//Set Bus width to 4, CMD55 followed by ACMD 6
|
|
REG32(SD_CONTROLLER_BASE+SD_COMMAND) = CMD55|RSP_48;
|
|
REG32(SD_CONTROLLER_BASE+SD_ARG) =sd_card_0.rca | 0xf0f0;
|
|
if (!sd_wait_rsp())
|
|
uart_print_str("CMD55 send failed :/!\n");
|
|
|
|
SD_REG(SD_COMMAND) = ACMD6 | CICE | CRCE | RSP_48;
|
|
SD_REG(SD_ARG)=0x2;
|
|
if (!sd_wait_rsp())
|
|
uart_print_str("ACMD6 send failed :/!\n");
|
|
|
|
uart_print_str("Card Status reg ACMD6: \n");
|
|
uart_print_long( SD_REG(SD_RESP1) ) ;
|
|
uart_print_str("\n");
|
|
|
|
int cnt=0;
|
|
|
|
uart_print_str("FREE BD beg: \n");
|
|
uart_print_long( SD_REG(BD_STATUS) ) ;
|
|
uart_print_str("\n");
|
|
|
|
SD_REG(BD_TX) = █
|
|
SD_REG(BD_TX) = 512;
|
|
SD_REG(BD_TX) = &blocka;
|
|
SD_REG(BD_TX) = 1024;
|
|
SD_REG(BD_TX) = &blockb;
|
|
SD_REG(BD_TX) = 2048;
|
|
|
|
SD_REG(BD_RX) = &rec_block;
|
|
SD_REG(BD_RX) = 512;
|
|
SD_REG(BD_RX) = &rec_blocka;
|
|
SD_REG(BD_RX) = 1024;
|
|
SD_REG(BD_RX) = &rec_blockb;
|
|
SD_REG(BD_RX) = 2048;
|
|
|
|
//Check data transfer complete statusbit
|
|
//(An easier way is to check the BD_STATUS and wait for it to get Empty and then check for transfer errors)
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
while ( (( SD_REG(BD_ISR) &1) !=1 ) ){
|
|
rtn_reg= SD_REG(BD_ISR) ;
|
|
}
|
|
SD_REG(BD_ISR) =0;
|
|
|
|
|
|
|
|
uart_print_str("FREE BD: \n");
|
|
uart_print_long( SD_REG(BD_STATUS) ) ;
|
|
uart_print_str("\n");
|
|
SD_REG(BD_ISR) =0;
|
|
uart_print_str("\n");
|
|
for (i =0; i<512;i++) {
|
|
uart_print_short (rec_block[i]);
|
|
uart_print_str(".");
|
|
}
|
|
uart_print_str("\n");
|
|
for (i =0; i<512;i++) {
|
|
uart_print_short (rec_blocka[i]);
|
|
uart_print_str(".");
|
|
}
|
|
uart_print_str("\n");
|
|
for (i =0; i<512;i++) {
|
|
uart_print_short (rec_blockb[i]);
|
|
uart_print_str(".");
|
|
}
|
|
|
|
|
|
uart_print_str("done");
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|