URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 134 |
Rev 135 |
|
|
|
-->
|
|
|
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
|
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
|
xmlns:socgen="http://opencores.org"
|
xmlns:socgen="http://opencores.org"
|
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
|
|
opencores.org
|
opencores.org
|
Mos6502
|
Mos6502
|
core
|
core
|
|
|
|
|
2
|
2
|
_
|
_
|
_
|
_
|
_
|
_
|
VARIANT
|
VARIANT
|
|
|
|
|
|
|
|
TestBenches
|
|
sim
|
|
testbenches
|
|
testbench
|
|
version
|
|
|
|
|
|
Fpgas
|
|
syn
|
|
ise
|
|
chip
|
|
variant
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/doc
|
/doc
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
default
|
default
|
def
|
def
|
|
|
VEC_TABLE8'hff
|
VEC_TABLE8'hff
|
BOOT_VEC8'hfc
|
BOOT_VEC8'hfc
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
core/sim
|
core/sim
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.