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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [micro_bus/] [rtl/] [xml/] [micro_bus_def.xml] - Diff between revs 133 and 134

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Rev 133	Rev 134

	`-->`

`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`	`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
`xmlns:socgen="http://opencores.org"`	`xmlns:socgen="http://opencores.org"`
`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`	`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`	`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`	`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`

`opencores.org`	`opencores.org`
`logic`	`logic`
`micro_bus`	`micro_bus`
`def default`	`def default`





`slave_clk`	`slave_clk`





`clk`	`clk`
`clk`	`clk`





`slave_reset`	`slave_reset`





`reset`	`reset`
`reset`	`reset`





`master_enable`	`master_enable`





`enable`	`enable`
`enable`	`enable`





`cpu`	`cpu`













`addr`	`addr`
`addr_in`	`addr_in`
`150`	`150`



`rdata`	`rdata`
`rdata_out`	`rdata_out`
`reg`	`reg`
`150`	`150`






`wdata`	`wdata`
`wdata_in`	`wdata_in`
`70`	`70`





`wr`	`wr`
`wr_in`	`wr_in`





`rd`	`rd`
`rd_in`	`rd_in`










`mem`	`mem`








`addr`	`addr`
`mem_addr`	`mem_addr`
`150`	`150`




`cs`	`cs`
`mem_cs`	`mem_cs`
`reg`	`reg`




`wdata`	`wdata`
`mem_wdata`	`mem_wdata`
`150`	`150`




`rdata`	`rdata`
`mem_rdata`	`mem_rdata`
`150`	`150`





`wait`	`wait`
`mem_wait`	`mem_wait`
`10`	`10`





`rd`	`rd`
`mem_rd`	`mem_rd`




`wr`	`wr`
`mem_wr`	`mem_wr`










`data`	`data`








`addr`	`addr`
`data_addr`	`data_addr`
`111`	`111`




`cs`	`cs`
`data_cs`	`data_cs`
`reg`	`reg`




`wdata`	`wdata`
`data_wdata`	`data_wdata`
`150`	`150`




`rdata`	`rdata`
`data_rdata`	`data_rdata`
`150`	`150`





`be`	`be`
`data_be`	`data_be`
`10`	`10`





`rd`	`rd`
`data_rd`	`data_rd`




`wr`	`wr`
`data_wr`	`data_wr`









`io_reg`	`io_reg`








`addr`	`addr`
`io_reg_addr`	`io_reg_addr`
`70`	`70`




`cs`	`cs`
`io_reg_cs`	`io_reg_cs`
`reg`	`reg`




`wdata`	`wdata`
`io_reg_wdata`	`io_reg_wdata`
`70`	`70`




`rdata`	`rdata`
`io_reg_rdata`	`io_reg_rdata`
`150`	`150`





`wait`	`wait`
`io_reg_wait`	`io_reg_wait`





`rd`	`rd`
`io_reg_rd`	`io_reg_rd`




`wr`	`wr`
`io_reg_wr`	`io_reg_wr`









`ext_mem`	`ext_mem`









`addr`	`addr`
`ext_mem_addr`	`ext_mem_addr`
`130`	`130`




`cs`	`cs`
`ext_mem_cs`	`ext_mem_cs`
`reg`	`reg`




`wdata`	`wdata`
`ext_mem_wdata`	`ext_mem_wdata`
`150`	`150`




`rdata`	`rdata`
`ext_mem_rdata`	`ext_mem_rdata`
`150`	`150`





`wait`	`wait`
`ext_mem_wait`	`ext_mem_wait`





`rd`	`rd`
`ext_mem_rd`	`ext_mem_rd`




`wr`	`wr`
`ext_mem_wr`	`ext_mem_wr`











`prog_rom_mem`	`prog_rom_mem`








`addr`	`addr`
`prog_rom_mem_addr`	`prog_rom_mem_addr`
`110`	`110`




`cs`	`cs`
`prog_rom_mem_cs`	`prog_rom_mem_cs`
`reg`	`reg`




`wdata`	`wdata`
`prog_rom_mem_wdata`	`prog_rom_mem_wdata`
`150`	`150`




`rdata`	`rdata`
`prog_rom_mem_rdata`	`prog_rom_mem_rdata`
`150`	`150`





`rd`	`rd`
`prog_rom_mem_rd`	`prog_rom_mem_rd`




`wr`	`wr`
`prog_rom_mem_wr`	`prog_rom_mem_wr`










`sh_prog_rom_mem`	`sh_prog_rom_mem`






`addr`	`addr`
`sh_prog_rom_mem_addr`	`sh_prog_rom_mem_addr`
`110`	`110`




`cs`	`cs`
`sh_prog_rom_mem_cs`	`sh_prog_rom_mem_cs`
`reg`	`reg`




`wdata`	`wdata`
`sh_prog_rom_mem_wdata`	`sh_prog_rom_mem_wdata`
`150`	`150`




`rdata`	`rdata`
`sh_prog_rom_mem_rdata`	`sh_prog_rom_mem_rdata`
`150`	`150`





`rd`	`rd`
`sh_prog_rom_mem_rd`	`sh_prog_rom_mem_rd`




`wr`	`wr`
`sh_prog_rom_mem_wr`	`sh_prog_rom_mem_wr`

















`elab_verilog`
`102.1`
`none`
`:Simulation:`
`./tools/verilog/elab_verilog`


`configuration`
`default`


`dest_dir`
`io_ports`







`gen_verilog`	`gen_verilog`
`104.0`	`104.0`
`none`	`none`
`common`	`common`
`./tools/verilog/gen_verilog`	`./tools/verilog/gen_verilog`


`destination`	`destination`
`top`	`micro_bus_def`


`dest_dir`
`../verilog`














`fs-common`	`fs-common`



`../verilog/top.body`	`../verilog/top.body`
`verilogSourcefragment`	`verilogSourcefragment`






`fs-sim`	`fs-sim`



`../verilog/copyright.v`	`../verilog/copyright.v`
`verilogSourceinclude`	`verilogSourceinclude`




`../verilog/common/top`	`../verilog/common/micro_bus_def`
`verilogSourcemodule`	`verilogSourcemodule`







`fs-syn`	`fs-syn`



`../verilog/copyright.v`	`../verilog/copyright.v`
`verilogSourceinclude`	`verilogSourceinclude`




`../verilog/common/top`	`../verilog/common/micro_bus_def`
`verilogSourcemodule`	`verilogSourcemodule`






















`verilog`	`verilog`


`spirit:library="Testbench"`	`spirit:library="Testbench"`
`spirit:name="toolflow"`	`spirit:name="toolflow"`
`spirit:version="verilog"/>`	`spirit:version="verilog"/>`









`commoncommon`	`commoncommon`

`Verilog`	`Verilog`


`fs-common`	`fs-common`





`sim:Simulation:`	`sim:Simulation:`

`Verilog`	`Verilog`


`fs-sim`	`fs-sim`




`syn:Synthesis:`	`syn:Synthesis:`

`Verilog`	`Verilog`


`fs-syn`	`fs-syn`





`doc`	`doc`


`spirit:library="Testbench"`	`spirit:library="Testbench"`
`spirit:name="toolflow"`	`spirit:name="toolflow"`
`spirit:version="documentation"/>`	`spirit:version="documentation"/>`

`:Documentation:`	`:Documentation:`
`Verilog`	`Verilog`

























`cpu`	`cpu`


`io_reg`	`io_reg`
`0x8000`	`0x8000`




`data`	`data`
`0x1000`	`0x1000`



`ext_mem`	`ext_mem`
`0x4000`	`0x4000`




`prog_rom_mem`	`prog_rom_mem`
`0xc000`	`0xc000`




`sh_prog_rom_mem`	`sh_prog_rom_mem`
`0xf000`	`0xf000`














`io_reg`	`io_reg`
`0x8000`	`0x8000`
`8`	`8`




`data`	`data`
`0x1000`	`0x1000`
`8`	`8`





`mem`	`mem`
`0x0000`	`0x0000`
`8`	`8`






`ext_mem`	`ext_mem`
`0x4000`	`0x4000`
`8`	`8`




`prog_rom_mem`	`prog_rom_mem`
`0xff00`	`0xff00`
`8`	`8`




`sh_prog_rom_mem`	`sh_prog_rom_mem`
`0xc000`	`0xc000`
`8`	`8`

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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [micro_bus/] [rtl/] [xml/] [micro_bus_def.xml] - Diff between revs 133 and 134