URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [ip/] [wb_memory/] [componentCfg.xml] - Diff between revs 134 and 135

Rev 134	Rev 135

	`-->`

`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`	`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
`xmlns:socgen="http://opencores.org"`	`xmlns:socgen="http://opencores.org"`
`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`	`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`

`opencores.org`	`opencores.org`
`wishbone`	`wishbone`
`wb_memory`	`wb_memory`

`2`	`2`
`_`	`_`
`_`	`_`
`_`	`_`
`VARIANT`	`VARIANT`



	`TestBenches`
	`sim`
	`testbenches`
	`testbench`
	`version`


	`Fpgas`
	`syn`
	`ise`
	`chip`
	`variant`







`/doc`	`/doc`









`wb_memory/sim`	`wb_memory/sim`





`default`	`default`
`def`	`def`
`def_tb`	`def_tb`
`def_lint`	`def_lint`

`wb_addr_width24`	`wb_addr_width24`
`wb_data_width32`	`wb_data_width32`
`wb_byte_lanes4`	`wb_byte_lanes4`
`dat_width32`	`dat_width32`
`adr_width14`	`adr_width14`
`mem_size16384`	`mem_size16384`




















`wb_memory_def_tb`	`wb_memory_def_tb`
`def_tb`	`def_tb`

`PERIOD40`	`PERIOD40`
`TIMEOUT100000`	`TIMEOUT100000`



`wb_memory_defTB.test.dut`	`wb_memory_defTB.test.dut`



`icaruscoverage`	`icaruscoverage`





`wb_memory_def_lint`	`wb_memory_def_lint`
`def_lint`	`def_lint`

`rtl_check`	`rtl_check`














`default`	`default`
`wb_memory_def_lint`	`wb_memory_def_lint`











`default`	`default`
`wb_memory_def_tb`	`wb_memory_def_tb`