OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [toolflows/] [toolflow/] [xml/] [ise.xml] - Diff between revs 133 and 134

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 133 Rev 134
 
 
 
 
//                                                                        //
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//                                                                        //
//   This source file may be used and distributed without                 //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//   later version.                                                       //
//                                                                        //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//   details.                                                             //
//                                                                        //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
//                                                                        //
-->
-->
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
opencores.org
opencores.org
Testbench
Testbench
toolflow
toolflow
ise
ise
 
 
 
 
 
 
  gen_root
 
  103.5
 
  none
 
  :*Simulation:*
 
  ./tools/verilog/gen_root
 
 
 
 
 
 
 
 
 
 
 
  gen_design
 
  103.5
 
  none
 
  :*Simulation:*
 
  ./tools/verilog/gen_design
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  gen_verilogLib_syn
  gen_verilogLib_syn
  105.0
  105.0
  none
  none
  :*Synthesis:*
  :*Synthesis:*
  ./tools/verilog/gen_verilogLib
  ./tools/verilog/gen_verilogLib
    
    
    
    
      dest_dir
 
      ../views
 
    
 
    
 
      view
      view
      syn
      syn
    
    
  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
   
   
      fs-syn
      fs-syn
      
      
        dest_dir
        dest_dir
        ../views/syn/
        ../views/syn/
        verilogSource
        verilogSource
        libraryDir
        libraryDir
      
      
   
   
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
       
       
 
 
 
 
 
 
              
              
              syn
              syn
              :*Synthesis:*
              :*Synthesis:*
              Verilog
              Verilog
              
              
              fs-syn
              fs-syn
              
              
 
 
 
 
 
 
 
 
      
      
 
 
 
 
 
 
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.