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| Rev 131 |
Rev 134 |
module
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module
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cde_sram_dp
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cde_sram_dp
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#( parameter
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#( parameter
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ADDR=10,
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ADDR=10,
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WIDTH=8,
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WIDTH=8,
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WORDS=1024,
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WORDS=1024,
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WRITETHRU=0,
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WRITETHRU=0
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DEFAULT={WIDTH{1'b1}},
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)
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INIT_FILE="NONE",
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INSTANCE_NAME="U1")
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(
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(
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input wire clk,
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input wire clk,
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input wire cs,
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input wire cs,
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input wire rd,
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input wire rd,
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input wire wr,
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input wire wr,
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input wire [ ADDR-1 : 0] raddr,
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input wire [ ADDR-1 : 0] raddr,
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input wire [ ADDR-1 : 0] waddr,
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input wire [ ADDR-1 : 0] waddr,
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input wire [ WIDTH-1 : 0] wdata,
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input wire [ WIDTH-1 : 0] wdata,
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output reg [ WIDTH-1 : 0] rdata);
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output reg [ WIDTH-1 : 0] rdata);
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// Simple loop back for linting and code coverage
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// Simple loop back for linting and code coverage
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always@(posedge clk)
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always@(posedge clk)
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if( rd && cs ) rdata <= wdata;
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if( rd && cs ) rdata <= wdata;
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else rdata <= DEFAULT;
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else rdata <= {WIDTH{1'b1}};
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endmodule
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endmodule
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