URL
https://opencores.org/ocsvn/sockit_owm/sockit_owm/trunk
[/] [sockit_owm/] [trunk/] [README] - Diff between revs 2 and 3
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Rev 2 |
Rev 3 |
1-wire (onewire) master, with Altera tools integration
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1-wire (onewire) master, with Altera tools integration
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This IP implements the 1-wire communication protocol (http://en.wikipedia.org/wiki/1-Wire).
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This IP implements the 1-wire communication protocol (http://en.wikipedia.org/wiki/1-Wire).
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A more detailed documentation is provided in "onewire.odt".
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A more detailed documentation is provided in "onewire.odt".
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RTL features:
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RTL features:
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- small RTL, should fit into a CPLD
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- small RTL, should fit into a CPLD
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- Avalon MM bus, Wishbone compatible with a simple wraper
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- Avalon MM bus, Wishbone compatible with a simple wraper
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- timed reset, presence, write/read bit transfers
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- timed reset, presence, write/read bit transfers
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- overdrive (untested)
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- overdrive (untested)
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- power supply (strong pull-up) (untested)
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- power supply (strong pull-up) (untested)
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SOPC Builder integration:
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SOPC Builder integration
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- dividers are computed automaticaly from the system frequency
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Nios II EDS integration:
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Nios II EDS integration:
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- port of the 1-wire open domain kit version 3.10
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- port of the 1-wire open domain kit version 3.10
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- interrup driven or polling driver
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- interrup driven or polling driver
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- uCOS-II support (untested)
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- uCOS-II support (untested)
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