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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [output_files/] [spw_fifo_ulight.asm.rpt] - Diff between revs 32 and 35

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Rev 32 Rev 35
Assembler report for spw_fifo_ulight
Assembler report for spw_fifo_ulight
Thu Aug 24 22:41:24 2017
Fri Sep 15 08:18:15 2017
Quartus Prime Version 17.0.1 Build 598 06/07/2017 SJ Lite Edition
Quartus Prime Version 17.0.1 Build 598 06/07/2017 SJ Lite Edition
---------------------
---------------------
; Table of Contents ;
; Table of Contents ;
---------------------
---------------------
  1. Legal Notice
  1. Legal Notice
  2. Assembler Summary
  2. Assembler Summary
  3. Assembler Settings
  3. Assembler Settings
  4. Assembler Generated Files
  4. Assembler Generated Files
  5. Assembler Device Options: spw_fifo_ulight.sof
  5. Assembler Device Options: spw_fifo_ulight.sof
  6. Assembler Messages
  6. Assembler Messages
----------------
----------------
; Legal Notice ;
; Legal Notice ;
----------------
----------------
Copyright (C) 2017  Intel Corporation. All rights reserved.
Copyright (C) 2017  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
(including device programming or simulation files), and any
associated documentation or information are expressly subject
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel MegaCore Function License Agreement, or other
the Intel MegaCore Function License Agreement, or other
applicable license agreement, including, without limitation,
applicable license agreement, including, without limitation,
that your use is for the sole purpose of programming logic
that your use is for the sole purpose of programming logic
devices manufactured by Intel and sold by Intel or its
devices manufactured by Intel and sold by Intel or its
authorized distributors.  Please refer to the applicable
authorized distributors.  Please refer to the applicable
agreement for further details.
agreement for further details.
+---------------------------------------------------------------+
+---------------------------------------------------------------+
; Assembler Summary                                             ;
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Thu Aug 24 22:41:24 2017 ;
; Assembler Status      ; Successful - Fri Sep 15 08:18:15 2017 ;
; Revision Name         ; spw_fifo_ulight                       ;
; Revision Name         ; spw_fifo_ulight                       ;
; Top-level Entity Name ; SPW_ULIGHT_FIFO                       ;
; Top-level Entity Name ; SPW_ULIGHT_FIFO                       ;
; Family                ; Cyclone V                             ;
; Family                ; Cyclone V                             ;
; Device                ; 5CSEMA4U23C6                          ;
; Device                ; 5CSEMA4U23C6                          ;
+-----------------------+---------------------------------------+
+-----------------------+---------------------------------------+
+----------------------------------+
+----------------------------------+
; Assembler Settings               ;
; Assembler Settings               ;
+--------+---------+---------------+
+--------+---------+---------------+
; Option ; Setting ; Default Value ;
; Option ; Setting ; Default Value ;
+--------+---------+---------------+
+--------+---------+---------------+
+---------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------+
; Assembler Generated Files                                                                                                             ;
; Assembler Generated Files                                                                                                             ;
+---------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------+
; File Name                                                                                                                             ;
; File Name                                                                                                                             ;
+---------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------+
; /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/output_files/spw_fifo_ulight.sof ;
; /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/output_files/spw_fifo_ulight.sof ;
+---------------------------------------------------------------------------------------------------------------------------------------+
+---------------------------------------------------------------------------------------------------------------------------------------+
+-----------------------------------------------+
+-----------------------------------------------+
; Assembler Device Options: spw_fifo_ulight.sof ;
; Assembler Device Options: spw_fifo_ulight.sof ;
+----------------+------------------------------+
+----------------+------------------------------+
; Option         ; Setting                      ;
; Option         ; Setting                      ;
+----------------+------------------------------+
+----------------+------------------------------+
; JTAG usercode  ; 0x00AD1064                   ;
; JTAG usercode  ; 0x00BA1C35                   ;
; Checksum       ; 0x00AD1064                   ;
; Checksum       ; 0x00BA1C35                   ;
+----------------+------------------------------+
+----------------+------------------------------+
+--------------------+
+--------------------+
; Assembler Messages ;
; Assembler Messages ;
+--------------------+
+--------------------+
Info: *******************************************************************
Info: *******************************************************************
Info: Running Quartus Prime Assembler
Info: Running Quartus Prime Assembler
    Info: Version 17.0.1 Build 598 06/07/2017 SJ Lite Edition
    Info: Version 17.0.1 Build 598 06/07/2017 SJ Lite Edition
    Info: Processing started: Thu Aug 24 22:41:08 2017
    Info: Processing started: Fri Sep 15 08:17:57 2017
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spw_fifo_ulight -c spw_fifo_ulight
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off spw_fifo_ulight -c spw_fifo_ulight
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (115030): Assembler is generating device programming files
Info (115030): Assembler is generating device programming files
Info (11878): Hard Processor Subsystem configuration has not changed and a Preloader software update is not required
Info (11878): Hard Processor Subsystem configuration has not changed and a Preloader software update is not required
Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
    Info: Peak virtual memory: 1026 megabytes
    Info: Peak virtual memory: 1040 megabytes
    Info: Processing ended: Thu Aug 24 22:41:24 2017
    Info: Processing ended: Fri Sep 15 08:18:15 2017
    Info: Elapsed time: 00:00:16
    Info: Elapsed time: 00:00:18
    Info: Total CPU time (on all processors): 00:00:10
    Info: Total CPU time (on all processors): 00:00:12
 
 
 
 

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