//+FHDR------------------------------------------------------------------------
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//Copyright (c) 2013 Latin Group American Integhrated Circuit, Inc. All rights reserved
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//GLADIC Open Source RTL
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//-----------------------------------------------------------------------------
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//FILE NAME :
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//DEPARTMENT : IC Design / Verification
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//AUTHOR : Felipe Fernandes da Costa
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//AUTHOR’S EMAIL :
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//-----------------------------------------------------------------------------
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//RELEASE HISTORY
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//VERSION DATE AUTHOR DESCRIPTION
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//1.0 YYYY-MM-DD name
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//-----------------------------------------------------------------------------
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//KEYWORDS : General file searching keywords, leave blank if none.
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//-----------------------------------------------------------------------------
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//PURPOSE : ECSS_E_ST_50_12C_31_july_2008
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//-----------------------------------------------------------------------------
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//PARAMETERS
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//PARAM NAME RANGE : DESCRIPTION : DEFAULT : UNITS
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//e.g.DATA_WIDTH [32,16] : width of the DATA : 32:
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//-----------------------------------------------------------------------------
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//REUSE ISSUES
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//Reset Strategy :
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//Clock Domains :
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//Critical Timing :
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//Test Features :
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//Asynchronous I/F :
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//Scan Methodology :
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//Instantiations :
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//Synthesizable (y/n) :
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//Other :
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//-FHDR------------------------------------------------------------------------
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#ifndef SPW_FSM_T_H
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#ifndef SPW_FSM_T_H
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#define SPW_FSM_T_H
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#define SPW_FSM_T_H
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#include <systemc.h>
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#include <systemc.h>
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#define ERROR_RESET 0
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#define ERROR_RESET 0
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#define ERROR_WAIT 1
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#define ERROR_WAIT 1
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#define READY 2
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#define READY 2
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#define STARTED 3
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#define STARTED 3
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#define CONNECTING 4
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#define CONNECTING 4
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#define RUN 5
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#define RUN 5
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class SPW_FSM_SC;
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class SPW_FSM_SC;
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SC_MODULE(SPW_FSM_SC)
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SC_MODULE(SPW_FSM_SC)
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{
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{
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/*FSM signal*/
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/*FSM signal*/
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sc_in<bool> CLOCK;
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sc_in<bool> CLOCK;
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sc_in<bool> RESET;
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sc_in<bool> RESET;
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sc_in<bool> LINK_START;
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sc_in<bool> LINK_START;
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sc_in<bool> LINK_DISABLE;
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sc_in<bool> LINK_DISABLE;
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sc_in<bool> AUTO_START;
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sc_in<bool> AUTO_START;
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sc_out<sc_uint<4> > FSM_SPW_OUT;
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sc_out<sc_uint<4> > FSM_SPW_OUT;
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/*Signal come from RX Receiver*/
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/*Signal come from RX Receiver*/
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sc_in<bool> GOT_FCT_RX;
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sc_in<bool> GOT_FCT_RX;
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sc_in<bool> GOT_TIMECODE_RX;
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sc_in<bool> GOT_TIMECODE_RX;
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sc_in<bool> GOTNCHAR_RX;
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sc_in<bool> GOTNCHAR_RX;
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sc_in<bool> GOTNULL_RX;
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sc_in<bool> GOTNULL_RX;
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sc_in<bool> GOTBIT_RX;
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sc_in<bool> GOTBIT_RX;
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sc_in<bool> CREDITERROR_RX;
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sc_in<bool> CREDITERROR_RX;
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sc_in<bool> RXERROR_RX;
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sc_in<bool> RXERROR_RX;
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sc_out<bool> ENABLE_RX;
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sc_out<bool> ENABLE_RX;
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/*Signal come from TX Transmit*/
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/*Signal come from TX Transmit*/
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sc_out<bool> ENABLE_TX;
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sc_out<bool> ENABLE_TX;
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sc_out<bool> SEND_NULL_TX;
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sc_out<bool> SEND_NULL_TX;
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sc_out<bool> SEND_FCT_TX;
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sc_out<bool> SEND_FCT_TX;
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sc_out<bool> SEND_NCHAR_TX;
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sc_out<bool> SEND_NCHAR_TX;
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sc_out<bool> SEND_TIMECODE_TX;
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sc_out<bool> SEND_TIMECODE_TX;
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/*RESET TX / RX*/
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/*RESET TX / RX*/
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sc_out<bool> RESET_TX;
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sc_out<bool> RESET_TX;
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sc_out<bool> RESET_RX;
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sc_out<bool> RESET_RX;
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bool After128;
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bool After128;
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bool After64;
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bool After64;
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sc_uint<4> state_fsm_spw;
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sc_uint<4> state_fsm_spw;
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void FSM()
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void FSM()
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{
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{
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//cout << "STARTING FSM SPW SC" << endl;
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//cout << "STARTING FSM SPW SC" << endl;
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while(1)
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while(1)
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{
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{
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if(!RESET)
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if(!RESET)
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{
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{
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FSM_SPW_OUT = state_fsm_spw = ERROR_RESET;
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FSM_SPW_OUT = state_fsm_spw = ERROR_RESET;
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ENABLE_TX = false;
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ENABLE_TX = false;
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SEND_NULL_TX = false;
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SEND_NULL_TX = false;
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SEND_FCT_TX = false;
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SEND_FCT_TX = false;
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SEND_NCHAR_TX = false;
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SEND_NCHAR_TX = false;
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SEND_TIMECODE_TX= false;
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SEND_TIMECODE_TX= false;
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RESET_TX = true;
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RESET_TX = true;
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RESET_RX = true;
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RESET_RX = true;
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}else
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}else
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{
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{
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FSM_SPW_OUT = state_fsm_spw;
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FSM_SPW_OUT = state_fsm_spw;
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switch(state_fsm_spw)
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switch(state_fsm_spw)
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{
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{
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case ERROR_RESET:
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case ERROR_RESET:
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RESET_TX = true;
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RESET_TX = true;
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RESET_RX = true;
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RESET_RX = true;
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ENABLE_TX = false;
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ENABLE_TX = false;
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ENABLE_RX = false;
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ENABLE_RX = false;
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if(After64 == true)
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if(After64 == true)
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{
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{
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state_fsm_spw = ERROR_WAIT;
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state_fsm_spw = ERROR_WAIT;
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}
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}
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//cout << "ERROR RESET" << endl;
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//cout << "ERROR RESET" << endl;
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break;
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break;
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case ERROR_WAIT:
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case ERROR_WAIT:
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RESET_TX = true;
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RESET_TX = true;
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ENABLE_TX = false;
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ENABLE_TX = false;
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RESET_RX = false;
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RESET_RX = false;
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ENABLE_RX = true;
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ENABLE_RX = true;
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if(After128 == true)
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if(After128 == true)
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{
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{
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state_fsm_spw = READY;
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state_fsm_spw = READY;
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}else if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
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}else if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
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{
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{
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state_fsm_spw = ERROR_RESET;
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state_fsm_spw = ERROR_RESET;
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}
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}
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//cout << "ERROR WAIT" << endl;
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//cout << "ERROR WAIT" << endl;
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break;
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break;
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case READY:
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case READY:
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RESET_TX = true;
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RESET_TX = true;
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RESET_RX = false;
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RESET_RX = false;
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ENABLE_RX = true;
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ENABLE_RX = true;
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if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
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if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX)
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{
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{
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state_fsm_spw = ERROR_RESET;
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state_fsm_spw = ERROR_RESET;
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}
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}
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else if((!LINK_DISABLE) && (LINK_START ||(AUTO_START && GOTNULL_RX)))
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else if((!LINK_DISABLE) && (LINK_START ||(AUTO_START && GOTNULL_RX)))
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{
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{
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state_fsm_spw = STARTED;
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state_fsm_spw = STARTED;
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}
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}
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//cout << "READY" << endl;
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//cout << "READY" << endl;
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break;
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break;
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case STARTED:
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case STARTED:
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RESET_TX = false;
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RESET_TX = false;
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RESET_RX = false;
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RESET_RX = false;
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SEND_NULL_TX = true;
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SEND_NULL_TX = true;
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ENABLE_TX = true;
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ENABLE_TX = true;
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ENABLE_RX = true;
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ENABLE_RX = true;
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if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
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if(RXERROR_RX || GOT_FCT_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
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{
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{
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state_fsm_spw = ERROR_RESET;
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state_fsm_spw = ERROR_RESET;
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}
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}
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else if(GOTNULL_RX && GOTBIT_RX)
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else if(GOTNULL_RX && GOTBIT_RX)
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{
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{
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state_fsm_spw = CONNECTING;
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state_fsm_spw = CONNECTING;
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}
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}
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//cout << "STARTED" << endl;
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//cout << "STARTED" << endl;
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break;
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break;
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case CONNECTING:
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case CONNECTING:
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RESET_TX = false;
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RESET_TX = false;
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RESET_RX = false;
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RESET_RX = false;
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ENABLE_TX = true;
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ENABLE_TX = true;
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ENABLE_RX = true;
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ENABLE_RX = true;
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SEND_NULL_TX = true;
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SEND_NULL_TX = true;
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SEND_FCT_TX = true;
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SEND_FCT_TX = true;
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if(RXERROR_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
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if(RXERROR_RX || GOTNCHAR_RX || GOT_TIMECODE_RX || After128 )
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{
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{
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state_fsm_spw = ERROR_RESET;
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state_fsm_spw = ERROR_RESET;
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}else if(GOT_FCT_RX)
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}else if(GOT_FCT_RX)
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{
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{
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state_fsm_spw = RUN;
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state_fsm_spw = RUN;
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}
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}
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//cout << "CONNECTING" << endl;
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//cout << "CONNECTING" << endl;
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break;
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break;
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case RUN:
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case RUN:
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SEND_NULL_TX = true;
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SEND_NULL_TX = true;
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ENABLE_TX = true;
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ENABLE_TX = true;
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SEND_FCT_TX = true;
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SEND_FCT_TX = true;
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SEND_NCHAR_TX = true;
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SEND_NCHAR_TX = true;
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SEND_TIMECODE_TX = true;
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SEND_TIMECODE_TX = true;
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ENABLE_RX = true;
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ENABLE_RX = true;
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if(RXERROR_RX || CREDITERROR_RX || LINK_DISABLE)
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if(RXERROR_RX || CREDITERROR_RX || LINK_DISABLE)
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{
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{
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state_fsm_spw = ERROR_RESET;
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state_fsm_spw = ERROR_RESET;
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//cout << "RX ERROR DETECTED" << endl;
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//cout << "RX ERROR DETECTED" << endl;
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}
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}
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else
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else
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{
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{
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state_fsm_spw = RUN;
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state_fsm_spw = RUN;
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}
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}
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//cout << "RUN" << endl;
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//cout << "RUN" << endl;
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break;
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break;
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}
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}
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}
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}
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wait(1);
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wait(1);
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}
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}
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}
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}
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void TIMER_ADTER128()
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void TIMER_ADTER128()
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{
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{
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while(1)
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while(1)
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{
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{
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if(!RESET)
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if(!RESET)
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{
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{
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After128 = false;
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After128 = false;
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}
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}
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else
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else
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{
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{
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if(state_fsm_spw == ERROR_WAIT || state_fsm_spw == STARTED || state_fsm_spw == CONNECTING)
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if(state_fsm_spw == ERROR_WAIT || state_fsm_spw == STARTED || state_fsm_spw == CONNECTING)
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{
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{
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After128 = false;
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After128 = false;
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wait(639);
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wait(639);
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After128 = true;
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After128 = true;
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}
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}
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}
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}
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wait(1);
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wait(1);
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}
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}
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}
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}
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void TIMER_ADTER64()
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void TIMER_ADTER64()
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{
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{
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while(1)
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while(1)
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{
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{
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if(!RESET)
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if(!RESET)
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{
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{
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After64 = false;
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After64 = false;
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}
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}
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else
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else
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{
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{
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if(state_fsm_spw == ERROR_RESET)
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if(state_fsm_spw == ERROR_RESET)
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{
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{
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After64 = false;
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After64 = false;
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wait(319);
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wait(319);
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After64 = true;
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After64 = true;
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}
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}
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}
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}
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wait(1);
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wait(1);
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}
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}
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}
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}
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SC_CTOR(SPW_FSM_SC)
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SC_CTOR(SPW_FSM_SC)
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{
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{
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SC_CTHREAD(FSM,CLOCK.pos());
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SC_CTHREAD(FSM,CLOCK.pos());
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SC_CTHREAD(TIMER_ADTER64,CLOCK.pos());
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SC_CTHREAD(TIMER_ADTER64,CLOCK.pos());
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SC_CTHREAD(TIMER_ADTER128,CLOCK.pos());
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SC_CTHREAD(TIMER_ADTER128,CLOCK.pos());
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}
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}
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};
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};
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#endif
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#endif
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