-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The D port controller.
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-- The D port controller.
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--
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--
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-- $Id: t400_io_d.vhd,v 1.2 2006-05-07 02:24:16 arniml Exp $
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-- $Id: t400_io_d.vhd 179 2009-04-01 19:48:38Z arniml $
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--
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--
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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-- modification, are permitted provided that the following conditions are met:
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--
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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-- this list of conditions and the following disclaimer.
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--
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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-- documentation and/or other materials provided with the distribution.
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--
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--
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-- Neither the name of the author nor the names of other contributors may
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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-- specific prior written permission.
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--
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
|
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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--
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-- Please report bugs to the author, but before you do so, please
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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-- you have the latest version of this file.
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--
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--
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-- The latest version of this file can be found at:
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-- The latest version of this file can be found at:
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-- http://www.opencores.org/cvsweb.shtml/t400/
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-- http://www.opencores.org/cvsweb.shtml/t400/
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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|
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.t400_opt_pack.all;
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use work.t400_opt_pack.all;
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use work.t400_pack.all;
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use work.t400_pack.all;
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entity t400_io_d is
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entity t400_io_d is
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generic (
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generic (
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opt_out_type_3_g : integer := t400_opt_out_type_std_c;
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opt_out_type_3_g : integer := t400_opt_out_type_std_c;
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opt_out_type_2_g : integer := t400_opt_out_type_std_c;
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opt_out_type_2_g : integer := t400_opt_out_type_std_c;
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opt_out_type_1_g : integer := t400_opt_out_type_std_c;
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opt_out_type_1_g : integer := t400_opt_out_type_std_c;
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opt_out_type_0_g : integer := t400_opt_out_type_std_c
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opt_out_type_0_g : integer := t400_opt_out_type_std_c
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);
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);
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port (
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port (
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-- System Interface -------------------------------------------------------
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-- System Interface -------------------------------------------------------
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ck_i : in std_logic;
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ck_i : in std_logic;
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ck_en_i : in boolean;
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ck_en_i : in boolean;
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por_i : in boolean;
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por_i : in boolean;
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res_i : in boolean;
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res_i : in boolean;
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-- Control Interface ------------------------------------------------------
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-- Control Interface ------------------------------------------------------
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op_i : in io_d_op_t;
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op_i : in io_d_op_t;
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bd_i : in bd_t;
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bd_i : in bd_t;
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-- Port D Interface -------------------------------------------------------
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-- Port D Interface -------------------------------------------------------
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io_d_o : out dw_t;
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io_d_o : out dw_t;
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io_d_en_o : out dw_t
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io_d_en_o : out dw_t
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);
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);
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end t400_io_d;
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end t400_io_d;
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use work.t400_io_pack.all;
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use work.t400_io_pack.all;
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architecture rtl of t400_io_d is
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architecture rtl of t400_io_d is
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signal d_q : dw_t;
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signal d_q : dw_t;
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signal vdd_s : std_logic;
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signal vdd_s : std_logic;
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begin
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begin
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vdd_s <= '1';
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vdd_s <= '1';
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Process d_reg
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-- Process d_reg
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--
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--
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-- Purpose:
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-- Purpose:
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-- Implements the D output register.
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-- Implements the D output register.
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--
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--
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d_reg: process (ck_i, por_i)
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d_reg: process (ck_i, por_i)
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begin
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begin
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if por_i then
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if por_i then
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d_q <= (others => '0');
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d_q <= (others => '0');
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|
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elsif ck_i'event and ck_i = '1' then
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elsif ck_i'event and ck_i = '1' then
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if res_i then
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if res_i then
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-- synchronous reset upon external reset event
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-- synchronous reset upon external reset event
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d_q <= (others => '0');
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d_q <= (others => '0');
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elsif ck_en_i then
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elsif ck_en_i then
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if op_i = IOD_LOAD then
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if op_i = IOD_LOAD then
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d_q <= bd_i;
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d_q <= bd_i;
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end process d_reg;
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end process d_reg;
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--
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Process out_driver
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-- Process out_driver
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--
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--
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-- Purpose:
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-- Purpose:
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-- Implements the output driver data and enable.
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-- Implements the output driver data and enable.
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--
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--
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out_driver: process (d_q,
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out_driver: process (d_q,
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vdd_s)
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vdd_s)
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begin
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begin
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-- bit 3
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-- bit 3
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io_d_o(3) <= io_out_f(dat => d_q(3),
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io_d_o(3) <= io_out_f(dat => d_q(3),
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opt => opt_out_type_3_g);
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opt => opt_out_type_3_g);
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io_d_en_o(3) <= io_en_f (en => vdd_s, dat => d_q(3),
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io_d_en_o(3) <= io_en_f (en => vdd_s, dat => d_q(3),
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opt => opt_out_type_3_g);
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opt => opt_out_type_3_g);
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-- bit 2
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-- bit 2
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io_d_o(2) <= io_out_f(dat => d_q(2),
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io_d_o(2) <= io_out_f(dat => d_q(2),
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opt => opt_out_type_2_g);
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opt => opt_out_type_2_g);
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io_d_en_o(2) <= io_en_f (en => vdd_s, dat => d_q(2),
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io_d_en_o(2) <= io_en_f (en => vdd_s, dat => d_q(2),
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opt => opt_out_type_2_g);
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opt => opt_out_type_2_g);
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|
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-- bit 1
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-- bit 1
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io_d_o(1) <= io_out_f(dat => d_q(1),
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io_d_o(1) <= io_out_f(dat => d_q(1),
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opt => opt_out_type_1_g);
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opt => opt_out_type_1_g);
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io_d_en_o(1) <= io_en_f (en => vdd_s, dat => d_q(1),
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io_d_en_o(1) <= io_en_f (en => vdd_s, dat => d_q(1),
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opt => opt_out_type_1_g);
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opt => opt_out_type_1_g);
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|
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-- bit 0
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-- bit 0
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io_d_o(0) <= io_out_f(dat => d_q(0),
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io_d_o(0) <= io_out_f(dat => d_q(0),
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opt => opt_out_type_0_g);
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opt => opt_out_type_0_g);
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io_d_en_o(0) <= io_en_f (en => vdd_s, dat => d_q(0),
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io_d_en_o(0) <= io_en_f (en => vdd_s, dat => d_q(0),
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opt => opt_out_type_0_g);
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opt => opt_out_type_0_g);
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end process out_driver;
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end process out_driver;
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--
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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end rtl;
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end rtl;
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|
|
|
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-------------------------------------------------------------------------------
|
|
-- File History:
|
|
--
|
|
-- $Log: not supported by cvs2svn $
|
|
-- Revision 1.1.1.1 2006/05/06 01:56:44 arniml
|
|
-- import from local CVS repository, LOC_CVS_0_1
|
|
--
|
|
-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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